JP4804751B2 - 電気回路またはモジュール用の金属セラミック基板と、そのような基板およびそのような基板を含むモジュールを製作する方法 - Google Patents
電気回路またはモジュール用の金属セラミック基板と、そのような基板およびそのような基板を含むモジュールを製作する方法 Download PDFInfo
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- JP4804751B2 JP4804751B2 JP2004514538A JP2004514538A JP4804751B2 JP 4804751 B2 JP4804751 B2 JP 4804751B2 JP 2004514538 A JP2004514538 A JP 2004514538A JP 2004514538 A JP2004514538 A JP 2004514538A JP 4804751 B2 JP4804751 B2 JP 4804751B2
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Description
a)均一な酸化銅層を製作するための銅はくの酸化;
b)銅箔をセラミック層へ配置;
c)その複合材料を、おおよそ1025と1083℃の間のプロセス温度例えば、おおよそ1071℃まで加熱;
d)室温まで冷却;
e)電力領域、および制御および駆動領域両方の簡略かされた製作;
f)構造化(ストリップ導体、接触面、取付面など)によって、電力領域、および制御または駆動領域およびそこで形成される領域の正確な位置調整、及びコンポーネント取り付けの簡略化;
g)電力領域における素子と制御および駆動領域の実装は、1ステップで可能である;
h)有機基板物質が使用されていないので、高温の半田付け温度、たとえばコンポーネント実装用の400℃以下の半田付け温度が可能であり、および、特に、無鉛半田を使用することができる;
i)実装される電力素子の表面のレベルおよび実装される制御または駆動素子の表面のレベルがわずかに異なるだけであるので、基板の表面実装の間、半田または接着剤ペーストの適用がかなり簡単になる;
j)電力素子および制御または駆動素子の表面実装に対する半田ペーストまたは接着剤の適用は、1ステップで可能である;
k)超音波ボンディングを介した電力素子と制御および駆動素子との間の簡略化された配線;
l)冷却システムへと改良されたボンディングに起因する制御または駆動ステージの改良された冷却;
m)制御および駆動ステージの非常に複雑なレイアウトは、簡単に実現できる交差技術によって可能である。
a)金属層12および13を形成するために、、それらの表面が酸化された少なくとも2つの銅箔ブランクが、DCBプロセスによってセラミック層11の1つの表面に貼り付けられる。この適用の前に、望ましくは前処理で、保護用ガス雰囲気中、たとえば窒素雰囲気中で、銅材料の硬度を減らす目的で、銅箔ブランクは焼き戻しされる。
b)冷却後、後の絶縁層14を形成しているガラス含有ペーストからできている層は、加圧または他の適当ないくつかの方法によって金属層12に貼り付けられる。
c)ペーストが金属層12に接着されている絶縁層14を形成するように、ペーストは乾燥され、DCBプロセスの温度以下の温度、すなわち750と1030℃の間の温度で、焼き付けされる。
d)再度冷却した後に、金属成分を含んでいる導電性ペーストは、絶縁層15に、同じく加圧または他の適当ないくつかの方法によって、貼り付けられる。
e)それから、導電性ペースト(厚膜)は、750と1030℃の間の温度で焼き付けられる。
a)金属層12および13を形成するために、それらの表面の上で酸化される銅箔の少なくとも2つのブランクが、DCBプロセスによってセラミック層11の1つの表面に貼り付けられる。この貼りつけの前に、銅箔ブランクは、銅材料の硬度を低減する目的で、望ましくは前階段で、保護用ガス雰囲気中、たとえば窒素雰囲気中で、焼き戻しされる。
b)冷却後に、後の絶縁層14を形成するガラス含有ペーストでできている層が、加圧または他の適切ないくつかの方法によって金属層12に貼り付けられる。
c)ペーストは乾燥され、それから、DCBプロセスの温度以下の温度で、すなわち750と1030℃の間の温度で、焼き付けられて、ペーストが金属層12に接着して絶縁層14を形成する。
d1)その後、感光性の導電性ペーストからなる層が塗布され、そして、この層は、所望の構造に対応して露光される。
d2)次の加工ステップで、露光または非露光領域は、ペーストによって形成される層から除去される。
e)それから、構造化された導電性ペースト(厚膜)は、750と1030℃の間の温度で焼き付けられる。
2 金属セラミック基板
3、4 半導体電力コンポーネント
5 追加のプリント基板
6 制御または駆動ステージのコンポーネント
7 ベースプレート
10、10a、10b 本発明による金属セラミック基板
10c、10d 本発明による金属セラミック基板
11 セラミック層
12、13 金属層
12’ 構造化された領域
14、14c 絶縁層
15、15c 追加の金属層
15’ 構造化された領域
16 凹部
17、17a 本発明による電力モジュール
18 内部接続
19 外部電力接続
20、21 内部接続
22 ベースプレート
23 半田止め処理
Claims (10)
- 少なくとも1つの第1電力回路部分と、少なくとも1つの低電力回路基板部分を有する、電子回路及びモジュール用の金属セラミック基板を製造する方法であって、
0.2〜2mmの間の厚さを持つセラミック層(11)を用意するステップ、
ダイレクトボンディングプロセスまたは、半田付けプロセスによって、0.1〜0.9mmの厚さを持つ第1のタイプの金属層(12,13)を、それぞれ、セラミック層(11)の各面に貼り付けるステップ、
少なくとも1つの第1のタイプの金属層(12)の部分的な領域である支持領域(12’)の上に、ガラス含有ペーストを塗り付け、そして、乾かし、750℃〜1030℃の間の温度で焼き付けることで、上記支持領域(12’)の表面に、0.015〜0.15mmの厚さを有する絶縁層(14)を貼り付けるステップ、および、
少なくとも1つの金属組成から成る導電性ペーストを上記絶縁層の上に塗り付け、750℃から1030℃の間の温度で焼き付けることによって、0.015〜0.15mmの厚さを有する構造化された少なくとも1つの第2のタイプの金属層(15)を、上記絶縁層の上にのみ設けるステップを含むことを特徴とする方法。 - 少なくとも1つの第1のタイプの金属層(12)を、少なくとも1つの支持領域(12’)を形成するように構造化するステップを含むことを特徴とする請求項1に記載の方法。
- 少なくとも1つの第1のタイプの金属層(12)が、少なくとも1つ電力コンポーネントのためのストリップ導体、接触面または、取付面、及び、ガラス含有絶縁体のための少なくとも1つの支持領域(12’)を形成するように構造化することを特徴とする請求項1または2に記載される方法。
- ガラス含有ペーストの塗り付け及び、このペーストの焼き付けを、このガラス含有素材でできた少なくとも1つの絶縁層(14)の厚さを増す目的で、少なくとも1度繰り返すことを特徴とする請求項1から3のいずれか1項に記載の方法。
- 第2のタイプの金属層(15)を形成するペーストの塗り付け及び焼付けを、この金属層(15)の厚さを増す目的で、少なくとも1度繰り返すことを特徴とする請求項1から4のいずれか1項に記載の方法。
- 基板の少なくとも1つの制御または駆動領域のためのストリップ導体、接触面、取付面を形成するための、少なくとも1つの第2のタイプの金属層を構造化することを含むことを特徴とする請求項1から5のいずれか1項に記載の方法。
- いくつかの基板を、セラミック層(11)を形成している1つの共通セラミック板に複数製作することを特徴とする請求項1から5のいずれか1項に記載の方法。
- 半田止め領域を、構造化された第1のタイプの金属層(12)に、ガラス含有ペーストの塗り付け及び焼付けによって塗り付けることを特徴とする請求項1から5のいずれか1項に記載の方法。
- 半田止め領域の塗り付けを、絶縁層(14)の塗り付けと共に行うことを特徴とする請求項8に記載の方法。
- 第1のタイプの金属層(12)の部分的な領域である支持領域(12’)が、反対の第1のタイプの金属層(12)の表面のセラミック層(11)とは反対面に、くぼみまたは凹部(16)を備え、かつ、ガラス含有絶縁層(14)が、前記くぼみまたは凹部(16)を備えることを特徴とする請求項8または9に記載の方法。
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DE10227658.7 | 2002-06-20 | ||
DE10227658A DE10227658B4 (de) | 2002-06-20 | 2002-06-20 | Metall-Keramik-Substrat für elektrische Schaltkreise -oder Module, Verfahren zum Herstellen eines solchen Substrates sowie Modul mit einem solchen Substrat |
PCT/DE2003/001242 WO2004002204A1 (de) | 2002-06-20 | 2003-04-11 | Metall-keramik-substrat für elektische schaltkreise- oder module, verfahren zum herstellen eines solchen substrates sowie modul mit einem solchen substrat |
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EP (2) | EP2170026B1 (ja) |
JP (1) | JP4804751B2 (ja) |
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EP1514459B1 (de) | 2011-07-13 |
DE10227658B4 (de) | 2012-03-08 |
US7750461B2 (en) | 2010-07-06 |
JP2005530353A (ja) | 2005-10-06 |
DE10227658A1 (de) | 2004-01-15 |
AU2003233753A1 (en) | 2004-01-06 |
EP2170026B1 (de) | 2011-10-26 |
EP1514459A1 (de) | 2005-03-16 |
WO2004002204A1 (de) | 2003-12-31 |
EP2170026A1 (de) | 2010-03-31 |
US8021920B2 (en) | 2011-09-20 |
US20060103005A1 (en) | 2006-05-18 |
US20100186231A1 (en) | 2010-07-29 |
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