JP4802246B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4802246B2
JP4802246B2 JP2008534303A JP2008534303A JP4802246B2 JP 4802246 B2 JP4802246 B2 JP 4802246B2 JP 2008534303 A JP2008534303 A JP 2008534303A JP 2008534303 A JP2008534303 A JP 2008534303A JP 4802246 B2 JP4802246 B2 JP 4802246B2
Authority
JP
Japan
Prior art keywords
resin
core material
type
layer
expansion coefficient
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008534303A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2008032620A1 (ja
Inventor
雅浩 和田
宏之 田中
浩 廣瀬
哲平 伊藤
賢也 橘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Bakelite Co Ltd
Original Assignee
Sumitomo Bakelite Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Bakelite Co Ltd filed Critical Sumitomo Bakelite Co Ltd
Priority to JP2008534303A priority Critical patent/JP4802246B2/ja
Publication of JPWO2008032620A1 publication Critical patent/JPWO2008032620A1/ja
Application granted granted Critical
Publication of JP4802246B2 publication Critical patent/JP4802246B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • H10W74/012Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69Insulating materials thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69Insulating materials thereof
    • H10W70/695Organic materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0271Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/303Assembling printed circuits with electric components, e.g. with resistors with surface mounted components
    • H05K3/305Affixing by adhesive
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251Materials
    • H10W72/252Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Wire Bonding (AREA)
JP2008534303A 2006-09-13 2007-09-05 半導体装置 Expired - Fee Related JP4802246B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008534303A JP4802246B2 (ja) 2006-09-13 2007-09-05 半導体装置

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2006248473 2006-09-13
JP2006248473 2006-09-13
PCT/JP2007/067283 WO2008032620A1 (en) 2006-09-13 2007-09-05 Semiconductor device
JP2008534303A JP4802246B2 (ja) 2006-09-13 2007-09-05 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2009163904A Division JP2010004050A (ja) 2006-09-13 2009-07-10 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPWO2008032620A1 JPWO2008032620A1 (ja) 2010-01-21
JP4802246B2 true JP4802246B2 (ja) 2011-10-26

Family

ID=39183681

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2008534303A Expired - Fee Related JP4802246B2 (ja) 2006-09-13 2007-09-05 半導体装置
JP2009163904A Pending JP2010004050A (ja) 2006-09-13 2009-07-10 半導体装置の製造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2009163904A Pending JP2010004050A (ja) 2006-09-13 2009-07-10 半導体装置の製造方法

Country Status (9)

Country Link
US (1) US8008767B2 (https=)
EP (1) EP1956648A4 (https=)
JP (2) JP4802246B2 (https=)
KR (2) KR101195408B1 (https=)
CN (1) CN101356643B (https=)
CA (1) CA2630824C (https=)
SG (1) SG160403A1 (https=)
TW (1) TW200830486A (https=)
WO (1) WO2008032620A1 (https=)

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JP2011222946A (ja) * 2010-03-26 2011-11-04 Sumitomo Bakelite Co Ltd 回路基板、半導体装置、回路基板の製造方法および半導体装置の製造方法
JP5593897B2 (ja) * 2010-07-12 2014-09-24 住友ベークライト株式会社 回路基板、半導体装置、回路基板の製造方法および半導体装置の製造方法
JP2012049423A (ja) * 2010-08-30 2012-03-08 Sumitomo Bakelite Co Ltd 回路基板、半導体装置、回路基板の製造方法および半導体装置の製造方法
KR101455951B1 (ko) 2010-09-30 2014-10-28 히타치가세이가부시끼가이샤 접착제 조성물, 반도체 장치의 제조 방법 및 반도체 장치
KR101464454B1 (ko) * 2010-10-22 2014-11-21 히타치가세이가부시끼가이샤 접착제 조성물, 반도체 장치의 제조 방법 및 반도체 장치
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US9155191B2 (en) 2013-05-31 2015-10-06 Qualcomm Incorporated Substrate comprising inorganic material that lowers the coefficient of thermal expansion (CTE) and reduces warpage
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US9778510B2 (en) * 2013-10-08 2017-10-03 Samsung Electronics Co., Ltd. Nanocrystal polymer composites and production methods thereof
KR20160140605A (ko) * 2014-03-28 2016-12-07 훈츠만 어드밴스트 머티리얼스 라이센싱 (스위처랜드) 게엠베하 섬유 강화된 에폭시 복합 물품의 제조 방법, 얻어진 복합 물품 및 그의 용도
JP6212011B2 (ja) * 2014-09-17 2017-10-11 東芝メモリ株式会社 半導体製造装置
TWI526129B (zh) 2014-11-05 2016-03-11 Elite Material Co Ltd Multilayer printed circuit boards with dimensional stability
US20170287838A1 (en) * 2016-04-02 2017-10-05 Intel Corporation Electrical interconnect bridge
JP6793517B2 (ja) * 2016-10-17 2020-12-02 株式会社ダイセル シート状プリプレグ
US20180130768A1 (en) * 2016-11-09 2018-05-10 Unisem (M) Berhad Substrate Based Fan-Out Wafer Level Packaging
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Also Published As

Publication number Publication date
EP1956648A1 (en) 2008-08-13
JPWO2008032620A1 (ja) 2010-01-21
CA2630824A1 (en) 2008-03-20
SG160403A1 (en) 2010-04-29
WO2008032620A1 (en) 2008-03-20
CN101356643B (zh) 2012-04-25
TW200830486A (en) 2008-07-16
KR101195408B1 (ko) 2012-10-29
KR20080091086A (ko) 2008-10-09
US20090267212A1 (en) 2009-10-29
CA2630824C (en) 2013-01-08
TWI374523B (https=) 2012-10-11
US8008767B2 (en) 2011-08-30
JP2010004050A (ja) 2010-01-07
KR20110000761A (ko) 2011-01-05
EP1956648A4 (en) 2011-09-21
CN101356643A (zh) 2009-01-28

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