JP4644469B2 - 半導体チップのフリップチップ実装方法およびその実装装置 - Google Patents
半導体チップのフリップチップ実装方法およびその実装装置 Download PDFInfo
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Description
上記従来の半導体チップの接合方法は、いずれも加熱工程が必要となり、装置が大掛かりとなる課題がある。また、半導体チップと基板との熱膨張率に差があることから、両者間に位置ずれが生じやすく、半導体チップの接合の位置精度が悪くなるという課題がある。
しかし、この実装方法においても、接着剤の周囲は紫外線照射によって硬化されるが、半導体チップと基板との間の接着剤には紫外線が届かないため未硬化であり、結局、その後の適当な時期に加熱して接着剤を完全に硬化させる工程が不可欠となるという課題がある。
そこで、本発明は、上記課題を解決すべく成され、その目的とするところは、常温での接合が可能であり、大掛かりな加熱装置を必要とせず、耐熱性の低い半導体チップの接合も行え、また実装の位置精度も向上する半導体チップのフリップチップ実装方法およびその実装装置を提供するにある。
上記のように、本発明では、半導体チップのバンプと基板のパッドとを当接させて半導体チップが基板にフリップチップ接合され、半導体チップと基板との間に絶縁性接着剤が充填される半導体チップのフリップチップ実装方法において、半導体チップの基板への搭載前もしくは接合時に、絶縁性接着剤に熱以外の硬化トリガーを与える工程と、該硬化トリガーを与えたことにより絶縁性接着剤の硬化が進行する間に、半導体チップのバンプを基板のパッドに圧接方法もしくは金属間結合方法により接合する工程とを含むことを特徴としている。
符号12は超音波接合部である。この超音波接合部12は、基板が搬入されるステージ13と、ステージ13の上方に配置され、下面側で半導体チップを保持し、ステージ13に対して相対的に接離動可能な接合用ツール14とを有する。
ステージ13は、公知のXYテーブルからなり、図示されない駆動部により、水平面内において任意の方向に移動可能となっている。またこのXYテーブルは、図示されない回転駆動部により、鉛直腺を中心として水平面内で回転可能に構成されている。
20は加圧機構16を制御する加圧制御部、21は超音波発振器、22は画像処理部、23はカメラ装置18を移動させる移動装置、24は移動装置23を移動制御する移動制御部、25はステージ13の移動・回転を制御するアライメント制御部、26はメインコントローラである。
30は塗布部である。塗布部30では、基板に、紫外線照射を硬化トリガーとする遅延硬化型の絶縁性接着剤を塗布する。基板は基板搬送コンベヤ(搬入部)31により塗布部30内に搬入され、塗布部30内で絶縁性接着剤が塗布され、さらに絶縁性接着剤が塗布された基板は基板搬送コンベヤ31によりステージ13上に搬入される。
塗布部30は、ディスペンサ32と、回転テーブル(図示せず)とを有するスピンコート機構などにより構成できる。しかし、このスピンコート機構に限定されないのはもちろんである。
半導体チップは、トレー(図示せず)に多数収納されてチップ供給ステージ36に供給される。トレー内に収納されている半導体チップは、上下動かつ水平動可能な吸着ノズル37を備えたチップハンドラ38によって、1個ずつ吸着ノズル37に吸着保持されて、チップ反転ステージ40の載置台41上に搬入される。
なお、吸着ノズル43を、図示しない機構により、吸着アーム42に対してその垂直方向に突出入(移動)可能に設けることによって、載置台41およびホーン15との間での半導体チップの受け渡しをスムーズに行える。
図3(a)に示すように、塗布部30において、基板50上に遅延硬化型接着剤51を塗布する。
遅延硬化型接着剤51が塗布された基板50は、基板搬送コンベヤ31によって塗布部30からステージ13上に搬入される。
そして、ステージ13に搬入された基板50とホーン15に保持された半導体チップ52との間にカメラ装置18が進入し、前記のようにして基板50と半導体チップ52との位置合わせが行われる。
遅延硬化型接着剤51は除々に硬化する。
このようにして、低温(常温)での半導体チップ52の接合、および遅延硬化型接着剤51の硬化が行える。この状態を図3(d)に示す。
このように、半導体チップ52の接合の際、加熱工程がないから、熱膨張係数の異なる半導体チップ52と基板50であっても熱伸縮がなく、したがって接合部が剥がれたりする不具合が生じない。また、半導体チップ接合の位置精度もよくなる。加熱装置が必要でなく、装置の簡略化が図れる。また耐熱性の低い半導体チップ52の接合も可能となる。
なお、上記実施例では、半導体チップ52に超音波振動を与えて接合を行ったが、超音波以外の手段によって半導体チップ52のバンプ52aと基板50のパッド間の金属間結合(金属表面活性接合を含む)を行ってもよい。
この場合には、図4に示すように、UV照射装置55を塗布部30と超音波接合部12との間に配置し、塗布部30で遅延硬化型接着剤51が塗布されて搬送コンベヤ31上を搬送されてくる基板50に紫外線を照射するようにするとよい。
この2液性硬化樹脂を用いる場合には、塗布部30に、2液性硬化樹脂の一方の液を塗布するディスペンサと、他方の液を塗布するディスペンサの2つのディスペンサ(図示せず)を配置する。
このようにして2液性硬化樹脂を塗布した基板50を超音波接合部12のステージ13上に搬入し、前記と同様にして半導体チップ52を基板50上に接合するのである。
この場合も、半導体チップ52の接合は、超音波接合以外の金属間結合、あるいは圧接方法によっても行える。いずれの場合も、常温で半導体チップ52の接合が行える。
12 超音波接合部
13 ステージ
14 接合ツール
15 ホーン
16 加圧機構
18 カメラ装置
20 加圧制御部
21 超音波発振器
22 画像処理部
23 移動装置
24 移動制御部
25 アライメント制御部
26 メインコントローラ
30 塗布部
31 基板搬送コンベヤ(搬入部)
32 ディスペンサ
35 半導体チップの搬入部
36 チップ供給ステージ
37 吸着ノズル
38 チップハンドラ
40 チップ反転ステージ
41 載置台
42 吸着アーム
43 吸着ノズル
44 反転装置
50 基板
51 遅延硬化型接着剤
52 半導体チップ
55 UV照射装置
Claims (1)
- 半導体チップが基板にフリップチップ接合され、半導体チップと基板との間に絶縁性接着剤が充填される半導体チップのフリップチップ実装装置において、
基板が搬入されるステージと、
基板に紫外線照射を硬化トリガーとする遅延硬化型の絶縁性接着剤を塗布する塗布部と、
該塗布部から、絶縁性接着剤が塗布された基板を前記ステージ上に搬入する搬入部と、
半導体チップの基板への搭載前に、基板に塗布された絶縁性接着剤に紫外線を照射するUV照射部と、
前記ステージの上方に配置され、下面側で半導体チップを保持し、ステージに対して相対的に接離動し、半導体チップを前記基板に押圧し、前記紫外線照射により硬化トリガーを与えたことによる絶縁性接着剤の硬化が進行する間に、半導体チップのバンプを基板のパッドに接合する接合用ツールと、
前記ステージと接合用ツールとの間に進入可能で、ステージ上に搬入された基板と、接合用ツールに保持された半導体チップの位置を検出する位置認識用のカメラ装置とを具備し、
該カメラ装置の位置認識用のカメラ光源に紫外線を含む光源が用いられ、該カメラ装置が前記UV照射部を兼用し、基板の位置の認識動作中に硬化トリガーとなる紫外線を基板に塗布された絶縁性接着剤に照射することを特徴とする半導体チップのフリップチップ実装装置。
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JP2004325277A JP4644469B2 (ja) | 2004-11-09 | 2004-11-09 | 半導体チップのフリップチップ実装方法およびその実装装置 |
TW094105798A TWI259516B (en) | 2004-11-09 | 2005-02-25 | Method of flip-chip mounting a semiconductor chip and mounting apparatus using the same |
US11/066,483 US7416921B2 (en) | 2004-11-09 | 2005-02-28 | Method for flip-chip mounting utilizing a delay curing-type adhesive with two-part hardening resin |
CNB2005100590546A CN100452333C (zh) | 2004-11-09 | 2005-03-21 | 倒装式安装半导体芯片的方法及使用该方法的安装设备 |
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CN102550135B (zh) * | 2009-07-24 | 2015-06-17 | 汉高知识产权控股有限责任公司 | 连接电极的方法及其所用的粘合组合物 |
DE102010031939B4 (de) * | 2010-07-22 | 2012-05-24 | Asm Assembly Systems Gmbh & Co. Kg | Dispensersystem für einen Bestückautomaten, Bestückautomat sowie Verfahren zum Aufbringen eines Dispensermediums auf Bauelemente |
CN102522348B (zh) * | 2012-01-05 | 2014-06-04 | 上海共晶电子科技有限公司 | 一种用于led芯片固晶的共晶焊机 |
JP6156377B2 (ja) * | 2012-07-05 | 2017-07-05 | ソニー株式会社 | 積層構造体の製造方法 |
CN105047570B (zh) * | 2015-06-18 | 2018-03-02 | 苏州奇泰电子有限公司 | 一种芯片bga封装加固方法 |
KR102425309B1 (ko) * | 2016-10-12 | 2022-07-26 | 삼성전자주식회사 | 본딩 헤드와 스테이지 사이의 평행도 보정 장치 및 이를 포함하는 칩 본더 |
JP6722744B2 (ja) * | 2018-11-15 | 2020-07-15 | モメンティブ・パフォーマンス・マテリアルズ・ジャパン合同会社 | 接着剤塗布装置 |
Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61202492A (ja) * | 1985-03-05 | 1986-09-08 | 三菱電機株式会社 | 電子部品の接着方法 |
JPH0442550A (ja) * | 1990-06-08 | 1992-02-13 | Matsushita Electric Ind Co Ltd | 電子部品の実装方法 |
JPH0482240A (ja) * | 1990-07-24 | 1992-03-16 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JPH05235096A (ja) * | 1991-07-18 | 1993-09-10 | Oki Electric Ind Co Ltd | 電子部品の基板への実装方法 |
JPH07302973A (ja) * | 1994-03-10 | 1995-11-14 | Matsushita Electric Ind Co Ltd | 電子部品の製造方法 |
JPH11120630A (ja) * | 1997-10-14 | 1999-04-30 | Sony Disc Technology:Kk | 光ディスクの製造方法 |
JPH11183918A (ja) * | 1997-12-25 | 1999-07-09 | Sharp Corp | 液晶表示素子及びその製造方法 |
JP2000151057A (ja) * | 1998-11-09 | 2000-05-30 | Hitachi Ltd | 電子部品実装構造体およびその製造方法並びに無線icカードおよびその製造方法 |
JP2000164633A (ja) * | 1998-11-30 | 2000-06-16 | Matsushita Electric Ind Co Ltd | 半導体実装方法および半導体実装装置 |
JP2003262701A (ja) * | 2002-03-08 | 2003-09-19 | Kanegafuchi Chem Ind Co Ltd | 光学材料用組成物、光学材料、それを用いた液晶表示装置、発光ダイオードおよびそれらの製造方法 |
JP2003289088A (ja) * | 2002-03-28 | 2003-10-10 | Toray Eng Co Ltd | チップ実装方法 |
JP2004088041A (ja) * | 2002-07-01 | 2004-03-18 | Toray Eng Co Ltd | 実装方法および実装装置 |
JP2004331910A (ja) * | 2003-05-12 | 2004-11-25 | Seiko Epson Corp | 異方導電性接着剤、実装方法、電気光学装置モジュールおよび電子機器 |
JP2005311288A (ja) * | 2004-03-26 | 2005-11-04 | Fuji Photo Film Co Ltd | 基板接合装置及び方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3853578A (en) * | 1972-09-08 | 1974-12-10 | Senri Kikaku Sogo Kk | Method of manufacturing decorative boards with depression patterns |
US4536524A (en) * | 1981-04-21 | 1985-08-20 | Capsulated Systems, Inc. | Microencapsulated epoxy adhesive system |
JPS6445136A (en) * | 1987-08-13 | 1989-02-17 | Konishiroku Photo Ind | Method of mounting semiconductor element |
JP2833111B2 (ja) * | 1989-03-09 | 1998-12-09 | 日立化成工業株式会社 | 回路の接続方法及びそれに用いる接着剤フィルム |
US5579573A (en) * | 1994-10-11 | 1996-12-03 | Ford Motor Company | Method for fabricating an undercoated chip electrically interconnected to a substrate |
US6326329B1 (en) * | 1996-02-21 | 2001-12-04 | Asec Manufacturing | Highly dispersed substantially uniform mixed-metal-oxide composite supports for exhaust conversion catalysts |
JP3611438B2 (ja) * | 1997-12-24 | 2005-01-19 | Tdk株式会社 | 光記録媒体及びその製造方法 |
JP2001308145A (ja) * | 2000-04-25 | 2001-11-02 | Fujitsu Ltd | 半導体チップの実装方法 |
JP2002026070A (ja) | 2000-07-04 | 2002-01-25 | Toshiba Corp | 半導体装置およびその製造方法 |
JP3922882B2 (ja) * | 2000-12-28 | 2007-05-30 | 東レエンジニアリング株式会社 | チップの実装方法 |
-
2004
- 2004-11-09 JP JP2004325277A patent/JP4644469B2/ja not_active Expired - Fee Related
-
2005
- 2005-02-25 TW TW094105798A patent/TWI259516B/zh not_active IP Right Cessation
- 2005-02-28 US US11/066,483 patent/US7416921B2/en not_active Expired - Fee Related
- 2005-03-21 CN CNB2005100590546A patent/CN100452333C/zh not_active Expired - Fee Related
Patent Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61202492A (ja) * | 1985-03-05 | 1986-09-08 | 三菱電機株式会社 | 電子部品の接着方法 |
JPH0442550A (ja) * | 1990-06-08 | 1992-02-13 | Matsushita Electric Ind Co Ltd | 電子部品の実装方法 |
JPH0482240A (ja) * | 1990-07-24 | 1992-03-16 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JPH05235096A (ja) * | 1991-07-18 | 1993-09-10 | Oki Electric Ind Co Ltd | 電子部品の基板への実装方法 |
JPH07302973A (ja) * | 1994-03-10 | 1995-11-14 | Matsushita Electric Ind Co Ltd | 電子部品の製造方法 |
JPH11120630A (ja) * | 1997-10-14 | 1999-04-30 | Sony Disc Technology:Kk | 光ディスクの製造方法 |
JPH11183918A (ja) * | 1997-12-25 | 1999-07-09 | Sharp Corp | 液晶表示素子及びその製造方法 |
JP2000151057A (ja) * | 1998-11-09 | 2000-05-30 | Hitachi Ltd | 電子部品実装構造体およびその製造方法並びに無線icカードおよびその製造方法 |
JP2000164633A (ja) * | 1998-11-30 | 2000-06-16 | Matsushita Electric Ind Co Ltd | 半導体実装方法および半導体実装装置 |
JP2003262701A (ja) * | 2002-03-08 | 2003-09-19 | Kanegafuchi Chem Ind Co Ltd | 光学材料用組成物、光学材料、それを用いた液晶表示装置、発光ダイオードおよびそれらの製造方法 |
JP2003289088A (ja) * | 2002-03-28 | 2003-10-10 | Toray Eng Co Ltd | チップ実装方法 |
JP2004088041A (ja) * | 2002-07-01 | 2004-03-18 | Toray Eng Co Ltd | 実装方法および実装装置 |
JP2004331910A (ja) * | 2003-05-12 | 2004-11-25 | Seiko Epson Corp | 異方導電性接着剤、実装方法、電気光学装置モジュールおよび電子機器 |
JP2005311288A (ja) * | 2004-03-26 | 2005-11-04 | Fuji Photo Film Co Ltd | 基板接合装置及び方法 |
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TW200616022A (en) | 2006-05-16 |
CN100452333C (zh) | 2009-01-14 |
TWI259516B (en) | 2006-08-01 |
CN1773687A (zh) | 2006-05-17 |
US7416921B2 (en) | 2008-08-26 |
JP2006135248A (ja) | 2006-05-25 |
US20060099809A1 (en) | 2006-05-11 |
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