JP4561932B2 - 無線icデバイス - Google Patents
無線icデバイス Download PDFInfo
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- JP4561932B2 JP4561932B2 JP2009523666A JP2009523666A JP4561932B2 JP 4561932 B2 JP4561932 B2 JP 4561932B2 JP 2009523666 A JP2009523666 A JP 2009523666A JP 2009523666 A JP2009523666 A JP 2009523666A JP 4561932 B2 JP4561932 B2 JP 4561932B2
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- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
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- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
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- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
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- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
- G06K19/07756—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna the connection being non-galvanic, e.g. capacitive
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- H01Q1/2208—Supports; Mounting means by structural association with other equipment or articles associated with components used in interrogation type services, i.e. in systems for information exchange between an interrogator/reader and a tag/transponder, e.g. in Radio Frequency Identification [RFID] systems
- H01Q1/2225—Supports; Mounting means by structural association with other equipment or articles associated with components used in interrogation type services, i.e. in systems for information exchange between an interrogator/reader and a tag/transponder, e.g. in Radio Frequency Identification [RFID] systems used in active tags, i.e. provided with its own power source or in passive tags, i.e. deriving power from RF signal
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- H—ELECTRICITY
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- H—ELECTRICITY
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- General Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Details Of Aerials (AREA)
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- Transmitters (AREA)
- Support Of Aerials (AREA)
- Devices For Checking Fares Or Tickets At Control Points (AREA)
- Credit Cards Or The Like (AREA)
- Junction Field-Effect Transistors (AREA)
Description
(a)整合部が主アンテナと同一基板上に隣接して形成されているため、無線タグのサイズが大きくなる。
(1)無線ICチップと、放射電極を有する放射板と、無線ICチップと放射電極との間のインピーダンス整合をとる整合回路を有する機能基板とを備える。機能基板は、前記放射電極と結合する外部結合電極を有する。整合回路は、機能基板内に構成されたインダクタンス素子および/またはキャパシタンス素子を含む。無線ICチップと機能基板との接続部から無線ICチップ側を見たインピーダンスのリアクタンス成分と、無線ICチップと機能基板との接続部から放射電極側を見たインピーダンスのリアクタンス成分とが共役の関係になるように整合回路を定める。
(3)前記機能基板は、電極パターンを形成した誘電体層を積層した多層基板で構成する。
(1)小型の機能基板上に無線ICチップを搭載することになるので従来のIC実装機等が使用でき、実装コストを低減できる。また、使用する無線ICチップを入出力インピーダンスの異なるものに変更し、RFIDの周波数特性が変わっても、機能基板内の整合回路の設計を変更するだけでよく、設計コストを大幅に低減できる。
(14)前記整合回路を機能基板内に構成された素子と機能基板上に実装された素子とで構成することにより、機能基板上にインダクタンス値の大きなチップインダクタやキャパシタンス値の大きなチップコンデンサを実装して機能基板内の素子値を小さくすることで、機能基板のサイズを小さくすることができる。
第1の実施形態に係る無線ICデバイスについて図2〜図5を参照して説明する。
図2(A)は第1の実施形態に係る無線ICデバイスの主要部の断面図、図2(B)はその主要部の平面図である。
図6は第2の実施形態に係る無線ICデバイスにおける放射板上面の主要部の電極パターンを示す平面図である。放射板の上面には長尺状の放射電極32a,32bを形成するとともに、それらの内側の端部から所定距離離れた部分同士を接続する整合用電極34を形成している。
図7は第3の実施形態に係る無線ICデバイスにおける放射板上面の主要部の電極パターンを示す平面図である。放射板の上面にはループ状放射電極36を形成している。このループ状放射電極36は、その両端部を互いに対向するとともに所定の領域を周回するように形成している。このループ状放射電極36の互いに対向する両端部に機能基板20の容量結合電極24a,24bが対向するように機能基板20を実装する。
図8・図9は第4の実施形態に係る幾つかの無線ICデバイスの構成を示す断面図である。これらの図において放射板30および無線ICチップ1の構成については第1〜第3の実施形態の場合と同様である。この第4の実施形態では機能基板に構成する整合回路の幾つかの例について示すものである。
図10は第5の実施形態に係る無線ICデバイスの主要部の断面図である。
図10に示すように、機能基板20の上面に無線ICチップ1を搭載し、この機能基板20の上面で無線ICチップ1の全体を樹脂41で覆うとともにその上面を平坦にしている。その他の構成は第1の実施形態で示したものと同様である。
図11および図12は第6の実施形態に係る無線ICデバイスの主要部の断面図である。
図11に示す例では、機能基板128を多層基板21で構成するとともに、多層基板21の下面に露出するように容量結合電極224a,224bを形成している。
図13は第7の実施形態に係る無線ICデバイスの主要部の断面図である。図13において機能基板220は多層基板で構成し、その内部に電極によるインダクタおよび容量結合電極を構成するとともに、上面に個別部品であるチップインダクタ51を搭載している。この機能基板220の内部の電極による素子と外部のチップ部品による素子とによって整合回路を構成している。
第8の実施形態に係る無線ICデバイスについて図14〜図16を参照して説明する。
図14はその無線ICデバイスの主要部の断面図である。放射板130は基材31の上面に放射電極32a,32b,32cを形成している。機能基板221の内部にはループ状外部結合電極226を構成していて、このループ状外部結合電極226が放射電極32cと磁界結合するように、機能基板221と無線ICチップ1からなる電磁結合モジュールを放射板130に実装している。
図17は第9の実施形態に係る無線ICデバイスの主要部の断面図である。この例では機能基板222に、放射板130のループ状の放射電極32cと磁界結合する二重螺旋外部結合電極227を構成している。
図19は第10の実施形態に係る無線ICデバイスで用いる機能基板の構成を示す平面図である。この例では機能基板223の上面にのみ電極パターンを形成している。図に示すように機能基板223の上面に二重螺旋外部結合電極228を形成するとともに、その内側の両端部を無線ICチップ1の実装電極22a,22bとして形成している。また実装電極22a,22bの近傍に他の実装電極22c,22dを形成している。これらの実装電極22a〜22dに無線ICチップ1を実装することによって電磁結合モジュールを構成する。
Claims (15)
- 無線ICチップと、
放射電極を有する放射板と、
前記無線ICチップと前記放射電極との間のインピーダンス整合をとる整合回路を有する機能基板とを備え、
前記機能基板は前記放射電極と結合する外部結合電極を有し、
前記整合回路は、前記機能基板内に構成されたインダクタンス素子および/またはキャパシタンス素子を含み、
前記無線ICチップと前記機能基板との接続部から前記無線ICチップ側を見たインピーダンスのリアクタンス成分と、前記無線ICチップと前記機能基板との接続部から前記放射電極側を見たインピーダンスのリアクタンス成分とが共役の関係になるように前記整合回路を定めた無線ICデバイス。 - 前記外部結合電極は前記放射電極と電磁界結合する、請求項1に記載の無線ICデバイス。
- 前記機能基板は、電極パターンを形成した誘電体層を積層した多層基板で構成した請求項1または2に記載の無線ICデバイス。
- 前記放射電極は長尺状であり、前記外部結合電極は、前記機能基板を区分する2つの領域をそれぞれ占有する第1・第2の外部結合電極からなり、前記放射電極の2つの端部が前記第1・第2の外部結合電極にそれぞれ結合する請求項1〜3のいずれかに記載の無線ICデバイス。
- 放射電極は両端部が互いに対向するループ状をなし、その両端部のうち一方端部に前記第1の外部結合電極が結合し、他方端部に前記第2の外部結合電極が結合する請求項1〜3のいずれかに記載の無線ICデバイス。
- 前記放射電極の2つの端部近傍同士を接続する整合用電極と、前記放射電極の2つの端部から前記整合用電極に接続される部分とで補助整合回路部を構成する、請求項1〜5のいずれかに記載の無線ICデバイス。
- 前記インダクタンス素子はループ形状をなし、前記ループ形状の巻回軸は前記放射電極の形成領域と交わるように形成されている請求項1〜6のいずれかに記載の無線ICデバイス。
- 前記外部結合電極は、前記放射電極と対向して当該放射電極と容量結合する容量結合電極である請求項1〜7のいずれかに記載の無線ICデバイス。
- 前記容量結合電極は前記放射板に対向する前記機能基板の面に形成され、前記放射電極は前記機能基板に対向する面に形成され、前記容量結合電極と前記放射電極とが対向した状態で、前記放射板に前記機能基板を貼着した請求項8に記載の無線ICデバイス。
- 前記機能基板の外部結合電極は、前記機能基板の前記放射板に対向する面以外の面にまで延出形成されている請求項8に記載の無線ICデバイス。
- 前記外部結合電極は、前記放射電極と磁界結合するループをなす請求項1〜3のいずれかに記載の無線ICデバイス。
- 前記インダクタンス素子のうち少なくとも一つは2本の異なる線状電極をそれぞれ隣接させた二重の螺旋形状をなし、それらの一端同士が電気的に接続されている請求項11に記載の無線ICデバイス。
- 前記放射電極は、前記機能基板の前記インダクタンス素子と電磁界結合するループをなす請求項11または12に記載の無線ICデバイス。
- 前記整合回路は、前記機能基板内に構成された素子と前記機能基板上に実装された素子とで構成されている請求項1〜13のいずれかに記載の無線ICデバイス。
- 前記無線ICチップ、前記機能基板、または前記放射板の少なくとも一つを覆う保護膜を備えた請求項1〜14のいずれかに記載の無線ICデバイス。
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Also Published As
Publication number | Publication date |
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WO2009011376A1 (ja) | 2009-01-22 |
KR101006808B1 (ko) | 2011-01-10 |
CN101578736B (zh) | 2013-02-27 |
EP2086052B1 (en) | 2012-05-02 |
US20090262041A1 (en) | 2009-10-22 |
ATE556466T1 (de) | 2012-05-15 |
EP2086052A1 (en) | 2009-08-05 |
EP2086052A4 (en) | 2010-08-11 |
CN101578736A (zh) | 2009-11-11 |
US20140319224A1 (en) | 2014-10-30 |
US9558440B2 (en) | 2017-01-31 |
KR20090086263A (ko) | 2009-08-11 |
JPWO2009011376A1 (ja) | 2010-09-24 |
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