JP4507232B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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JP4507232B2
JP4507232B2 JP2003079290A JP2003079290A JP4507232B2 JP 4507232 B2 JP4507232 B2 JP 4507232B2 JP 2003079290 A JP2003079290 A JP 2003079290A JP 2003079290 A JP2003079290 A JP 2003079290A JP 4507232 B2 JP4507232 B2 JP 4507232B2
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Japan
Prior art keywords
film
layer
insulating film
semiconductor device
gate insulating
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JP2003079290A
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JP2004288885A (ja
Inventor
浩二 富永
邦彦 岩本
哲二 安田
俊秀 生田目
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Rohm Co Ltd
National Institute of Advanced Industrial Science and Technology AIST
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Rohm Co Ltd
National Institute of Advanced Industrial Science and Technology AIST
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Application filed by Rohm Co Ltd, National Institute of Advanced Industrial Science and Technology AIST filed Critical Rohm Co Ltd
Priority to JP2003079290A priority Critical patent/JP4507232B2/ja
Priority to US10/550,645 priority patent/US8044452B2/en
Priority to EP04721671A priority patent/EP1610393A4/en
Priority to PCT/JP2004/003631 priority patent/WO2004086510A1/ja
Priority to KR1020057017078A priority patent/KR100722623B1/ko
Priority to TW093107465A priority patent/TW200428657A/zh
Publication of JP2004288885A publication Critical patent/JP2004288885A/ja
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Description

【０００１】
【発明の属する技術分野】
この発明は、半導体装置の製造方法に関し、特に、シリコン基板に金属酸化膜等をゲート絶縁膜として形成したＭＩＳ（Ｍｅｔａｌ Ｉｎｓｕｌａｔｏｒ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ）型トランジスタとしての半導体装置の製造方法に関する。
【０００２】
【従来技術】
【特許文献１】
特開２００２−４３５６５号公報
近年、半導体の高集積化に伴い、ＭＩＳ型トランジスタのゲート絶縁膜には、従来のシリコン基板（Ｓｉ基板）を酸化させたＳｉＯ2 から、より誘電体の大きな材料（Ｈｉｇｈ−ｋ）が用いられるようになってきている。しかしながら、Ｈｉｇｈ−ｋ材料は、Ｓｉ基板と相互拡散してしまい、誘電率が小さくなり、しかもトランジスタ作成プロセス時の熱処理によって、その拡散層がより増加してしまうといった課題があった。
【０００３】
上述のような課題を解決するために、例えば、前記特許文献１に記載される技術が提案されている。すなわち、この技術は、Ｓｉ基板とＨｉｇｈ−ｋ材料の相互拡散を防ぐため、Ｓｉを窒化させたＳｉ3 Ｎ4 膜をＳｉ基板に一旦形成した後、Ｈｉｇｈ−ｋ膜を形成するものである。
【０００４】
【発明が解決しようとする課題】
しかしながら、前記特許文献１の記載の技術では、窒素がＳｉ界面近くに存在することによって、トランジスタ特性が劣化してしまうといった問題が発生しており、高品位のＭＩＳ型トランジスタを必ずしも確実に得られなかった。
【０００５】
この発明は、上述の事柄に留意してなされたもので、その目的は、ゲート絶縁膜に起因するトランジスタ特性の劣化や界面層の増加を抑制した高品位の半導体装置の製造方法を提供することである。
【０００６】
【課題を解決するための手段】
上記目的を達成するため、この発明の半導体装置の製造方法は、シリコン基板の一つの面に初期層を形成し、この初期層の表面に拡散抑制層を形成した後、熱処理を施して前記初期層をシリコン基板と相互拡散させた界面層とし、その後、前記拡散抑制層の表面に高誘電率絶縁膜を形成することを特徴としている（請求項１）。
【０００７】
【０００８】
【０００９】
【００１０】
前記半導体装置の製造方法によれば、高品位の半導体装置を確実に得ることができる。
【００１１】
【００１２】
【００１３】
【発明の実施の形態】
発明の実施の形態を図面を参照しながら説明する。まず、図１は、この発明の半導体装置の製造方法によって得られたＭＩＳ型トランジスタ１の構成を概略的に示すもので、この図において、２はＳｉ単結晶基板（以下、単にＳｉ基板という）で、その抵抗率は例えば０．０１〜１５Ω・ｃｍである。３は素子間を分離させるための素子分離酸化膜で、Ｓｉ基板１を熱酸化させて形成される。４はゲート絶縁膜で、界面層５、拡散抑制層６およびＨｉｇｈ−ｋ膜７よりなる。このゲート絶縁膜４の形成方法については、後で詳しく説明する。
【００１４】
８はゲート絶縁膜４の上面に形成されるゲート電極で、例えば多結晶Ｓｉ膜や多結晶ＳｉＧｅ膜またはゲート絶縁膜４と反応しないＰｔ（白金）などの貴金属やＴｉＮ、ＴａＮなどの高融点金属よりなる。９はチャンネル領域で、ｎチャンネルにはＰ（リン）を、ｐチャンネルにはＢ（ボロン）をそれぞれ注入し、８００℃〜１０００℃の温度で１０〜３０分間熱処理を行って活性化させる。１０は層間絶縁膜で、例えばＳｉＯ2 であり、ＣＶＤ（Ｃｈｅｍｉｃａｌ Ｖａｐｏｒ Ｄｅｐｏｓｉｔｉｏｎ）法などで形成される。１１は引き出し電極で、例えばＡｌよりなり、ソース・ドレイン電極となる。なお、パターニングは、例えばフォトリソグラフィの技術によって行われる。
【００１５】
次に、前記ゲート絶縁膜４を形成する手法について、図２を参照しながら説明する。
【００１６】
（１１）まず、図２（Ａ）に示すように、適宜の厚さ（例えば、５００μｍ程度）のＳｉ単結晶板からなるＳｉ基板２の一つの面２ａにＳｉと相互拡散させるための初期層（第１層ともいう）５’として、ＨｆＯ2 （酸化ハフニア）よりなる薄膜を約０．５ｎｍの厚みで形成する。前記初期層５’の成膜の手段としては、ＣＶＤ（Ｃｈｅｍｉｃａｌ Ｖａｐｏｒ Ｄｅｐｏｓｉｔｉｏｎ）法、ＡＬＤ法、スパッタ法など各種の公知の手法がある。
【００１７】
（１２）次に、図２（Ｂ）に示すように、初期層５’の上面に拡散抑制膜６として、金属窒化膜としてのＡｌＮ膜を０．５〜５ｎｍの厚みで、または、金属酸窒化膜としてのＡｌＯx Ｎy 膜（ｙ＞０）を、０．５〜５ｎｍの厚みで形成する。この場合、ＡｌＮ膜は、ＴＭＡ（トリメチルアルミニウム：Ａｌ（ＣＨ3 ）3 ）とアンモニアガス（ＮＨ3 ）との交互原料供給によるＡＬＤ法による成膜であっても、窒素含有ガス雰囲気中スパッタ法であってもよい。また、ＡｌＯx Ｎy 膜は、ＴＭＡと水蒸気ガス（Ｈ2 Ｏ）との交互原料供給によるＡＬＤ法によって成膜したＡｌ2 Ｏ3 膜をＮＨ3 ガス雰囲気中の熱処理によって作成したＡｌＯx Ｎy であっても、前記手法で成膜したＡｌ2 Ｏ3 膜をプラズマ窒素ガス雰囲気中で処理したＡｌＯx Ｎy であってもよい。
【００１８】
（１３）次に、熱処理（約８００℃）によって、Ｓｉ基板２中のＳｉと初期層５’としてＨｆＯ2 を相互拡散させ、図２（Ｃ）に示すように、界面層としてのＨｆＳｉＯ4 （ハフニアシリケート、）５を形成する。
【００１９】
（１４）その後、拡散抑制膜６の上面にＨｉｇｈ−ｋ膜７として、ＨｆＯ2 膜を約５ｎｍの厚みで成膜することにより、図２（Ｄ）に示すように、Ｓｉ基板２の一方の面２ａ上に、界面層５、拡散抑制膜６およびＨｉｇｈ−ｋ膜７の三層構造を有するゲート絶縁膜４を形成することができる。前記Ｈｉｇｈ−ｋ膜としてのＨｆＯ2 膜７の成膜は、ＣＶＤ法、ＡＬＤ法あるいはスパッタ法のいずれで行ってもよい。
【００２０】
上述のようにして形成された半導体装置１のゲート絶縁膜４は、トランジスタ作製のプロセス中の熱処理によっても、電気絶縁性に優れた拡散抑制膜６が界面層５とＨｉｇｈ−ｋ膜７との間に形成されているので、界面層５がその厚みを増大させることはない。また、前記拡散抑制膜６が存在することにより、Ｈｉｇｈ−ｋ膜７中の酸素が界面層５側に拡散するのが抑制され、その結果、Ｈｉｇｈ−ｋ性が損なわれるといったことが効果的に防止される。したがって、上記半導体装置１のゲート絶縁膜４は、高品位であるとともに、その製造方法は、高品位の半導体装置１のゲート絶縁膜４を確実に製造することができる。
【００２１】
なお、上述の実施の形態においては、Ｈｉｇｈ−ｋ膜７をＨｆＯ2 膜で形成していたが、このＨｆＯ2 膜に代えて、ＺｒＯ2 やＴｉＯ2 とし、界面層５をＺｒＳｉＯ4 、ＴｉＳｉＯ4 でそれぞれ形成してあってもよく、また、ＨｆＯ2 とＡｌ2 Ｏ3 などＨｉｇｈ−ｋ膜複合物（この場合、ＨｆＡｌＯx ）で形成し、初期層５’をＨｆＯ2 とし、界面層５をＨｆＳｉＯ4 とし、高誘電率絶縁膜であるＨｉｇｈ−ｋ膜７における構成元素が界面層５における構成元素の一部と同じであるように構成してもよい。
【００２２】
図３は、ゲート絶縁膜４を形成する参考例の手法を概略的に示すものである。
【００２３】
（２１）まず、図３（Ａ）に示すように、適宜厚さ（例えば、５００μｍ程度）のＳｉ単結晶板からなるＳｉ基板２の一つの面２ａにＳｉと相互拡散させるための初期層５’として、ＨｆＯ2 よりなる薄膜を約０．５ｎｍの厚みで形成する。前記初期層５’の成膜の手段としては、Ｈｆ〔Ｎ（ＣＨ3 ）2 〕4 と水蒸気ガスとの交互原料供給によるＡＬＤ法で行う。このときの基板温度は２５０〜３５０℃、成膜サイクル数は４回である。
【００２４】
（２２）次に、供給ガスを代えて、ＴＭＡとアンモニアガスとの交互原料供給によるＡＬＤ法によって、図３（Ｂ）に示すように、初期層５’の上面に拡散抑制膜６として、ＡｌＮ膜を０．５ｎｍの厚みで形成する。このときの基板温度は２５０〜３５０℃、成膜サイクル数は５回である。
【００２５】
（２３）次に、拡散抑制膜６の上面にＨｉｇｈ−ｋ膜７として、ＨｆＯ2 膜を約５ｎｍの厚みで成膜する。前記Ｈｉｇｈ−ｋ膜７の成膜の手段としては、Ｈｆ〔Ｎ（ＣＨ3 ）2 〕4 と水蒸気ガスとの交互原料供給によるＡＬＤ法で行う。つまり、前記（２１）と同じである。このときの基板温度は２５０〜３５０℃、成膜サイクル数は４０回である。
【００２６】
（２４）最後に、熱処理（約８００℃、６０秒間）によって、Ｓｉ基板２中のＳｉと初期層５’としてのＨｆＯ2 を相互拡散させ、図３（Ｄ）に示すように、界面層としてのＨｆＳｉＯ4 ５を形成することにより、Ｓｉ基板２の一方の面２ａ上に、界面層５、拡散抑制膜６およびＨｉｇｈ−ｋ膜７の三層構造を有するゲート絶縁膜４を形成することができる。
【００２７】
上述のようにして製作された半導体装置１のゲート絶縁膜４においても、トランジスタ作製のプロセス中の熱処理によっても、電気絶縁性に優れた拡散抑制膜６が界面層５とＨｉｇｈ−ｋ膜７との間に形成されているので、界面層５がその厚みを増大させることはない。また、前記拡散抑制膜６が存在することにより、Ｈｉｇｈ−ｋ膜７中の酸素が界面層５側に拡散するのが抑制され、その結果、Ｈｉｇｈ−ｋ性が損なわれるといったことが効果的に防止される。したがって、上記半導体装置１のゲート絶縁膜４は、高品位である。
【００２８】
そして、この図３のゲート絶縁膜４の形成方法によれば、各膜５’６，７の成膜をＡＬＤ法によって行うことにより、同一チャンバ内で途切れることなく成膜を行うことができ、複数の装置やチャンバを用意する必要がなく、製造設備が少なくて済むとともに、高品位のゲート絶縁膜４を効率よく形成することができる。
【００２９】
【発明の効果】
以上説明したように、この発明によれば、ゲート絶縁膜に起因するトランジスタ特性の劣化や界面層の増加を抑制することができ、したがって、高品位のＭＩＳ型トランジスタを得ることができる。
【図面の簡単な説明】
【図１】 この発明によって得られた半導体装置としてのＭＩＳ型トランジスタの構造を概略的に示す縦断面図である。
【図２】 この発明に係る半導体装置の形成方法の一実施形態を示す図である。
【図３】 参考例の半導体装置の形成方法を示す図である。
【符号の説明】
１…ＭＩＳ型トランジスタ、２…シリコン基板、２ａ…シリコン基板の表面、５…界面層、５’…初期層、６…拡散抑制層、７…高誘電率絶縁膜。

Claims (1)

  1. シリコン基板の一つの面に初期層を形成し、この初期層の表面に拡散抑制層を形成した後、熱処理を施して前記初期層をシリコン基板と相互拡散させた界面層とし、その後、前記拡散抑制層の表面に高誘電率絶縁膜を形成することを特徴とする半導体装置の製造方法。
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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006344837A (ja) * 2005-06-09 2006-12-21 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
JP4997809B2 (ja) * 2006-03-30 2012-08-08 富士通セミコンダクター株式会社 半導体装置および半導体装置の製造方法
US8367560B2 (en) 2007-06-15 2013-02-05 Hitachi Kokusai Electric Inc. Semiconductor device manufacturing method
JP5286565B2 (ja) * 2007-06-15 2013-09-11 株式会社日立国際電気 半導体装置の製造方法、基板処理方法および基板処理装置
US8692310B2 (en) 2009-02-09 2014-04-08 Spansion Llc Gate fringing effect based channel formation for semiconductor device
JP2010278319A (ja) * 2009-05-29 2010-12-09 Renesas Electronics Corp 半導体装置およびその製造方法
US8114739B2 (en) 2009-09-28 2012-02-14 Freescale Semiconductor, Inc. Semiconductor device with oxygen-diffusion barrier layer and method for fabricating same
JP7089967B2 (ja) * 2018-07-17 2022-06-23 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN112299883B (zh) * 2019-07-26 2022-06-07 维沃泰克仪器(扬州)有限公司 一种碳化硅加热元件的耐高温保护涂层及其制备方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001267566A (ja) * 2000-02-11 2001-09-28 Sharp Corp 多層誘電体スタックおよびその方法
JP2002246594A (ja) * 2001-01-08 2002-08-30 Internatl Business Mach Corp <Ibm> 窒化アルミニウムおよび酸化アルミニウム／窒化アルミニウム・ヘテロ構造ゲート誘電体スタック・ベースの電界効果トランジスタおよびその形成方法
JP2002324901A (ja) * 2001-04-26 2002-11-08 Hitachi Ltd 電界効果型半導体装置およびその製法
JP2003068731A (ja) * 2001-08-29 2003-03-07 Tokyo Electron Ltd 絶縁膜の形成方法および形成システム

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR980012639A (ko) 1996-07-29 1998-04-30 윌리엄 비. 켐플러 초박 적층형 게이트 유전체 구조물
US6020243A (en) * 1997-07-24 2000-02-01 Texas Instruments Incorporated Zirconium and/or hafnium silicon-oxynitride gate dielectric
US20010013629A1 (en) * 1998-06-30 2001-08-16 Gang Bai Multi-layer gate dielectric
US6541394B1 (en) 1999-01-12 2003-04-01 Agere Systems Guardian Corp. Method of making a graded grown, high quality oxide layer for a semiconductor device
JP2002134739A (ja) * 2000-10-19 2002-05-10 Mitsubishi Electric Corp 半導体装置及びその製造方法
US6844604B2 (en) * 2001-02-02 2005-01-18 Samsung Electronics Co., Ltd. Dielectric layer for semiconductor device and method of manufacturing the same
JP3944367B2 (ja) * 2001-02-06 2007-07-11 松下電器産業株式会社 絶縁膜の形成方法及び半導体装置の製造方法
JP3792589B2 (ja) 2001-03-29 2006-07-05 富士通株式会社 半導体装置の製造方法
US6867101B1 (en) * 2001-04-04 2005-03-15 Advanced Micro Devices, Inc. Method of fabricating a semiconductor device having a nitride/high-k/nitride gate dielectric stack by atomic layer deposition (ALD) and a device thereby formed
US6642131B2 (en) * 2001-06-21 2003-11-04 Matsushita Electric Industrial Co., Ltd. Method of forming a silicon-containing metal-oxide gate dielectric by depositing a high dielectric constant film on a silicon substrate and diffusing silicon from the substrate into the high dielectric constant film
JP2003249649A (ja) * 2002-02-26 2003-09-05 Toshiba Corp 半導体装置及びその製造方法
US6642573B1 (en) * 2002-03-13 2003-11-04 Advanced Micro Devices, Inc. Use of high-K dielectric material in modified ONO structure for semiconductor devices
US6967154B2 (en) * 2002-08-26 2005-11-22 Micron Technology, Inc. Enhanced atomic layer deposition
US7037863B2 (en) * 2002-09-10 2006-05-02 Samsung Electronics Co., Ltd. Post thermal treatment methods of forming high dielectric layers over interfacial layers in integrated circuit devices
US6982230B2 (en) * 2002-11-08 2006-01-03 International Business Machines Corporation Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structures
JP4748927B2 (ja) * 2003-03-25 2011-08-17 ローム株式会社 半導体装置
JP4277268B2 (ja) * 2003-11-28 2009-06-10 ローム株式会社 金属化合物薄膜の製造方法、ならびに当該金属化合物薄膜を含む半導体装置の製造方法
JP2008306051A (ja) * 2007-06-08 2008-12-18 Rohm Co Ltd 半導体装置およびその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001267566A (ja) * 2000-02-11 2001-09-28 Sharp Corp 多層誘電体スタックおよびその方法
JP2002246594A (ja) * 2001-01-08 2002-08-30 Internatl Business Mach Corp <Ibm> 窒化アルミニウムおよび酸化アルミニウム／窒化アルミニウム・ヘテロ構造ゲート誘電体スタック・ベースの電界効果トランジスタおよびその形成方法
JP2002324901A (ja) * 2001-04-26 2002-11-08 Hitachi Ltd 電界効果型半導体装置およびその製法
JP2003068731A (ja) * 2001-08-29 2003-03-07 Tokyo Electron Ltd 絶縁膜の形成方法および形成システム

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