JP4084080B2 - 薄膜トランジスタ基板の製造方法 - Google Patents

薄膜トランジスタ基板の製造方法 Download PDF

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Publication number
JP4084080B2
JP4084080B2 JP2002134885A JP2002134885A JP4084080B2 JP 4084080 B2 JP4084080 B2 JP 4084080B2 JP 2002134885 A JP2002134885 A JP 2002134885A JP 2002134885 A JP2002134885 A JP 2002134885A JP 4084080 B2 JP4084080 B2 JP 4084080B2
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Japan
Prior art keywords
gate
insulating film
type
transistor
thin film
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Expired - Fee Related
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JP2002134885A
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English (en)
Japanese (ja)
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JP2003332581A5 (enExample
JP2003332581A (ja
Inventor
健史 佐藤
敏彦 糸賀
健夫 芝
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Hitachi Ltd
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Hitachi Ltd
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Priority to JP2002134885A priority Critical patent/JP4084080B2/ja
Priority to US10/424,950 priority patent/US6864134B1/en
Publication of JP2003332581A publication Critical patent/JP2003332581A/ja
Priority to US11/032,026 priority patent/US7323716B2/en
Publication of JP2003332581A5 publication Critical patent/JP2003332581A5/ja
Application granted granted Critical
Publication of JP4084080B2 publication Critical patent/JP4084080B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6719—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions having significant overlap between the lightly-doped drains and the gate electrodes, e.g. gate-overlapped LDD [GOLDD] TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/431—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Recrystallisation Techniques (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2002134885A 2002-05-10 2002-05-10 薄膜トランジスタ基板の製造方法 Expired - Fee Related JP4084080B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2002134885A JP4084080B2 (ja) 2002-05-10 2002-05-10 薄膜トランジスタ基板の製造方法
US10/424,950 US6864134B1 (en) 2002-05-10 2003-04-29 Manufacturing method of thin film transistor substrate
US11/032,026 US7323716B2 (en) 2002-05-10 2005-01-11 Manufacturing method of thin film transistor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002134885A JP4084080B2 (ja) 2002-05-10 2002-05-10 薄膜トランジスタ基板の製造方法

Publications (3)

Publication Number Publication Date
JP2003332581A JP2003332581A (ja) 2003-11-21
JP2003332581A5 JP2003332581A5 (enExample) 2005-09-22
JP4084080B2 true JP4084080B2 (ja) 2008-04-30

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JP2002134885A Expired - Fee Related JP4084080B2 (ja) 2002-05-10 2002-05-10 薄膜トランジスタ基板の製造方法

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US (2) US6864134B1 (enExample)
JP (1) JP4084080B2 (enExample)

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JP4638115B2 (ja) * 2002-07-05 2011-02-23 シャープ株式会社 薄膜トランジスタ装置の製造方法
JP4030885B2 (ja) * 2003-01-27 2008-01-09 シャープ株式会社 薄膜トランジスタ基板の製造方法
JP3991883B2 (ja) * 2003-02-20 2007-10-17 日本電気株式会社 薄膜トランジスタ基板の製造方法
JP4467901B2 (ja) * 2003-03-28 2010-05-26 シャープ株式会社 薄膜トランジスタ装置の製造方法
JP4419119B2 (ja) * 2003-12-03 2010-02-24 日本電気株式会社 電気光学装置及び投射型表示装置
JP4447305B2 (ja) * 2003-12-22 2010-04-07 株式会社半導体エネルギー研究所 半導体装置及びその作製方法
JP4447304B2 (ja) 2003-12-22 2010-04-07 株式会社半導体エネルギー研究所 半導体装置及びその作製方法
JP4444035B2 (ja) * 2004-04-21 2010-03-31 シャープ株式会社 表示装置用アクティブマトリクス基板およびその製造方法
TWI246199B (en) * 2004-07-09 2005-12-21 Au Optronics Corp Semiconductor device and LTPS-TFT within and method of making the semiconductor device
JP4884660B2 (ja) 2004-08-11 2012-02-29 シャープ株式会社 薄膜トランジスタ装置の製造方法
JP4872197B2 (ja) * 2004-08-25 2012-02-08 カシオ計算機株式会社 薄膜トランジスタパネル及びその製造方法
JP2006332400A (ja) 2005-05-27 2006-12-07 Nec Corp 薄膜半導体装置およびその製造方法
EP1793266B1 (en) * 2005-12-05 2017-03-08 Semiconductor Energy Laboratory Co., Ltd. Transflective Liquid Crystal Display with a Horizontal Electric Field Configuration
KR101226444B1 (ko) * 2005-12-21 2013-01-28 삼성디스플레이 주식회사 표시 기판의 제조 방법 및 표시 기판
US7719030B2 (en) * 2006-03-29 2010-05-18 International Rectifier Corporation Aluminum alloys for low resistance, ohmic contacts to III-nitride or compound semiconductor
EP2924498A1 (en) * 2006-04-06 2015-09-30 Semiconductor Energy Laboratory Co, Ltd. Liquid crystal desplay device, semiconductor device, and electronic appliance
TWI764143B (zh) 2006-05-16 2022-05-11 日商半導體能源研究所股份有限公司 液晶顯示裝置
US7847904B2 (en) * 2006-06-02 2010-12-07 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device and electronic appliance
DE102006060734B4 (de) * 2006-06-30 2014-03-06 Lg Display Co., Ltd. Flüssigkristalldisplay und Verfahren zu dessen Herstellung
JP4300247B2 (ja) * 2007-12-04 2009-07-22 シャープ株式会社 薄膜トランジスタ装置の製造方法
JP5491833B2 (ja) * 2008-12-05 2014-05-14 株式会社半導体エネルギー研究所 半導体装置
CN101710586B (zh) * 2009-01-09 2011-12-28 深超光电（深圳）有限公司 提高开口率的储存电容及其制作方法
WO2011074392A1 (en) 2009-12-18 2011-06-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US10121928B2 (en) * 2014-07-01 2018-11-06 Sensl Technologies Ltd. Semiconductor photomultiplier and a process of manufacturing a photomultiplier microcell
US10902769B2 (en) * 2017-07-12 2021-01-26 Facebook Technologies, Llc Multi-layer fabrication for pixels with calibration compensation
KR102468144B1 (ko) 2018-09-03 2022-11-16 엘지디스플레이 주식회사 표시장치
JP7635545B2 (ja) * 2020-12-18 2025-02-26 セイコーエプソン株式会社 発光装置およびプロジェクター

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Publication number Publication date
US6864134B1 (en) 2005-03-08
US7323716B2 (en) 2008-01-29
US20050121673A1 (en) 2005-06-09
JP2003332581A (ja) 2003-11-21

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