JP4006376B2 - 相互接続構造の製造方法およびその構造 - Google Patents
相互接続構造の製造方法およびその構造 Download PDFInfo
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- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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Description
(1)集積回路内に相互接続構造を製造するためのエッチバックおよびギャップ充填方法であって、a)支持表面上に支持誘電体を付着する工程と、b)前記支持表面から垂直距離分離れた下側表面を少なくとも一部が有する一組の相互接続開口を、前記支持誘電体内に形成する工程と、c)導電相互接続材料で前記一組の相互接続開口を充填することによって一組の配線フィーチャを形成し、前記配線フィーチャの上部表面が前記支持誘電体の上部表面とほぼ共面になるように平坦化し、前記下側表面の下の前記支持誘電体の支持部によって前記配線フィーチャの少なくとも一部を支持する工程と、d)前記配線フィーチャをマスクとして用いる方向性エッチングで前記支持誘電体をエッチングして、前記配線フィーチャの下の前記支持部の構造内にのみ前記支持誘電体を残す工程と、e)前記一組の配線フィーチャの上にギャップ充填誘電体材料を付着して、前記一組の配線フィーチャの間のギャップを前記ギャップ充填誘電体で充填する工程と、f)前記一組の配線フィーチャの上部表面が前記ギャップ充填誘電体の上部表面とほぼ共面になるまで前記ギャップ充填誘電体を平坦化する工程と、を含む方法。
(2)前記ギャップ充填誘電体を平坦化する工程は、化学機械研磨によって実行される上記(1)記載の方法。
(3)前記ギャップ充填誘電体を平坦化する工程は、第一のエッチング・プロセスおよび前記第一のエッチング・プロセスより低アグレッシブな第二のエッチング・プロセスより成るエッチング・プロセスと、終点検出システムを用いて前記第一のエッチング・プロセスを監視して前記一組の配線フィーチャが露出する前に前記第二のエッチング・プロセスへ切り替える工程と、前記一組の配線フィーチャの上部表面が前記ギャップ充填誘電体の上部表面とほぼ共面になるまで前記第二のエッチング・プロセスを持続する工程と、をさらに含む上記(1)記載の方法。
(4)前記ギャップ充填誘電体を付着する工程の前に、前記一組の配線フィーチャの上にコンフォーマル封止層を付着する工程をさらに含む上記(2)記載の方法。
(5)前記封止層の材料は酸素および銅をブロックし、銅相互接続材料を前記配線フィーチャ内部に封止し、酸素を前記配線フィーチャに侵入させない上記(4)記載の方法。
(6)前記封止層の材料は、SiCH,SiNCH,Si3 N4 ,SiCOH,およびSiO2より成るグループから選択される上記(5)記載の方法。
(7)前記配線フィーチャ上の前記ギャップ充填誘電体の厚さが基準量を下回ったときにエッチング切替信号を出力するインターフェロメトリ・システムによって前記監視を実行し、前記エッチング切替信号に応答して、前記第一のエッチング・プロセスを停止し、前記第二のエッチング・プロセスを開始する上記(3)記載の方法。
(8)前記ギャップ充填誘電体は、少なくともメチルシルセスキオキサン,ヒドリドシルセスキオキサン,および混合シルセスキオキサンを含むソリッドおよびポーラスのスピンオンガラス、シリコンと炭素,水素,酸素,および窒素のうちの少なくとも1つとを含むソリッドおよびポーラスのアモルファス水素化誘電体膜、少なくともポリイミド,ベンゾシクロブテン,ポリベンゾオキサゾール,および,ポリフェニレンエーテルを主成分とする芳香族熱硬化型ポリマを含むソリッドおよびポーラスのスピンオン有機誘電体、少なくともポリパラキシリレンを含むソリッドおよびポーラスの化学蒸着ポリマ、およびソリッドおよびポーラスのこれらの組み合せ、より成るグループから選択される上記(2)記載の方法。
(9)エッチングにより前記ギャップ充填誘電体を平坦化する工程の前に実行されるCMP工程をさらに含む上記(3)記載の方法。
(10)基板を備え、前記基板は、前記基板の上に配された少なくとも1つの相互接続層を有し、前記相互接続層は、1組の導電バイアと、前記1組のバイアの上に配され前記1組のバイアに接続された1組の導電水平相互接続部材とを有し、前記水平相互接続部材は、第一の誘電率を有し前記1組のバイアの下側表面から前記水平相互接続部材の下側表面まで垂直に延び前記水平相互接続部材の下に水平に延びる支持誘電体によって支持され、ギャップ充填誘電体を備え、前記ギャップ充填誘電体は、前記第一の誘電率より値が低い第二の誘電率を有し、前記1組の水平相互接続部材の間のギャップを充填する構造。
(11)前記基板は、半導体デバイス・チップおよびチップ・キャリアより成るグループから選択される上記(10)記載の構造。
(12)前記水平相互接続部材は導電バリア材料と高導電充填材料とを含み、前記導電バリア材料は、Ti,Ta,Cr,W,Zr,Hf,およびこれらの導電酸化物,窒化物,オキシナイトライド,炭窒化物(carbo-nitride),ケイ窒化物(silico-nitride)より成るグループから選択される上記(10)記載の構造。
(13)前記高導電充填材料は、Cu,Al,Au,およびWより成るグループから選択される上記(12)記載の構造。
(14)前記支持誘電体材料は、ソリッドおよびポーラスの二酸化シリコン,ソリッドおよびポーラスのフッ化シリコンオキサイド、シリコンと炭素,酸素,水素および窒素のうちの少なくとも1つとを含むソリッドおよびポーラスのアモルファス水素化誘電体膜、テトラエチルオルソシリケート,メチルシルセスキオキサン,ヒドリドシルセスキオキサン,および混合セルセスキオキサンから準備されたソリッドおよびポーラスのスピンオンガラス膜、ソリッドおよびポーラスのダイアモンドライクカーボン、少なくともポリイミド,ベンゾシクロブテン,ポリベンゾオキサゾール,およびポリフェニレンエーテルを主成分とする芳香族熱硬化型ポリマのうちの1つを含むソリッドおよびポーラスのスピンオン有機誘電体、および少なくともポリパラキシリレンを含むソリッドおよびポーラスの化学蒸着ポリマ、より成るグループから選択される上記(10)記載の構造。
(15)前記低誘電率ギャップ充填誘電体は、前記支持誘電体と異なり、少なくともメチルシルセスキオキサン,ヒドリドシルセスキオキサン,および混合シルセスキオキサンを含むソリッドおよびポーラスのスピンオンガラス、シリコンと炭素,水素,酸素,および窒素のうちの少なくとも1つとを含むソリッドおよびポーラスのアモルファス水素化誘電体膜、少なくともポリイミド,ベンゾシクロブテン,ポリベンゾオキサゾール,ポリフェニレンエーテルを主成分とする芳香族熱硬化型ポリマを含むソリッドおよびポーラスのスピンオン有機誘電体、少なくともポリパラキシリレンを含むソリッドおよびポーラスの化学蒸着ポリマ、より成るグループから選択される上記(10)記載の構造。
(16)前記キャップ層は、前記1組の水平相互接続部材の上のみに形成される上記(10)記載の構造。
(17)(a)窒化シリコン,炭化シリコン,炭窒化シリコンのアモルファス水素化絶縁体膜、(b)Ti,Ta,Cr,W,Zr,Hf,これらの導電酸化物,窒化物,オキシナイトライド,炭窒化物,ケイ窒化物,およびこれらの組み合せ、(c)Co−W−P,Co−Sn−P,Co−Ni−P,およびCo−Pの合金、(d)グループ(a)からの絶縁膜と、グループ(b)および(c)からの導電膜との組み合せ、より成るグループから前記キャップ層が選択される上記(16)記載の構造。
(18)前記水平相互接続部材と前記ギャップ充填誘電体との上部表面を覆うキャップ層をさらに備える上記(10)記載の構造。
(19)第一のキャップ層が前記水平相互接続部材の上部表面上のみに形成され、第二のキャップ層が前記ギャップ充填誘電体の上部表面上と、前記水平相互接続部材の上部表面上とに形成される上記(18)記載の構造。
(20)(a)窒化シリコン,炭化シリコン,炭窒化シリコンのアモルファス水素化絶縁体膜、(b)Ti,Ta,Cr,W,Zr,Hf,これらの導電窒化物,酸化物,オキシナイトライド,炭窒化物,ケイ窒化物,およびこれらの組み合せ、(c)Co−W−P,Co−Sn−P,Co−Ni−P,およびCo−Pの合金、(d)グループ(a)からの絶縁膜とグループ(b)および(c)からの導電膜との組み合せ、より成るグループから前記第一のキャップ層が選択される上記(19)記載の構造。
(21)窒化シリコン,炭化シリコン,および炭窒化シリコンのアモルファス水素化絶縁体膜より成るグループから前記第二のキャップ層が選択される上記(19)記載の構造。
(22)相互の上に配された少なくとも2つの配線層と、最終レベルの相互接続配線層とを有する基板を備え、前記配線とバイアが第二の支持誘電体によって完全に囲まれる上記(10)記載の多重レベル構造。
(23)前記第二の支持誘電体は、二酸化シリコン,フッ化シリコンオキサイド、少なくともシリコン,炭素,酸素,水素,および窒素のうちの1つを含むアモルファス水素化誘電体膜、テトラエチルオルソシリケート,メチルシルセスキオキサン,ヒドリドシルセスキオキサン,および混合シルセスキオキサンから準備されたスピンオンガラス膜、ダイアモンドライクカーボン、少なくともポリイミド,ベンゾシクロブテン,ポリベンゾオキサゾール,ポリフェニレンエーテルを主成分とする芳香族熱硬化型ポリマを含むスピンオン有機誘電体、少なくともポリパラキシリレンを含む化学蒸着ポリマ、およびこれらの組み合せ、より成るグループから選択される上記(22)記載の構造。
(24)前記支持誘電体は、前記1組の導電バイアおよび前記1組の導電水平相互接続部材をまたがって横に延び、前記ギャップ充填誘電体は、前記支持誘電体の上方に限って前記水平相互接続部材間のギャップを充填する上記(10)記載の構造。
(25)前記支持誘電体の上部表面は、前記導電水平相互接続部材の底部表面と前記1組の導電バイアの底部表面との間に位置する上記(24)記載の構造。
(26)前記支持誘電体は、前記1組の導電水平相互接続部材の下を横に延び、前記ギャップ充填誘電体は、前記1組のバイアの前記上部表面のレベルに至るまで下方へ前記水平相互接続部材の間のギャップを充填する上記(10)記載の構造。
1110 金属間誘電体
1120 金属間誘電体
1130 ハード・マスク層あるいは層状スタック
1150 ライン
1170 バイア
1180 バイア開口部
1190 デュアル・ダマシン・トレンチおよびバイア構造
1200 導電ライナ材料または材料スタック
1210 導電充填材料
1220 キャップ材料
1500 フォトレジスト
1510 フォトレジスト層
2120 支持誘電体
2220 キャップ層
2230 ギャップ充填誘電体
2240 オーバーバーデン領域
2242 放射線源
2244 検出器
2246 制御部
2250 コンフォーマル封止層
Claims (7)
- 集積回路内に相互接続構造を製造するためのエッチバックおよびギャップ充填方法であって、
a)支持表面上に支持誘電体を付着する工程と、
b)前記支持表面から垂直距離分離れた下側表面を少なくとも一部が有する一組の相互接続開口を、前記支持誘電体内に形成する工程と、
c)導電相互接続材料で前記一組の相互接続開口を充填することによって一組の配線フィーチャを形成し、前記配線フィーチャの上部表面が前記支持誘電体の上部表面とほぼ共面になるように平坦化し、前記下側表面の下の前記支持誘電体の支持部によって前記配線フィーチャの少なくとも一部を支持する工程と、
d)前記配線フィーチャをマスクとして用いる方向性エッチングで前記支持誘電体をエッチングして、前記配線フィーチャの下の前記支持部の構造内にのみ前記支持誘電体を残す工程と、
e)前記一組の配線フィーチャの上にギャップ充填誘電体材料を付着して、前記一組の配線フィーチャの間のギャップを前記ギャップ充填誘電体で充填する工程と、
f)前記一組の配線フィーチャの上部表面が前記ギャップ充填誘電体の上部表面とほぼ共面になるまで前記ギャップ充填誘電体を平坦化する工程であって、第一のエッチング・プロセスおよび前記第一のエッチング・プロセスより低アグレッシブな第二のエッチング・プロセスより成るエッチング・プロセスと、終点検出システムを用いて前記第一のエッチング・プロセスを監視して前記一組の配線フィーチャが露出する前に前記第二のエッチング・プロセスへ切り替える工程と、前記一組の配線フィーチャの上部表面が前記ギャップ充填誘電体の上部表面とほぼ共面になるまで前記第二のエッチング・プロセスを持続する工程と、を含む前記ギャップ充填誘電体を平坦化する工程と、
を含む前記方法。 - 前記ギャップ充填誘電体を付着する工程の前に、前記一組の配線フィーチャの上にコンフォーマル封止層を付着する工程をさらに含む請求項1記載の方法。
- 前記封止層の材料は酸素および銅をブロックし、銅相互接続材料を前記配線フィーチャ内部に封止し、酸素を前記配線フィーチャに侵入させない請求項2記載の方法。
- 前記封止層の材料は、SiCH,SiNCH,Si3 N4 ,SiCOH,およびSiO2より成るグループから選択される請求項3記載の方法。
- 前記配線フィーチャ上の前記ギャップ充填誘電体の厚さが基準量を下回ったときにエッチング切替信号を出力するインターフェロメトリ・システムによって前記監視を実行し、前記エッチング切替信号に応答して、前記第一のエッチング・プロセスを停止し、前記第二のエッチング・プロセスを開始する請求項1記載の方法。
- 前記ギャップ充填誘電体は、少なくともメチルシルセスキオキサン,ヒドリドシルセスキオキサン,および混合シルセスキオキサンを含むソリッドおよびポーラスのスピンオンガラス、シリコンと炭素,水素,酸素,および窒素のうちの少なくとも1つとを含むソリッドおよびポーラスのアモルファス水素化誘電体膜、少なくともポリイミド,ベンゾシクロブテン,ポリベンゾオキサゾール,および,ポリフェニレンエーテルを主成分とする芳香族熱硬化型ポリマを含むソリッドおよびポーラスのスピンオン有機誘電体、少なくともポリパラキシリレンを含むソリッドおよびポーラスの化学蒸着ポリマ、およびソリッドおよびポーラスのこれらの組み合せ、より成るグループから選択される請求項1記載の方法。
- エッチングにより前記ギャップ充填誘電体を平坦化する工程の前に実行されるCMP工程をさらに含む請求項1記載の方法。
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US7045453B2 (en) | 2006-05-16 |
CN1499606A (zh) | 2004-05-26 |
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