JP2856061B2 - リードフレームとその製造方法 - Google Patents

リードフレームとその製造方法

Info

Publication number
JP2856061B2
JP2856061B2 JP6019948A JP1994894A JP2856061B2 JP 2856061 B2 JP2856061 B2 JP 2856061B2 JP 6019948 A JP6019948 A JP 6019948A JP 1994894 A JP1994894 A JP 1994894A JP 2856061 B2 JP2856061 B2 JP 2856061B2
Authority
JP
Japan
Prior art keywords
lead
metal layer
bump
etching
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP6019948A
Other languages
English (en)
Japanese (ja)
Other versions
JPH07211836A (ja
Inventor
健治 大沢
伊藤　　誠
睦 長野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP6019948A priority Critical patent/JP2856061B2/ja
Priority to KR1019950000001A priority patent/KR100352519B1/ko
Priority to US08/372,247 priority patent/US5481798A/en
Publication of JPH07211836A publication Critical patent/JPH07211836A/ja
Application granted granted Critical
Publication of JP2856061B2 publication Critical patent/JP2856061B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/465—Bumps or wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/701—Tape-automated bond [TAB] connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/042—Etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/451—Multilayered leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/456—Materials
    • H10W70/457—Materials of metallic layers on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/466—Tape carriers or flat leads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/077—Connecting of TAB connectors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49204—Contact or terminal manufacturing
    • Y10T29/49208—Contact or terminal manufacturing by assembling plural parts
    • Y10T29/49222—Contact or terminal manufacturing by assembling plural parts forming array of contacts or terminals

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP6019948A 1994-01-19 1994-01-19 リードフレームとその製造方法 Expired - Fee Related JP2856061B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP6019948A JP2856061B2 (ja) 1994-01-19 1994-01-19 リードフレームとその製造方法
KR1019950000001A KR100352519B1 (ko) 1994-01-19 1995-01-03 리드프레임과그제조방법
US08/372,247 US5481798A (en) 1994-01-19 1995-01-13 Etching method for forming a lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6019948A JP2856061B2 (ja) 1994-01-19 1994-01-19 リードフレームとその製造方法

Publications (2)

Publication Number Publication Date
JPH07211836A JPH07211836A (ja) 1995-08-11
JP2856061B2 true JP2856061B2 (ja) 1999-02-10

Family

ID=12013435

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6019948A Expired - Fee Related JP2856061B2 (ja) 1994-01-19 1994-01-19 リードフレームとその製造方法

Country Status (3)

Country Link
US (1) US5481798A (https=)
JP (1) JP2856061B2 (https=)
KR (1) KR100352519B1 (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2861841B2 (ja) * 1994-11-22 1999-02-24 ソニー株式会社 リードフレームの製造方法
US5810609A (en) * 1995-08-28 1998-09-22 Tessera, Inc. Socket for engaging bump leads on a microelectronic device and methods therefor
JP3422144B2 (ja) * 1995-09-22 2003-06-30 ソニー株式会社 半導体パッケージの製造方法
JPH09162346A (ja) * 1995-12-08 1997-06-20 Kenseidou Kagaku Kogyo Kk 新規なリードフレーム
JPH09312374A (ja) 1996-05-24 1997-12-02 Sony Corp 半導体パッケージ及びその製造方法
JP3003624B2 (ja) * 1997-05-27 2000-01-31 ソニー株式会社 半導体装置
JPH1174413A (ja) 1997-07-01 1999-03-16 Sony Corp リードフレームとリードフレームの製造方法と半導体装置と半導体装置の組立方法と電子機器
US6782610B1 (en) * 1999-05-21 2004-08-31 North Corporation Method for fabricating a wiring substrate by electroplating a wiring film on a metal base
DE102007034402B4 (de) * 2006-12-14 2014-06-18 Advanpack Solutions Pte. Ltd. Halbleiterpackung und Herstellungsverfahren dafür
TWI500124B (zh) 2011-11-29 2015-09-11 先進封裝技術私人有限公司 基板結構、半導體封裝元件及基板結構之製造方法
KR101443972B1 (ko) * 2012-10-31 2014-09-23 삼성전기주식회사 일체형 전력 반도체 모듈
JP6418601B2 (ja) * 2015-01-23 2018-11-07 大口マテリアル株式会社 半導体素子搭載用基板の製造方法
CN108257938B (zh) * 2018-01-31 2020-01-24 江苏长电科技股份有限公司 用于引线框架的治具及引线框架的蚀刻方法
CN110896064A (zh) * 2019-11-16 2020-03-20 江苏长电科技股份有限公司 一种半蚀刻引线框架结构及其制造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1817434C3 (de) * 1967-12-30 1980-05-14 Sony Corp., Tokio Verfahren zur Herstellung einer elektrischen Leitungsanordnung
JPS57170534A (en) * 1981-04-15 1982-10-20 Hitachi Ltd Dry etching method for aluminum and aluminum alloy
US4878990A (en) * 1988-05-23 1989-11-07 General Dynamics Corp., Pomona Division Electroformed and chemical milled bumped tape process
JP2797542B2 (ja) * 1989-11-06 1998-09-17 ソニー株式会社 リードフレームの製造方法
US5014113A (en) * 1989-12-27 1991-05-07 Motorola, Inc. Multiple layer lead frame
JP3019556B2 (ja) * 1991-10-25 2000-03-13 ソニー株式会社 リードフレームの製造方法と半導体装置の製造方法
JPH05121482A (ja) * 1991-10-25 1993-05-18 Sony Corp バンプを有するリードフレームの製造方法
JPH05129490A (ja) * 1991-11-07 1993-05-25 Sony Corp リードフレームの製造方法
JP3028875B2 (ja) * 1992-01-18 2000-04-04 ソニー株式会社 リードフレームの製造方法

Also Published As

Publication number Publication date
KR950034722A (https=) 1995-12-28
JPH07211836A (ja) 1995-08-11
KR100352519B1 (ko) 2002-12-26
US5481798A (en) 1996-01-09

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