JP2564712B2 - 半導体メモリ装置の製造方法 - Google Patents

半導体メモリ装置の製造方法

Info

Publication number
JP2564712B2
JP2564712B2 JP3148392A JP14839291A JP2564712B2 JP 2564712 B2 JP2564712 B2 JP 2564712B2 JP 3148392 A JP3148392 A JP 3148392A JP 14839291 A JP14839291 A JP 14839291A JP 2564712 B2 JP2564712 B2 JP 2564712B2
Authority
JP
Japan
Prior art keywords
forming
impurity diffusion
diffusion region
region
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3148392A
Other languages
English (en)
Japanese (ja)
Other versions
JPH04320059A (ja
Inventor
圭弼 李
用稷 朴
鍾福 金
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JPH04320059A publication Critical patent/JPH04320059A/ja
Application granted granted Critical
Publication of JP2564712B2 publication Critical patent/JP2564712B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/34—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being at least partially in a trench in the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823468—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor
    • H10B12/053—Making the transistor the transistor being at least partially in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/39—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench
    • H10B12/395—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor and the transistor being in a same trench the transistor being vertical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/485—Bit line contacts

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP3148392A 1991-03-20 1991-06-20 半導体メモリ装置の製造方法 Expired - Lifetime JP2564712B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019910004394A KR940000510B1 (ko) 1991-03-20 1991-03-20 반도체 메모리장치 및 그 제조방법
KR4394 1991-03-20

Publications (2)

Publication Number Publication Date
JPH04320059A JPH04320059A (ja) 1992-11-10
JP2564712B2 true JP2564712B2 (ja) 1996-12-18

Family

ID=19312269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3148392A Expired - Lifetime JP2564712B2 (ja) 1991-03-20 1991-06-20 半導体メモリ装置の製造方法

Country Status (7)

Country Link
JP (1) JP2564712B2 (fr)
KR (1) KR940000510B1 (fr)
DE (1) DE4117703C2 (fr)
FR (1) FR2674373B1 (fr)
GB (1) GB2253937B (fr)
IT (1) IT1247968B (fr)
TW (1) TW199236B (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6258671B1 (en) 1997-05-13 2001-07-10 Micron Technology, Inc. Methods of providing spacers over conductive line sidewalls, methods of forming sidewall spacers over etched line sidewalls, and methods of forming conductive lines
DE10121011B4 (de) * 2001-04-28 2004-11-04 Infineon Technologies Ag Verfahren zur maskenlosen Kontaktlochdotierung bei DRAMs/eDRAMs und entsprechend hergestellter Speicherchip

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4364075A (en) * 1980-09-02 1982-12-14 Intel Corporation CMOS Dynamic RAM cell and method of fabrication
JPS60164570A (ja) * 1984-02-06 1985-08-27 株式会社東芝 扉ロツク装置
JPS61156962A (ja) * 1984-12-27 1986-07-16 Nec Corp 構内電子交換システム
JPS61156862A (ja) * 1984-12-28 1986-07-16 Toshiba Corp 半導体記憶装置
JPS61218165A (ja) * 1985-03-25 1986-09-27 Hitachi Ltd 半導体記憶装置及び製造方法
JPH0821682B2 (ja) * 1987-04-24 1996-03-04 株式会社日立製作所 半導体装置の製造方法
JP2810042B2 (ja) * 1987-09-16 1998-10-15 株式会社日立製作所 半導体集積回路装置
JPH01231364A (ja) * 1988-03-11 1989-09-14 Hitachi Ltd 半導体集積回路装置
JPH0821687B2 (ja) * 1989-05-31 1996-03-04 富士通株式会社 半導体装置及びその製造方法
JP2673385B2 (ja) * 1989-10-26 1997-11-05 三菱電機株式会社 半導体装置
DE4034169C2 (de) * 1989-10-26 1994-05-19 Mitsubishi Electric Corp DRAM mit einem Speicherzellenfeld und Herstellungsverfahren dafür

Also Published As

Publication number Publication date
DE4117703C2 (de) 1994-12-22
FR2674373A1 (fr) 1992-09-25
GB2253937B (en) 1995-10-25
DE4117703A1 (de) 1992-09-24
KR940000510B1 (ko) 1994-01-21
FR2674373B1 (fr) 2001-07-06
ITMI911513A1 (it) 1992-12-04
JPH04320059A (ja) 1992-11-10
IT1247968B (it) 1995-01-05
KR920018890A (ko) 1992-10-22
ITMI911513A0 (it) 1991-06-04
GB2253937A (en) 1992-09-23
GB9112136D0 (en) 1991-07-24
TW199236B (fr) 1993-02-01

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