JP2024505487A5 - - Google Patents

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Publication number
JP2024505487A5
JP2024505487A5 JP2023544579A JP2023544579A JP2024505487A5 JP 2024505487 A5 JP2024505487 A5 JP 2024505487A5 JP 2023544579 A JP2023544579 A JP 2023544579A JP 2023544579 A JP2023544579 A JP 2023544579A JP 2024505487 A5 JP2024505487 A5 JP 2024505487A5
Authority
JP
Japan
Prior art keywords
interconnections
substrate
pad
interconnects
coupled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2023544579A
Other languages
English (en)
Japanese (ja)
Other versions
JP2024505487A (ja
JP7824965B2 (ja
Filing date
Publication date
Priority claimed from US17/164,729 external-priority patent/US11682607B2/en
Application filed filed Critical
Publication of JP2024505487A publication Critical patent/JP2024505487A/ja
Publication of JP2024505487A5 publication Critical patent/JP2024505487A5/ja
Application granted granted Critical
Publication of JP7824965B2 publication Critical patent/JP7824965B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2023544579A 2021-02-01 2021-12-22 基板の表面と整合された表面相互接続を備える基板を有するパッケージ Active JP7824965B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US17/164,729 2021-02-01
US17/164,729 US11682607B2 (en) 2021-02-01 2021-02-01 Package having a substrate comprising surface interconnects aligned with a surface of the substrate
PCT/US2021/064920 WO2022164560A1 (en) 2021-02-01 2021-12-22 Package having a substrate comprising surface interconnects aligned with a surface of the substrate

Publications (3)

Publication Number Publication Date
JP2024505487A JP2024505487A (ja) 2024-02-06
JP2024505487A5 true JP2024505487A5 (enExample) 2024-12-03
JP7824965B2 JP7824965B2 (ja) 2026-03-05

Family

ID=80050968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023544579A Active JP7824965B2 (ja) 2021-02-01 2021-12-22 基板の表面と整合された表面相互接続を備える基板を有するパッケージ

Country Status (8)

Country Link
US (1) US11682607B2 (enExample)
EP (1) EP4285407A1 (enExample)
JP (1) JP7824965B2 (enExample)
KR (1) KR20230137329A (enExample)
CN (1) CN116745902A (enExample)
BR (1) BR112023014695A2 (enExample)
TW (1) TWI911361B (enExample)
WO (1) WO2022164560A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7728756B2 (ja) 2019-10-29 2025-08-25 エイエムエス-オスラム インターナショナル ゲーエムベーハー オプトエレクトロニクス装置
WO2021110332A1 (en) * 2019-12-06 2021-06-10 Osram Opto Semiconductors Gmbh Window or surface of a vehicle comprising at least one optoelectronic component
DE112020005977T5 (de) 2019-12-06 2022-09-22 Osram Opto Semiconductors Gmbh Vorrichtung umfassend einen träger mit optoelektronischen elementen und verfahren zur herstellung der vorrichtung
CN114786943A (zh) 2019-12-06 2022-07-22 奥斯兰姆奥普托半导体股份有限两合公司 光电装置
US12040317B2 (en) 2019-12-06 2024-07-16 Osram Opto Semiconductors Gmbh Optoelectronic device
CN114787996A (zh) 2019-12-06 2022-07-22 奥斯兰姆奥普托半导体股份有限两合公司 光电装置
US11682607B2 (en) * 2021-02-01 2023-06-20 Qualcomm Incorporated Package having a substrate comprising surface interconnects aligned with a surface of the substrate
US12549154B2 (en) 2021-09-24 2026-02-10 Rf360 Singapore Pte. Ltd. Package comprising an acoustic device and a cap substrate comprising an inductor
US12341488B2 (en) * 2022-09-20 2025-06-24 Qualcomm Incorporated Package comprising an acoustic device and a polymer cap layer
US20240136293A1 (en) * 2022-10-25 2024-04-25 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure and method of forming the same

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8021976B2 (en) * 2002-10-15 2011-09-20 Megica Corporation Method of wire bonding over active area of a semiconductor circuit
US7099293B2 (en) * 2002-05-01 2006-08-29 Stmicroelectronics, Inc. Buffer-less de-skewing for symbol combination in a CDMA demodulator
JP3800215B2 (ja) 2003-09-29 2006-07-26 株式会社トッパンNecサーキットソリューションズ 印刷配線板、半導体装置、及びそれらの製造方法
JP4769022B2 (ja) 2005-06-07 2011-09-07 京セラSlcテクノロジー株式会社 配線基板およびその製造方法
US7569422B2 (en) * 2006-08-11 2009-08-04 Megica Corporation Chip package and method for fabricating the same
JP5101169B2 (ja) 2007-05-30 2012-12-19 新光電気工業株式会社 配線基板とその製造方法
US8193555B2 (en) * 2009-02-11 2012-06-05 Megica Corporation Image and light sensor chip packages
US8837872B2 (en) * 2010-12-30 2014-09-16 Qualcomm Incorporated Waveguide structures for signal and/or power transmission in a semiconductor device
US9177899B2 (en) 2012-07-31 2015-11-03 Mediatek Inc. Semiconductor package and method for fabricating base for semiconductor package
US9461008B2 (en) * 2012-08-16 2016-10-04 Qualcomm Incorporated Solder on trace technology for interconnect attachment
US9508637B2 (en) * 2014-01-06 2016-11-29 Taiwan Semiconductor Manufacturing Company, Ltd. Protrusion bump pads for bond-on-trace processing
US10971476B2 (en) * 2014-02-18 2021-04-06 Qualcomm Incorporated Bottom package with metal post interconnections
US9679841B2 (en) 2014-05-13 2017-06-13 Qualcomm Incorporated Substrate and method of forming the same
US9343369B2 (en) * 2014-05-19 2016-05-17 Qualcomm Incorporated Three dimensional (3D) integrated circuits (ICs) (3DICs) and related systems
US10157823B2 (en) 2014-10-31 2018-12-18 Qualcomm Incorporated High density fan out package structure
US9425174B1 (en) 2014-11-18 2016-08-23 Altera Corporation Integrated circuit package with solderless interconnection structure
US11139224B2 (en) * 2019-12-05 2021-10-05 Qualcomm Incorporated Package comprising a substrate having a via wall configured as a shield
US20210175178A1 (en) * 2019-12-05 2021-06-10 Qualcomm Incorporated Package comprising a double-sided redistribution portion
US12040317B2 (en) * 2019-12-06 2024-07-16 Osram Opto Semiconductors Gmbh Optoelectronic device
US20210210452A1 (en) * 2020-01-02 2021-07-08 Qualcomm Incorporated Integrated passive device (ipd) coupled to front side of integrated device
US11444019B2 (en) * 2020-04-06 2022-09-13 Qualcomm Incorporated Package comprising a substrate with interconnect routing over solder resist layer and an integrated device coupled to the substrate and method for manufacturing the package
US11502049B2 (en) * 2020-05-06 2022-11-15 Qualcomm Incorporated Package comprising multi-level vertically stacked redistribution portions
US11682607B2 (en) * 2021-02-01 2023-06-20 Qualcomm Incorporated Package having a substrate comprising surface interconnects aligned with a surface of the substrate
US11823983B2 (en) * 2021-03-23 2023-11-21 Qualcomm Incorporated Package with a substrate comprising pad-on-pad interconnects
US12469811B2 (en) * 2021-03-26 2025-11-11 Qualcomm Incorporated Package comprising wire bonds coupled to integrated devices
US11791276B2 (en) * 2021-04-08 2023-10-17 Qualcomm Incorporated Package comprising passive component between substrates for improved power distribution network (PDN) performance

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