JP2023519145A5 - - Google Patents

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Publication number
JP2023519145A5
JP2023519145A5 JP2022552624A JP2022552624A JP2023519145A5 JP 2023519145 A5 JP2023519145 A5 JP 2023519145A5 JP 2022552624 A JP2022552624 A JP 2022552624A JP 2022552624 A JP2022552624 A JP 2022552624A JP 2023519145 A5 JP2023519145 A5 JP 2023519145A5
Authority
JP
Japan
Prior art keywords
integrated device
substrate
interconnect
interconnection
electrical path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2022552624A
Other languages
English (en)
Japanese (ja)
Other versions
JP7791095B2 (ja
JP2023519145A (ja
Filing date
Publication date
Priority claimed from US17/017,361 external-priority patent/US11605594B2/en
Application filed filed Critical
Publication of JP2023519145A publication Critical patent/JP2023519145A/ja
Publication of JP2023519145A5 publication Critical patent/JP2023519145A5/ja
Priority to JP2025135162A priority Critical patent/JP2025166172A/ja
Application granted granted Critical
Publication of JP7791095B2 publication Critical patent/JP7791095B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2022552624A 2020-03-23 2021-03-18 基板と基板に結合された高密度相互接続集積デバイスとを含むパッケージ Active JP7791095B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025135162A JP2025166172A (ja) 2020-03-23 2025-08-14 基板と基板に結合された高密度相互接続集積デバイスとを含むパッケージ

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US202062993544P 2020-03-23 2020-03-23
US62/993,544 2020-03-23
US17/017,361 US11605594B2 (en) 2020-03-23 2020-09-10 Package comprising a substrate and a high-density interconnect integrated device coupled to the substrate
US17/017,361 2020-09-10
PCT/US2021/023035 WO2021194857A1 (en) 2020-03-23 2021-03-18 Package comprising a substrate and a high-density interconnect integrated device coupled to the substrate

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025135162A Division JP2025166172A (ja) 2020-03-23 2025-08-14 基板と基板に結合された高密度相互接続集積デバイスとを含むパッケージ

Publications (3)

Publication Number Publication Date
JP2023519145A JP2023519145A (ja) 2023-05-10
JP2023519145A5 true JP2023519145A5 (enExample) 2024-03-04
JP7791095B2 JP7791095B2 (ja) 2025-12-23

Family

ID=77748271

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2022552624A Active JP7791095B2 (ja) 2020-03-23 2021-03-18 基板と基板に結合された高密度相互接続集積デバイスとを含むパッケージ
JP2025135162A Pending JP2025166172A (ja) 2020-03-23 2025-08-14 基板と基板に結合された高密度相互接続集積デバイスとを含むパッケージ

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2025135162A Pending JP2025166172A (ja) 2020-03-23 2025-08-14 基板と基板に結合された高密度相互接続集積デバイスとを含むパッケージ

Country Status (8)

Country Link
US (1) US11605594B2 (enExample)
EP (1) EP4128347A1 (enExample)
JP (2) JP7791095B2 (enExample)
KR (1) KR20220157959A (enExample)
CN (1) CN115298819B (enExample)
BR (1) BR112022018379A2 (enExample)
PH (1) PH12022551934A1 (enExample)
WO (1) WO2021194857A1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI738525B (zh) * 2020-09-24 2021-09-01 矽品精密工業股份有限公司 電子封裝件及其製法
US11658123B2 (en) * 2020-09-25 2023-05-23 Advanced Micro Devices, Inc. Hybrid bridged fanout chiplet connectivity

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JPH0438080U (enExample) * 1990-07-30 1992-03-31
JPH05110024A (ja) * 1991-10-18 1993-04-30 Sharp Corp 半導体装置及びその製造方法
JPH1051147A (ja) * 1996-07-29 1998-02-20 Oki Electric Ind Co Ltd 分岐配線部品および配線構造
WO2006011320A1 (ja) * 2004-07-30 2006-02-02 Murata Manufacturing Co., Ltd. 複合型電子部品及びその製造方法
US7969009B2 (en) * 2008-06-30 2011-06-28 Qualcomm Incorporated Through silicon via bridge interconnect
US9059179B2 (en) 2011-12-28 2015-06-16 Broadcom Corporation Semiconductor package with a bridge interposer
US9831170B2 (en) * 2011-12-30 2017-11-28 Deca Technologies, Inc. Fully molded miniaturized semiconductor module
US9250403B2 (en) * 2013-04-26 2016-02-02 Oracle International Corporation Hybrid-integrated photonic chip package with an interposer
US9230936B2 (en) * 2014-03-04 2016-01-05 Qualcomm Incorporated Integrated device comprising high density interconnects and redistribution layers
US9666559B2 (en) 2014-09-05 2017-05-30 Invensas Corporation Multichip modules and methods of fabrication
US9368450B1 (en) * 2015-08-21 2016-06-14 Qualcomm Incorporated Integrated device package comprising bridge in litho-etchable layer
US20170092594A1 (en) * 2015-09-25 2017-03-30 Qualcomm Incorporated Low profile package with passive device
US9761533B2 (en) 2015-10-16 2017-09-12 Xilinx, Inc. Interposer-less stack die interconnect
US9799616B2 (en) 2016-03-08 2017-10-24 Dyi-chung Hu Package substrate with double sided fine line RDL
WO2017164810A1 (en) 2016-03-21 2017-09-28 Agency For Science, Technology And Research Semiconductor package and method of forming the same
WO2017171738A1 (en) * 2016-03-30 2017-10-05 Intel Corporation Hybrid microelectronic substrates
US10510721B2 (en) 2017-08-11 2019-12-17 Advanced Micro Devices, Inc. Molded chip combination
DE112017008327T5 (de) 2017-12-29 2020-10-08 Intel Corporation Mikroelektronische anordnungen
US10580738B2 (en) 2018-03-20 2020-03-03 International Business Machines Corporation Direct bonded heterogeneous integration packaging structures
US11869842B2 (en) * 2019-07-24 2024-01-09 Intel Corporation Scalable high speed high bandwidth IO signaling package architecture and method of making
US11289453B2 (en) * 2020-02-27 2022-03-29 Qualcomm Incorporated Package comprising a substrate and a high-density interconnect structure coupled to the substrate

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