JP2022550707A5 - - Google Patents

Info

Publication number
JP2022550707A5
JP2022550707A5 JP2022518633A JP2022518633A JP2022550707A5 JP 2022550707 A5 JP2022550707 A5 JP 2022550707A5 JP 2022518633 A JP2022518633 A JP 2022518633A JP 2022518633 A JP2022518633 A JP 2022518633A JP 2022550707 A5 JP2022550707 A5 JP 2022550707A5
Authority
JP
Japan
Prior art keywords
pad
base substrate
pads
pair
interconnection layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2022518633A
Other languages
English (en)
Japanese (ja)
Other versions
JP7617906B2 (ja
JP2022550707A (ja
Filing date
Publication date
Priority claimed from US16/585,299 external-priority patent/US11264314B2/en
Application filed filed Critical
Publication of JP2022550707A publication Critical patent/JP2022550707A/ja
Publication of JP2022550707A5 publication Critical patent/JP2022550707A5/ja
Application granted granted Critical
Publication of JP7617906B2 publication Critical patent/JP7617906B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2022518633A 2019-09-27 2020-08-26 基板への側面接続を含む相互接続 Active JP7617906B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16/585,299 2019-09-27
US16/585,299 US11264314B2 (en) 2019-09-27 2019-09-27 Interconnection with side connection to substrate
PCT/IB2020/057965 WO2021059052A1 (en) 2019-09-27 2020-08-26 Interconnection with side connection to substrate

Publications (3)

Publication Number Publication Date
JP2022550707A JP2022550707A (ja) 2022-12-05
JP2022550707A5 true JP2022550707A5 (enExample) 2022-12-12
JP7617906B2 JP7617906B2 (ja) 2025-01-20

Family

ID=75161694

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022518633A Active JP7617906B2 (ja) 2019-09-27 2020-08-26 基板への側面接続を含む相互接続

Country Status (6)

Country Link
US (1) US11264314B2 (enExample)
JP (1) JP7617906B2 (enExample)
CN (1) CN114342072B (enExample)
DE (1) DE112020004638T5 (enExample)
GB (1) GB2603345B (enExample)
WO (1) WO2021059052A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11004819B2 (en) * 2019-09-27 2021-05-11 International Business Machines Corporation Prevention of bridging between solder joints
US11715755B2 (en) * 2020-06-15 2023-08-01 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and method for forming integrated high density MIM capacitor
US11817392B2 (en) 2020-09-28 2023-11-14 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit
US11574817B2 (en) * 2021-05-05 2023-02-07 International Business Machines Corporation Fabricating an interconnection using a sacrificial layer
US11735529B2 (en) * 2021-05-21 2023-08-22 International Business Machines Corporation Side pad anchored by next adjacent via
US20230114404A1 (en) * 2021-09-30 2023-04-13 Qualcomm Incorporated Embedded trace substrate (ets) with embedded metal traces having multiple thickness for integrated circuit (ic) package height control
JPWO2024202681A1 (enExample) * 2023-03-30 2024-10-03
TWI880644B (zh) * 2024-02-26 2025-04-11 創意電子股份有限公司 中介層裝置及半導體封裝裝置

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5241456A (en) 1990-07-02 1993-08-31 General Electric Company Compact high density interconnect structure
US6544584B1 (en) 1997-03-07 2003-04-08 International Business Machines Corporation Process for removal of undesirable conductive material on a circuitized substrate and resultant circuitized substrate
JPH10290054A (ja) * 1997-04-16 1998-10-27 Sony Corp プリント配線基板
US7861915B2 (en) 2004-04-16 2011-01-04 Ms2 Technologies, Llc Soldering process
JP4997105B2 (ja) 2005-05-23 2012-08-08 イビデン株式会社 プリント配線板およびその製造方法
US7999383B2 (en) 2006-07-21 2011-08-16 Bae Systems Information And Electronic Systems Integration Inc. High speed, high density, low power die interconnect system
US20140145328A1 (en) 2009-07-13 2014-05-29 Georgia Tech Research Corporation Interconnect assemblies and methods of making and using same
JP5428667B2 (ja) 2009-09-07 2014-02-26 日立化成株式会社 半導体チップ搭載用基板の製造方法
JP2011082305A (ja) 2009-10-06 2011-04-21 Renesas Electronics Corp 半導体装置およびその製造方法
US8338287B2 (en) * 2010-03-24 2012-12-25 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
US8901431B2 (en) 2010-12-16 2014-12-02 Ibiden Co., Ltd. Printed wiring board and method for manufacturing printed wiring board
JP2012209418A (ja) 2011-03-30 2012-10-25 Kyocer Slc Technologies Corp 配線基板およびその製造方法
KR20140087541A (ko) 2012-12-31 2014-07-09 삼성전기주식회사 솔더 프린트된 회로 기판 및 회로기판의 솔더 프린팅 방법
US9646894B2 (en) * 2013-03-15 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging mechanisms for dies with different sizes of connectors
JP6131135B2 (ja) * 2013-07-11 2017-05-17 新光電気工業株式会社 配線基板及びその製造方法
US10249593B2 (en) 2014-06-20 2019-04-02 Agency For Science, Technology And Research Method for bonding a chip to a wafer
JP2016066745A (ja) 2014-09-25 2016-04-28 イビデン株式会社 プリント配線基板およびこれを備えた半導体装置
US9640521B2 (en) 2014-09-30 2017-05-02 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-die package with bridge layer and method for making the same
JP6434328B2 (ja) * 2015-02-04 2018-12-05 新光電気工業株式会社 配線基板及び電子部品装置とそれらの製造方法
EP3869409A1 (fr) * 2015-02-20 2021-08-25 Thales DIS France SA Procédé de fabrication d'un module électronique simple face comprenant des zones d'interconnexion
TWI575686B (zh) 2015-05-27 2017-03-21 南茂科技股份有限公司 半導體結構
DK3130407T3 (da) 2015-08-10 2021-02-01 Apator Miitors Aps Fremgangsmåde til binding af en piezoelektrisk ultralydstransducer
US9559081B1 (en) * 2015-08-21 2017-01-31 Apple Inc. Independent 3D stacking
US10896898B2 (en) * 2015-10-28 2021-01-19 Indiana Integrated Circuits, LLC Edge interconnect self-assembly substrate
KR102666151B1 (ko) 2016-12-16 2024-05-17 삼성전자주식회사 반도체 패키지
US11004824B2 (en) 2016-12-22 2021-05-11 Intel Corporation Scalable embedded silicon bridge via pillars in lithographically defined vias, and methods of making same
US10186478B2 (en) 2016-12-30 2019-01-22 Texas Instruments Incorporated Packaged semiconductor device with a particle roughened surface
JP6936584B2 (ja) * 2017-02-22 2021-09-15 株式会社アムコー・テクノロジー・ジャパン 電子デバイス及びその製造方法
US10622311B2 (en) 2017-08-10 2020-04-14 International Business Machines Corporation High-density interconnecting adhesive tape
US10522436B2 (en) * 2017-11-15 2019-12-31 Taiwan Semiconductor Manufacturing Company, Ltd. Planarization of semiconductor packages and structures resulting therefrom
US10163798B1 (en) 2017-12-22 2018-12-25 Intel Corporation Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same
US11166381B2 (en) 2018-09-25 2021-11-02 International Business Machines Corporation Solder-pinning metal pads for electronic components
US11574817B2 (en) * 2021-05-05 2023-02-07 International Business Machines Corporation Fabricating an interconnection using a sacrificial layer

Similar Documents

Publication Publication Date Title
JP2022550707A5 (enExample)
GB2603345A (en) Interconnection with side connection to substrate
JP3502776B2 (ja) バンプ付き金属箔及び回路基板及びこれを用いた半導体装置
EP3310140B1 (en) Mounting assembly with a heatsink
JP2020529742A5 (enExample)
JP2007013092A5 (enExample)
JPH09321073A (ja) 半導体装置用パッケージ及び半導体装置
JPH07183333A (ja) 電子パッケージおよびその作製方法
JPH06103698B2 (ja) 多数の回路要素を取り付けうる両面回路板
JP2000101270A (ja) 表面マウント熱コネクタ
TWI446508B (zh) 無核心式封裝基板及其製法
JP5173758B2 (ja) 半導体パッケージの製造方法
JP2004273777A (ja) 電子部品装置およびその製造方法
TW201628145A (zh) 電子封裝結構及其製法
JP3031323B2 (ja) 半導体装置とその製造方法
JP2009158741A5 (enExample)
JP2003142797A5 (enExample)
CN102655715A (zh) 柔性印刷电路板及其制造方法
JPH0719952B2 (ja) リード線のないチップパッケージ等の物品を接続する方法
JPH06140466A (ja) 半導体装置
JP2001291838A5 (ja) 半導体チップ及びその製造方法、半導体装置、回路基板並びに電子機器
JP2005302968A5 (enExample)
JP2001144399A (ja) 基板間接続部材、電子回路基板、電子回路装置及び電子回路装置の製造方法
JP2024508822A5 (enExample)
JPS5852836A (ja) 複合集積回路