JP2020529742A5 - - Google Patents

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Publication number
JP2020529742A5
JP2020529742A5 JP2020506738A JP2020506738A JP2020529742A5 JP 2020529742 A5 JP2020529742 A5 JP 2020529742A5 JP 2020506738 A JP2020506738 A JP 2020506738A JP 2020506738 A JP2020506738 A JP 2020506738A JP 2020529742 A5 JP2020529742 A5 JP 2020529742A5
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JP
Japan
Prior art keywords
interconnect
layer
chip
pads
interconnect layer
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JP2020506738A
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Japanese (ja)
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JP7116380B2 (ja
JP2020529742A (ja
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Priority claimed from US15/673,954 external-priority patent/US10622311B2/en
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JP2020506738A 2017-08-10 2018-08-01 チップを相互接続する構造を含む基板、電子デバイス、およびその製作する方法 Active JP7116380B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/673,954 2017-08-10
US15/673,954 US10622311B2 (en) 2017-08-10 2017-08-10 High-density interconnecting adhesive tape
PCT/IB2018/055761 WO2019030617A1 (en) 2017-08-10 2018-08-01 HIGH DENSITY INTERCONNECTION ADHESIVE TAPE

Publications (3)

Publication Number Publication Date
JP2020529742A JP2020529742A (ja) 2020-10-08
JP2020529742A5 true JP2020529742A5 (enExample) 2020-11-19
JP7116380B2 JP7116380B2 (ja) 2022-08-10

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JP2020506738A Active JP7116380B2 (ja) 2017-08-10 2018-08-01 チップを相互接続する構造を含む基板、電子デバイス、およびその製作する方法

Country Status (6)

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US (2) US10622311B2 (enExample)
JP (1) JP7116380B2 (enExample)
CN (1) CN110999551B (enExample)
DE (1) DE112018003103T5 (enExample)
GB (1) GB2579325A (enExample)
WO (1) WO2019030617A1 (enExample)

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