JP2017022346A - 半導体装置及び半導体装置の製造方法 - Google Patents

半導体装置及び半導体装置の製造方法 Download PDF

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Publication number
JP2017022346A
JP2017022346A JP2015141314A JP2015141314A JP2017022346A JP 2017022346 A JP2017022346 A JP 2017022346A JP 2015141314 A JP2015141314 A JP 2015141314A JP 2015141314 A JP2015141314 A JP 2015141314A JP 2017022346 A JP2017022346 A JP 2017022346A
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Japan
Prior art keywords
semiconductor
circuit board
semiconductor device
solder
units
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JP2015141314A
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English (en)
Inventor
典弘 梨子田
Norihiro Nashida
典弘 梨子田
秀世 仲村
Hideyo Nakamura
秀世 仲村
瑶子 中村
Yoko Nakamura
瑶子 中村
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Priority to JP2015141314A priority Critical patent/JP2017022346A/ja
Priority to US15/062,035 priority patent/US10068870B2/en
Priority to DE102016203581.9A priority patent/DE102016203581A1/de
Publication of JP2017022346A publication Critical patent/JP2017022346A/ja
Withdrawn legal-status Critical Current

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Abstract

【課題】半導体装置の品質の低下を抑制することができる。【解決手段】半導体装置は、絶縁板と回路板が積層して構成された積層基板と、回路板上に、不可逆的に相転移して固相状態を示す接合材により接合された半導体素子と、をそれぞれ備える複数の半導体ユニットを備える。さらに、半導体装置は、複数の半導体ユニットがはんだにより接合されたベース板と、複数の半導体ユニットを電気的に並列に接続する接続ユニットと、を有する。【選択図】図２

Description

本発明は、半導体装置及び半導体装置の製造方法に関する。
パワー半導体モジュール（半導体装置）では、ＩＧＢＴ（Insulated Gate Bipolar Transistor）、パワーＭＯＳＦＥＴ（Metal Oxide Semiconductor Field Effect Transistor）、ＦＷＤ（Free Wheeling Diode）等の半導体素子を含み、例えば、電力変換装置として広く用いられている。
半導体装置は、半導体ユニットを複数備え、電流容量の増大化が図られる。このような半導体ユニットにおいて、絶縁基板に配置された金属箔に、はんだを介して半導体素子の裏面電極が接合されている。さらに、半導体ユニットにおいて、プリント基板のスルーホールにはんだ付けされた導電ポストが、半導体素子のおもて面電極にはんだを介して接合されている。このような絶縁基板、半導体素子、プリント基板が樹脂により封止されて、半導体ユニットが構成される（例えば、特許文献１参照）。
さらに、複数のこのような半導体ユニットが、ベース板上にはんだを介して固着されて、ケースに収納されて半導体装置が構成される。
特開２００９−６４８５２号公報
半導体ユニットをベース板上にはんだを介して固着する際には、まず、ベース板上にはんだ板を配置し、さらに当該はんだ板上に半導体ユニットを配置する。そして、全体を加熱することで、はんだ板を溶融し、ベース板上に半導体ユニットをはんだにより固着することができる。
しかし、このような加熱を行う際に、半導体ユニット内の金属箔と半導体素子とを接合するはんだや、半導体素子と導電ポストとを接合するはんだが再溶融してしまう。再溶融したはんだは、半導体素子の電極と反応して合金層が生成される。すなわち、半導体素子の電極が再溶融したはんだに侵食されて消耗してしまう（はんだ食われ）。これにより、半導体素子の接合品質が低下することで半導体ユニットの特性が低下して、さらには、半導体装置の品質の低下にもつながってしまうおそれがある。
本発明はこのような点に鑑みてなされたものであり、半導体素子の電極の侵食が防止された半導体装置及び半導体装置の製造方法が提供されるようになる。
本発明の一観点によれば、絶縁板と回路板が積層して構成された積層基板と、前記回路板上に不可逆的に相転移して固相状態を示す接合材により接合された半導体素子と、をそれぞれ備える複数の半導体ユニットと、複数の前記半導体ユニットがそれぞれはんだにより接合されたベース板と、複数の前記半導体ユニットを電気的に並列に接続する接続ユニットと、を有する半導体装置が提供される。
また、本発明の別の一観点によれば、絶縁板と回路板が積層して構成された積層基板と、前記回路板上に不可逆的に相転移して固相状態を示す接合材により接合された半導体素子と、をそれぞれ備える複数の半導体ユニットと、複数の前記半導体ユニットがそれぞれはんだにより接合され、複数の前記半導体ユニットを電気的に並列に接続する接続ユニットと、を有する半導体装置が提供される。
さらに、本発明の一観点によれば、上記半導体装置の製造方法が提供される。
開示の技術によれば、半導体装置の品質の低下を抑制することができる。
実施の形態の半導体ユニットの断面図である。 実施の形態の半導体装置の断面図である。 実施の形態の半導体装置の平面図である。 実施の形態の半導体装置の製造方法を示すフローチャートである。
以下、図面を参照して実施の形態について説明する。
まず、実施の形態の半導体ユニットについて、図１を用いて説明する。
図１は、実施の形態の半導体ユニットの断面図である。
半導体ユニット１０は、積層基板１１と、半導体素子１２と、プリント基板１４と、制御端子１５ａ、主端子１５ｂとを備え、これらが樹脂１６により封止されて構成されている。
積層基板１１は、回路板１１ｃと、絶縁板１１ａと、金属板１１ｂとが積層して構成される。金属板１１ｂは、絶縁板１１ａの裏面に配置される。回路板１１ｃは、絶縁板１１ａのおもて面に配置され、半導体ユニット１０内部の所定の回路を構成するパターン形状を有している。絶縁板１１ａは例えば窒化アルミニウムや窒化珪素、酸化アルミニウム等の絶縁性セラミックスよりなり、金属板１１ｂ、回路板１１ｃは、例えば、銅やアルミよりなる。積層基板１１は、例えば、ＤＣＢ（Direct Copper Bond）基板や、ＡＭＢ（Active Metal Blazing）基板を用いることができる。
半導体素子１２は、例えば、ＩＧＢＴ、ＭＯＳＦＥＴ、ＦＷＤ等が適宜用いられる。また、半導体素子１２の裏面電極は、積層基板１１の回路板１１ｃ上に、接合材１３ａにより接合されている。接合材１３ａについては後述する。
プリント基板１４は、樹脂層１４ａと、樹脂層１４ａのおもて面及び裏面にそれぞれ配置された回路層１４ｂ，１４ｃとを有する。プリント基板１４には、プリント基板１４のおもて面側、裏面側にそれぞれ突出する複数の導電ポスト１４ｄが設けられている。これらの導電ポスト１４ｄは、回路層１４ｂ，１４ｃと電気的に接続されている。また、導電ポスト１４ｄは、半導体素子１２のおもて面電極（ゲート電極やエミッタ電極、ソース電極）に、上記接合材１３ａと同様に構成された接合材１３ｂにより固着されている。接合材１３ｂについては後述する。
複数の制御端子１５ａは、プリント基板１４に固定され、プリント基板１４の回路層１４ｂ，１４ｃに電気的に接続されている。制御端子１５ａは、外部から制御信号が入力されて、回路層１４ｂ，１４ｃ及び導電ポスト１４ｄを経由して、入力された制御信号を半導体素子１２に出力する。
複数の主端子１５ｂは、プリント基板１４のスルーホール（図示を省略）を貫通して、積層基板１１の回路板１１ｃに電気的に接続されている。主端子１５ｂは、プリント基板１４とは絶縁されている。半導体素子１２は、主端子１５ｂが外部の正極、負極がそれぞれ接続された状態で、入力される制御信号に応じた出力を行う。
接合材１３ａ及び接合材１３ｂは、不可逆的に相転移して固相状態を示す。接合材１３ａ，１３ｂは、所定の接合箇所に配置した時点の状態から固相状態に不可逆的に相転移するので、接合材１３ａ，１３ｂの融点は、接合前の状態よりも高まる。このような接合材１３ａ，１３ｂは、例えば、金属焼結体である。また、このような金属焼結体に含まれる金属の具体例としては、銀または銅が挙げられる。
次に、このような半導体ユニット１０を複数備える半導体装置について、図２及び図３を用いて説明する。
図２は、実施の形態の半導体装置の断面図であり、図３は、実施の形態の半導体装置の平面図である。なお、図３では、後述する蓋２５を取り外した場合であって、接続ユニット２３が露出している場合を表している。また、図３では、半導体ユニット１０の配置を実線で示している。
半導体装置２０は、図２に示されるように、複数の半導体ユニット１０と、ベース板２１と、接続ユニット２３とを備える。そして、ベース板２１に、複数の半導体ユニット１０がそれぞれはんだ２２ａにより接合されている。また、接続ユニット２３と、複数の半導体ユニット１０の制御端子１５ａ及び主端子１５ｂとが、はんだ２２ｂで接合されている。そして、接続ユニット２３により、複数の半導体ユニット１０が電気的に並列に接続されている。なお、本実施の形態では、半導体装置２０には、図３に示されるように、半導体ユニット１０が、縦横２列ずつの４つが搭載されている場合を例示している。
ベース板２１は、熱伝導率に優れた金属、例えば、銅やアルミにより構成されている。
接続ユニット２３は、プリント基板２３ａと、外部接続端子２３ｂと、外部制御端子２３ｃとを有する。プリント基板２３ａは、回路層（図示を省略）と絶縁層（図示を省略）とが複数積層されて構成されている。また、外部接続端子２３ｂは、プリント基板２３ａの対応する回路層に電気的に接続されている。そして、外部制御端子２３ｃは、プリント基板２３ａの対応する回路層に電気的に接続されている。なお、各外部接続端子２３ｂは、プリント基板２３ａの対応する回路層を経由して、半導体ユニット１０の主端子１５ｂと電気的に接続されている。また、外部制御端子２３ｃは、プリント基板２３ａの対応する回路層を経由して、半導体ユニット１０の制御端子１５ａと電気的に接続されている。
ケース２４が、ベース板２１の裏面を露出させて、その他の構成の外囲を囲む。また、蓋２５が、接続ユニット２３の上部を覆い、各構成がケース２４及び蓋２５の内側に収納される。なお、外部接続端子２３ｂは、蓋２５の開口部２５ａから突出し、外部制御端子２３ｃは、ケース２４の開口部２４ａから突出している。また、ケース２４及び蓋２５の内側に樹脂２６が充填され、ベース板２１と、半導体ユニット１０と、接続ユニット２３とが樹脂２６で封止されている。なお、外部制御端子２３ｃと、外部装置との接続は、例えば、蓋２５に埋め込まれたナット（図示せず）と、それにねじ止め可能なボルトを用いて行うことができる。その場合は、外部制御端子２３ｃに設けられた孔とナットのネジ孔の位置を合わせ、それらの孔にボルトを差し込んでねじ止めすればよい。
次に、このような半導体装置２０の製造方法について、図１及び図２並びに図４を用いて説明する。
図４は、実施の形態の半導体装置の製造方法を示すフローチャートである。
半導体装置２０の製造方法は、大きく分けて、半導体ユニット１０の組み立て工程（ステップＳ１１〜Ｓ１８）と、半導体ユニット１０を用いた半導体装置２０の組み立て工程（ステップＳ２１〜Ｓ２８）とを有する。
まず、半導体ユニット１０の組み立て工程について説明する。
［ステップＳ１１］ 積層基板１１、プリント基板１４を形成する。
積層基板１１は、絶縁板１１ａの裏面に金属板１１ｂを形成し、絶縁板１１ａのおもて面に所定パターンの回路板１１ｃを形成する。
プリント基板１４は、樹脂層１４ａのおもて面、裏面にそれぞれ所定パターンの回路層１４ｂ，１４ｃをそれぞれ形成する。そして、導電ポスト１４ｄ及び制御端子１５ａを、回路層１４ｂ，１４ｃに電気的に接続されるように取り付ける。
［ステップＳ１２］ 積層基板１１の回路板１１ｃ上の、半導体素子１２を搭載する領域（以下、素子搭載領域と呼称）に、金属ペースト材を塗布する。
金属ペースト材は、溶剤に、金属ナノ粒子が分散されたものである。金属ナノ粒子は、例えば、銅または銀のナノ粒子である。
［ステップＳ１３］ 積層基板１１を加熱（プリベーク）して、金属ペースト材から溶剤を蒸発させる。
なお、プリベークで溶剤が蒸発して、積層基板１１の素子搭載領域上に金属ナノ粒子がナノポーラスに凝集した金属ナノ粒子層が生成される。
［ステップＳ１４］ 金属ナノ粒子層が生成された素子搭載領域上に半導体素子１２を配置して、プリベークよりも高い２５０℃程度の温度で加熱しながら金属ナノ粒子層を押圧する。
このように加熱しながら押圧することで、半導体素子１２の裏面と積層基板１１の素子搭載領域との間で金属ナノ粒子が凝集して焼結し、固相状態に相転移する。この焼結により、半導体素子１２と積層基板１１との間に強固な金属焼結体である接合材１３ａが形成される。このようにして形成された接合材１３ａは、金属焼結体であるために、その融点が母材の金属と同等となる（例えば銀であれば約９６０℃）。すなわち、接合材１３ａの融点は、はんだの融点である約２５０℃よりも十分高くなる。
このようにして、積層基板１１に対して半導体素子１２が固着される。
［ステップＳ１５］ 半導体素子１２上の、導電ポスト１４ｄとの接合領域に、ステップＳ１２と同様に、金属ペースト材を塗布する。
［ステップＳ１６］ ステップＳ１３と同様に、積層基板１１を加熱（プリベーク）して、金属ペースト材から溶剤を蒸発させる。そして、半導体素子１２上に、金属ナノ粒子層が生成される。
［ステップＳ１７］ 半導体素子１２の金属ナノ粒子層が生成された接合領域上に、プリント基板１４に固定された導電ポスト１４ｄの先端部を配置する。そして、ステップＳ１４と同様に、プリベークよりも高い２５０℃程度の温度で加熱しながら金属ナノ粒子層を押圧する。
このように加熱しながら押圧することで、導電ポスト１４ｄの先端部と半導体素子１２の接合領域との間で金属ナノ粒子が凝集して焼結し、固相状態に相転移する。この焼結により、半導体素子１２と導電ポスト１４ｄとの間に強固な金属焼結体である接合材１３ｂが形成される。このようにして形成された接合材１３ｂは、接合材１３ａと同様に、金属焼結体であるために、その融点が、はんだの融点よりも十分高くなる。
このようにして、半導体素子１２に対して導電ポスト１４ｄが固着され、積層基板１１に対向してプリント基板１４を配置することができる。
なお、この後、プリント基板１４のスルーホール（図示を省略）から主端子１５ｂを挿通させて、主端子１５ｂを積層基板１１の回路板１１ｃに電気的に接合させる。主端子１５ｂと回路板１１ｃとの接合にも、金属焼結体である接合材１３ａ，１３ｂが適している。
また、主端子１５ｂをあらかじめプリント基板１４に圧入で保持させておき、半導体素子１２と導電ポスト１４ｄとの接合と同時に、主端子１５ｂと回路板１１ｃとを接合してもよい。
［ステップＳ１８］ ステップＳ１１〜Ｓ１７で組み立てた構成を、制御端子１５ａ、主端子１５ｂが突出するようにエポキシ樹脂等の樹脂１６で封止する。これにより、半導体ユニット１０（図１）が得られる。
以上により、半導体ユニット１０の組み立て工程が終了する。
次いで、半導体装置２０の組み立て工程について説明する。
［ステップＳ２１］ ベース板２１上の半導体ユニット搭載領域に、はんだ２２ａを塗布する。
［ステップＳ２２］ 塗布されたはんだ２２ａ上に、ステップＳ１１〜Ｓ１８で作成した半導体ユニット１０を複数配置する。
［ステップＳ２３］ 配置された複数の半導体ユニット１０に、接続ユニット２３を取り付ける。
取り付けの際には、半導体ユニット１０の制御端子１５ａ及び主端子１５ｂを、接続ユニット２３のプリント基板２３ａの所定の箇所に貫通させる。そして、プリント基板２３ａから、制御端子１５ａ、主端子１５ｂの先端部を突出させる。
［ステップＳ２４］ プリント基板２３ａから突出した、制御端子１５ａ及び主端子１５ｂの先端部に、はんだ２２ｂを塗布する。
［ステップＳ２５］ 全体を加熱して、ステップＳ２２，Ｓ２３で塗布したはんだを溶融する。なお、加熱温度は、はんだの融点温度よりも高い温度、例えば、３００℃程度とし、はんだを十分溶融させる。そして、全体を冷却して、はんだを固化する。
これにより、半導体ユニット１０とベース板２１とが接合され、制御端子１５ａ及び主端子１５ｂとプリント基板２３ａとが接合される。
この際、このような温度で加熱しても、半導体ユニット１０の内部では、金属焼結体である接合材１３ａ及び接合材１３ｂは溶融することはない。このため、半導体素子１２の各電極の侵食が防止される。
［ステップＳ２６］ ベース板２１と、複数の半導体ユニット１０と、接続ユニット２３とを囲うように、ケース２４を装着する。この際、ケース２４の開口部２４ａから、接続ユニット２３の外部制御端子２３ｃが外部に突出され、ベース板２１が裏面側から露出される。
［ステップＳ２７］ ステップＳ２６で装着したケース２４に囲まれた内部空間に樹脂（またはゲル）を注入する。これにより、ベース板２１と、複数の半導体ユニット１０と、接続ユニット２３とを樹脂２６で封止する。
［ステップＳ２８］ 接続ユニット２３の上部から蓋２５を装着する。この際、接続ユニット２３の外部接続端子２３ｂが、蓋２５の開口部２５ａから外部に突出される。これにより、半導体装置２０（図２）が得られる。
以上により、半導体装置２０の組み立て工程が終了する。
このように、半導体ユニット１０内部の半導体素子１２を、不可逆的に相転移して固相状態を示す接合材により接合することにより、半導体素子１２の電極の侵食を防止することができる。したがって、半導体装置２０の品質の低下が抑制され、半導体装置２０の組み立て良品率が向上するようになる。
仮に、半導体素子１２を高融点はんだ（例えば、融点４００℃）で接合しても、再溶融による電極の侵食を防止することができる。しかしながらこの場合は、接合温度が４００℃以上となるため、高融点はんだでの接合時に、半導体ユニット１０の積層基板１１やプリント基板１４に過大な熱応力が残留する。さらに、プリント基板１４の樹脂層１４ａの劣化も起こりうる。そのため、半導体ユニット１０の信頼性の悪化が懸念される。
しかしながら、本実施の形態においては、半導体ユニット１０の接合温度が２５０℃程度のため、上記のような問題点は無く、信頼性の高い半導体ユニット１０が作製できる。
なお、本発明は、上記の実施の形態に限られない。例えば、ベース板２１が含まれず、半導体ユニット１０の積層基板１１が、半導体装置の裏面から直接露出している構造も含まれる。この場合も、複数の半導体ユニット１０と、接続ユニット２３との接合にはんだ２２ｂを用いる際に、半導体素子１２の電極の侵食を防止することができる。
またこの場合の製造方法は、上記実施の形態のステップＳ２１及びＳ２２を省略する形で工程を組めばよい。
１０ 半導体ユニット
１１ 積層基板
１１ａ 絶縁板
１１ｂ 金属板
１１ｃ 回路板
１２ 半導体素子
１３ａ，１３ｂ 接合材
１４，２３ａ プリント基板
１４ａ 樹脂層
１４ｂ，１４ｃ 回路層
１４ｄ 導電ポスト
１５ａ 制御端子
１５ｂ 主端子
１６，２６ 樹脂
２０ 半導体装置
２１ ベース板
２２ａ，２２ｂ はんだ
２３ 接続ユニット
２３ｂ 外部接続端子
２３ｃ 外部制御端子
２４ ケース
２４ａ，２５ａ 開口部
２５ 蓋

Claims (9)

  1. 絶縁板と回路板が積層して構成された積層基板と、前記回路板上に不可逆的に相転移して固相状態を示す接合材により接合された半導体素子と、をそれぞれ備える複数の半導体ユニットと、
    複数の前記半導体ユニットがそれぞれはんだにより接合されたベース板と、
    複数の前記半導体ユニットを電気的に並列に接続する接続ユニットと、
    を有する半導体装置。
  2. 前記接続ユニットと、複数の前記半導体ユニットがそれぞれはんだにより接合された、
    請求項１記載の半導体装置。
  3. 絶縁板と回路板が積層して構成された積層基板と、前記回路板上に不可逆的に相転移して固相状態を示す接合材により接合された半導体素子と、をそれぞれ備える複数の半導体ユニットと、
    複数の前記半導体ユニットがそれぞれはんだにより接合され、複数の前記半導体ユニットを電気的に並列に接続する接続ユニットと、
    を有する半導体装置。
  4. 前記接合材は、金属焼結体である、
    請求項１乃至３のいずれかに記載の半導体装置。
  5. 前記金属焼結体は、銀または銅を含む、
    請求項４記載の半導体装置。
  6. 前記半導体ユニットは、
    前記半導体素子の主電極に前記接合材により一端部が接合された導電ポストと、
    前記半導体素子に対向して配置されたプリント基板と、をさらに備える、
    請求項１乃至５のいずれかに記載の半導体装置。
  7. 絶縁板と回路板が積層して構成された積層基板の前記回路板上に、不可逆的に相転移して固相状態を示す接合材により半導体素子を接合して、半導体ユニットを形成する工程と、
    複数の前記半導体ユニットを、それぞれはんだにより金属ベースに接合する工程と、
    複数の前記半導体ユニットを、接続ユニットで電気的に並列に接続する工程と、
    を有する半導体装置の製造方法。
  8. 絶縁板と回路板が積層して構成された積層基板の前記回路板上に、不可逆的に相転移して固相状態を示す接合材により半導体素子を接合して、半導体ユニットを形成する工程と、
    複数の前記半導体ユニットを、それぞれはんだにより接続ユニットに接合して、前記接続ユニットで電気的に並列に接続する工程と、
    を有する半導体装置の製造方法。
  9. 前記回路板上に、金属粒子を含む金属ペースト材を塗布し、前記金属ペースト材を前記半導体素子で押圧して、前記金属ペースト材から前記接合材に相転移させる、
    請求項７または８に記載の半導体装置の製造方法。
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