JP2016529702A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2016529702A5 JP2016529702A5 JP2016527009A JP2016527009A JP2016529702A5 JP 2016529702 A5 JP2016529702 A5 JP 2016529702A5 JP 2016527009 A JP2016527009 A JP 2016527009A JP 2016527009 A JP2016527009 A JP 2016527009A JP 2016529702 A5 JP2016529702 A5 JP 2016529702A5
- Authority
- JP
- Japan
- Prior art keywords
- tiers
- monolithic
- 3dic
- tier
- providing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims 7
- 230000006870 function Effects 0.000 claims 6
- 238000005516 engineering process Methods 0.000 claims 4
- 230000001413 cellular effect Effects 0.000 claims 1
- 238000004891 communication Methods 0.000 claims 1
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201361846648P | 2013-07-16 | 2013-07-16 | |
| US61/846,648 | 2013-07-16 | ||
| US14/013,399 US9418985B2 (en) | 2013-07-16 | 2013-08-29 | Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology |
| US14/013,399 | 2013-08-29 | ||
| PCT/US2014/046503 WO2015009614A1 (en) | 2013-07-16 | 2014-07-14 | Complete system-on-chip (soc) using monolithic three dimensional (3d) integrated circuit (ic) (3dic) technology |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2016529702A JP2016529702A (ja) | 2016-09-23 |
| JP2016529702A5 true JP2016529702A5 (enExample) | 2016-11-17 |
Family
ID=52343114
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016527009A Pending JP2016529702A (ja) | 2013-07-16 | 2014-07-14 | モノリシック3次元(3d)集積回路(ic)(3dic)技術を使用した完全システムオンチップ(soc) |
Country Status (9)
| Country | Link |
|---|---|
| US (2) | US9418985B2 (enExample) |
| EP (1) | EP3022766A1 (enExample) |
| JP (1) | JP2016529702A (enExample) |
| KR (1) | KR101832330B1 (enExample) |
| CN (1) | CN105378918B (enExample) |
| BR (1) | BR112016000868B1 (enExample) |
| CA (1) | CA2917586C (enExample) |
| TW (1) | TWI618222B (enExample) |
| WO (1) | WO2015009614A1 (enExample) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9418985B2 (en) | 2013-07-16 | 2016-08-16 | Qualcomm Incorporated | Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology |
| ES2798115T3 (es) * | 2014-06-20 | 2020-12-09 | Nagravision Sa | Módulo de interfaz física |
| US9256246B1 (en) * | 2015-01-29 | 2016-02-09 | Qualcomm Incorporated | Clock skew compensation with adaptive body biasing in three-dimensional (3D) integrated circuits (ICs) (3DICs) |
| US9628077B2 (en) * | 2015-03-04 | 2017-04-18 | Qualcomm Incorporated | Dual power swing pipeline design with separation of combinational and sequential logics |
| CN105391823B (zh) * | 2015-11-25 | 2019-02-12 | 上海新储集成电路有限公司 | 一种降低移动设备尺寸和功耗的方法 |
| CN105742277B (zh) * | 2016-04-13 | 2018-06-22 | 中国航天科技集团公司第九研究院第七七一研究所 | 一种大容量立体集成sram存储器三维扩展方法 |
| US9523760B1 (en) * | 2016-04-15 | 2016-12-20 | Cognitive Systems Corp. | Detecting motion based on repeated wireless transmissions |
| US9754923B1 (en) * | 2016-05-09 | 2017-09-05 | Qualcomm Incorporated | Power gate placement techniques in three-dimensional (3D) integrated circuits (ICs) (3DICs) |
| US9929149B2 (en) | 2016-06-21 | 2018-03-27 | Arm Limited | Using inter-tier vias in integrated circuits |
| US9871020B1 (en) * | 2016-07-14 | 2018-01-16 | Globalfoundries Inc. | Through silicon via sharing in a 3D integrated circuit |
| US10678985B2 (en) * | 2016-08-31 | 2020-06-09 | Arm Limited | Method for generating three-dimensional integrated circuit design |
| US9712168B1 (en) * | 2016-09-14 | 2017-07-18 | Qualcomm Incorporated | Process variation power control in three-dimensional (3D) integrated circuits (ICs) (3DICs) |
| US10176147B2 (en) * | 2017-03-07 | 2019-01-08 | Qualcomm Incorporated | Multi-processor core three-dimensional (3D) integrated circuits (ICs) (3DICs), and related methods |
| US10727965B2 (en) * | 2017-11-21 | 2020-07-28 | Western Digital Technologies, Inc. | System and method for time stamp synchronization |
| US10719100B2 (en) | 2017-11-21 | 2020-07-21 | Western Digital Technologies, Inc. | System and method for time stamp synchronization |
| CN110069795A (zh) * | 2018-01-23 | 2019-07-30 | 长芯半导体有限公司 | 快速定制芯片方法 |
| GB2586050B (en) * | 2019-07-31 | 2021-11-10 | Murata Manufacturing Co | Power supply output device |
| GB2586049B (en) * | 2019-07-31 | 2022-03-09 | Murata Manufacturing Co | Power supply output device |
| US11270917B2 (en) * | 2020-06-01 | 2022-03-08 | Alibaba Group Holding Limited | Scalable and flexible architectures for integrated circuit (IC) design and fabrication |
| CN112769402B (zh) * | 2020-12-21 | 2024-05-17 | 中国航天科工集团八五一一研究所 | 基于TSV技术的X/Ku波段宽带变频组件 |
| EP4024222A1 (en) | 2021-01-04 | 2022-07-06 | Imec VZW | An integrated circuit with 3d partitioning |
| KR102443742B1 (ko) * | 2021-02-08 | 2022-09-15 | 고려대학교 산학협력단 | 모놀리식 3d 집적 기술 기반 스크래치패드 메모리 |
| US12230607B2 (en) * | 2021-03-31 | 2025-02-18 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor device including power management die in a stack and methods of forming the same |
| KR20240033841A (ko) | 2022-09-06 | 2024-03-13 | 삼성전자주식회사 | 반도체 장치 |
| WO2025117577A1 (en) * | 2023-12-01 | 2025-06-05 | The Penn State Research Foundation | Monolithic three-dimensional (3d) integration of two dimensional (2d) field effect transistors (fets) |
Family Cites Families (34)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61131474A (ja) * | 1984-11-30 | 1986-06-19 | Agency Of Ind Science & Technol | 積層型半導体装置 |
| US6046078A (en) * | 1997-04-28 | 2000-04-04 | Megamos Corp. | Semiconductor device fabrication with reduced masking steps |
| US20030015768A1 (en) | 2001-07-23 | 2003-01-23 | Motorola, Inc. | Structure and method for microelectromechanical system (MEMS) devices integrated with other semiconductor structures |
| WO2003030252A2 (en) | 2001-09-28 | 2003-04-10 | Hrl Laboratories, Llc | Process for producing interconnects |
| US7126214B2 (en) * | 2001-12-05 | 2006-10-24 | Arbor Company Llp | Reconfigurable processor module comprising hybrid stacked integrated circuit die elements |
| JP2004165269A (ja) * | 2002-11-11 | 2004-06-10 | Canon Inc | 積層形半導体装置 |
| KR100569590B1 (ko) | 2003-12-30 | 2006-04-10 | 매그나칩 반도체 유한회사 | 고주파 반도체 장치 및 그 제조방법 |
| DE102006030267B4 (de) * | 2006-06-30 | 2009-04-16 | Advanced Micro Devices, Inc., Sunnyvale | Nano-Einprägetechnik mit erhöhter Flexibilität in Bezug auf die Justierung und die Formung von Strukturelementen |
| US8136071B2 (en) | 2007-09-12 | 2012-03-13 | Neal Solomon | Three dimensional integrated circuits and methods of fabrication |
| US7692448B2 (en) | 2007-09-12 | 2010-04-06 | Neal Solomon | Reprogrammable three dimensional field programmable gate arrays |
| EP2161238B1 (fr) * | 2008-09-03 | 2011-06-08 | STMicroelectronics (Tours) SAS | Structure tridimensionnelle très haute densité |
| US8115511B2 (en) * | 2009-04-14 | 2012-02-14 | Monolithic 3D Inc. | Method for fabrication of a semiconductor device and structure |
| US7986042B2 (en) * | 2009-04-14 | 2011-07-26 | Monolithic 3D Inc. | Method for fabrication of a semiconductor device and structure |
| US20110199116A1 (en) | 2010-02-16 | 2011-08-18 | NuPGA Corporation | Method for fabrication of a semiconductor device and structure |
| KR20120027339A (ko) * | 2009-05-14 | 2012-03-21 | 에스알아이 인터내셔널 | 유기 광전자 소자를 위한 저비용 고효율의 투명한 유기 전극 |
| TWI501380B (zh) * | 2010-01-29 | 2015-09-21 | Nat Chip Implementation Ct Nat Applied Res Lab | 多基板晶片模組堆疊之三維系統晶片結構 |
| US8450779B2 (en) | 2010-03-08 | 2013-05-28 | International Business Machines Corporation | Graphene based three-dimensional integrated circuit device |
| JP2012019018A (ja) * | 2010-07-07 | 2012-01-26 | Toshiba Corp | 半導体装置及びその製造方法 |
| CN102024782B (zh) * | 2010-10-12 | 2012-07-25 | 北京大学 | 三维垂直互联结构及其制作方法 |
| EP2469597A3 (en) | 2010-12-23 | 2016-06-29 | Commissariat à l'Énergie Atomique et aux Énergies Alternatives | Multi-level integrated circuit, device and method for modeling multi-level integrated circuits |
| TWI496271B (zh) * | 2010-12-30 | 2015-08-11 | 財團法人工業技術研究院 | 晶圓級模封接合結構及其製造方法 |
| DE102011004581A1 (de) * | 2011-02-23 | 2012-08-23 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Technik zur Reduzierung der plasmahervorgerufenen Ätzschäden während der Herstellung von Kontaktdurchführungen in Zwischenschichtdielektrika durch modifizierten HF-Leistungshochlauf |
| US8975670B2 (en) | 2011-03-06 | 2015-03-10 | Monolithic 3D Inc. | Semiconductor device and structure for heat removal |
| JP6019599B2 (ja) * | 2011-03-31 | 2016-11-02 | ソニー株式会社 | 半導体装置、および、その製造方法 |
| WO2013052679A1 (en) | 2011-10-04 | 2013-04-11 | Qualcomm Incorporated | Monolithic 3-d integration using graphene |
| US9496255B2 (en) * | 2011-11-16 | 2016-11-15 | Qualcomm Incorporated | Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same |
| JP5981711B2 (ja) * | 2011-12-16 | 2016-08-31 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
| JP2013215917A (ja) | 2012-04-05 | 2013-10-24 | Seiko Epson Corp | 印刷装置、及び、印刷方法 |
| CN103545275B (zh) * | 2012-07-12 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | 硅通孔封装结构及形成方法 |
| US8889491B2 (en) * | 2013-01-28 | 2014-11-18 | International Business Machines Corporation | Method of forming electronic fuse line with modified cap |
| US9171608B2 (en) * | 2013-03-15 | 2015-10-27 | Qualcomm Incorporated | Three-dimensional (3D) memory cell separation among 3D integrated circuit (IC) tiers, and related 3D integrated circuits (3DICS), 3DIC processor cores, and methods |
| KR20140113024A (ko) * | 2013-03-15 | 2014-09-24 | 에스케이하이닉스 주식회사 | 저항 변화 메모리 장치 및 그 구동방법 |
| US9418985B2 (en) | 2013-07-16 | 2016-08-16 | Qualcomm Incorporated | Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology |
| US9070711B2 (en) * | 2013-08-02 | 2015-06-30 | Globalfoundries Inc. | Methods of forming cap layers for semiconductor devices with self-aligned contact elements and the resulting devices |
-
2013
- 2013-08-29 US US14/013,399 patent/US9418985B2/en not_active Expired - Fee Related
-
2014
- 2014-06-30 TW TW103122569A patent/TWI618222B/zh not_active IP Right Cessation
- 2014-07-14 KR KR1020167003723A patent/KR101832330B1/ko not_active Expired - Fee Related
- 2014-07-14 JP JP2016527009A patent/JP2016529702A/ja active Pending
- 2014-07-14 EP EP14747230.2A patent/EP3022766A1/en not_active Ceased
- 2014-07-14 BR BR112016000868-5A patent/BR112016000868B1/pt active IP Right Grant
- 2014-07-14 CA CA2917586A patent/CA2917586C/en active Active
- 2014-07-14 CN CN201480039458.6A patent/CN105378918B/zh active Active
- 2014-07-14 WO PCT/US2014/046503 patent/WO2015009614A1/en not_active Ceased
-
2016
- 2016-08-09 US US15/231,836 patent/US9583473B2/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2016529702A5 (enExample) | ||
| US10892215B2 (en) | Metal on both sides with power distributed through the silicon | |
| JP2016511542A5 (enExample) | ||
| CN106797205B (zh) | 用于形成背面管芯平面器件和saw滤波器的方法和装置 | |
| US9343369B2 (en) | Three dimensional (3D) integrated circuits (ICs) (3DICs) and related systems | |
| CN104253740B (zh) | 图片签到方法、装置及系统 | |
| US9041220B2 (en) | Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device | |
| US9213358B2 (en) | Monolithic three dimensional (3D) integrated circuit (IC) (3DIC) cross-tier clock skew management systems, methods and related components | |
| KR101910439B1 (ko) | 고 전압 허용 워드-라인 구동기 | |
| KR101607260B1 (ko) | 파워 게이트 스위치 아키텍처 | |
| US9275688B2 (en) | Semiconductor device and semiconductor package | |
| US9859253B1 (en) | Integrated circuit package stack | |
| JP2016528727A5 (enExample) | ||
| JP2015503816A5 (enExample) | ||
| US10559520B2 (en) | Bulk layer transfer processing with backside silicidation | |
| JP2018518763A5 (enExample) | ||
| WO2015023290A1 (en) | Memory cell with retention using resistive memory | |
| JP2018518835A (ja) | パッケージ構造にトレンチを形成する方法及びこの方法により形成された構造 | |
| JP2013150303A (ja) | ワイヤレスネットワークを介してデータを送信可能なセキュアデジタルカード | |
| CN105516784A (zh) | 虚拟物品显示方法及装置 | |
| JP6147930B2 (ja) | 垂直メモリ構成要素を有するモノリシック3次元(3d)集積回路(ics)(3dic) | |
| JP2017528813A5 (enExample) | ||
| KR20170097009A (ko) | 에어갭 통합 커패시턴스 이익을 갖는 비아 자체 정렬 및 단락 개선 | |
| WO2014137710A3 (en) | Integrated circuit floorplan for compact clock distribution | |
| WO2015012786A1 (en) | Game load management |