JP2016529702A5 - - Google Patents

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JP2016529702A5
JP2016529702A5 JP2016527009A JP2016527009A JP2016529702A5 JP 2016529702 A5 JP2016529702 A5 JP 2016529702A5 JP 2016527009 A JP2016527009 A JP 2016527009A JP 2016527009 A JP2016527009 A JP 2016527009A JP 2016529702 A5 JP2016529702 A5 JP 2016529702A5
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tiers
monolithic
3dic
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Priority claimed from US14/013,399 external-priority patent/US9418985B2/en
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Claims (20)

重ねて配置された複数のティアと、
計算、デジタル処理、アナログ処理、無線周波数（ＲＦ）信号処理、アナログ／混合信号処理、電力管理、センサー、電源、バッテリー、メモリ、デジタル論理、低漏れ、低雑音／高利得、クロック、組合せ論理、および順序論理からなるグループから選択された複数の機能要素と、
前記複数のティアの間に分散された前記複数の機能要素と、
前記複数のティアを電気的に結合する複数のモノリシックティア間ビア（ＭＩＶ）と、
自己充足型システムオンチップ（ＳＯＣ）を与える前記複数の機能要素と
を備える、モノリシック３次元（３Ｄ）集積回路（ＩＣ）（３ＤＩＣ）システム。 Multiple tiers placed one above the other,
Calculation, digital processing, analog processing, radio frequency (RF) signal processing, analog / mixed signal processing, power management, sensors, power supply, battery, memory, digital logic, low leakage, low noise / high gain, clock, combinational logic, And a plurality of functional elements selected from the group consisting of sequential logic,
The plurality of functional elements distributed among the plurality of tiers;
A plurality of inter-monolithic vias (MIVs) that electrically couple the plurality of tiers;
Self give satisfaction systems-on-chip (SOC) and a plurality of functional elements, monolithic three dimensional (3D) integrated circuit (IC) (3DIC) system. 前記複数のティアの各々が同等の水平寸法を有する、請求項１に記載のモノリシック３ＤＩＣシステム。 The monolithic 3DIC system of claim 1, wherein each of the plurality of tiers has an equivalent horizontal dimension. 前記複数のティアのうちの少なくとも１つのティアが高速動作のために最適化される、請求項１に記載のモノリシック３ＤＩＣシステム。 The monolithic 3DIC system of claim 1, wherein at least one tier of the plurality of tiers is optimized for high speed operation. 前記複数のティアのうちの少なくとも１つのティアが低電流漏れのために最適化される、請求項１に記載のモノリシック３ＤＩＣシステム。 The monolithic 3DIC system of claim 1, wherein at least one tier of the plurality of tiers is optimized for low current leakage. 前記複数の機能要素のうちの異なる機能要素が前記複数のティアのうちの異なるティア上に配置される、請求項１に記載のモノリシック３ＤＩＣシステム。 The monolithic 3DIC system according to claim 1, wherein different functional elements of the plurality of functional elements are arranged on different tiers of the plurality of tiers. 前記複数のティアの第１のティアが、前記グループからの第１の機能を最適化するように構成された第１の技術タイプを備える、請求項１に記載のモノリシック３ＤＩＣシステム。 The monolithic 3DIC system of claim 1, wherein a first tier of the plurality of tiers comprises a first technology type configured to optimize a first function from the group. 前記複数のティアの第２のティアが、前記グループからの第２の機能を最適化するように構成された第２の技術タイプを備える、請求項６に記載のモノリシック３ＤＩＣシステム。 The monolithic 3DIC system of claim 6, wherein a second tier of the plurality of tiers comprises a second technology type configured to optimize a second function from the group. 前記複数のティアが第３のティアをさらに備える、請求項１に記載のモノリシック３ＤＩＣシステム。 The monolithic 3DIC system of claim 1, wherein the plurality of tiers further comprises a third tier. 前記モノリシック３ＤＩＣシステムがＲＦトランシーバとして動作する、請求項１に記載のモノリシック３ＤＩＣシステム。 The monolithic 3DIC system operates as an RF transceiver, monolithic 3DIC system according to claim 1. 前記ＩＣがそこに一体化される、セットトップボックス、エンターテインメントユニット、ナビゲーションデバイス、通信デバイス、固定ロケーションデータユニット、モバイルロケーションデータユニット、モバイルフォン、セルラーフォン、コンピュータ、ポータブルコンピュータ、デスクトップコンピュータ、携帯情報端末（ＰＤＡ）、モニタ、コンピュータモニタ、テレビジョン、チューナー、ラジオ、衛星ラジオ、音楽プレーヤ、デジタル音楽プレーヤ、ポータブル音楽プレーヤ、デジタルビデオプレーヤ、ビデオプレーヤ、デジタルビデオディスク（ＤＶＤ）プレーヤ、およびポータブルデジタルビデオプレーヤからなる前記グループから選択されたデバイスをさらに備える、請求項１に記載のモノリシック３ＤＩＣ。 Set-top box, entertainment unit, navigation device, communication device, fixed location data unit, mobile location data unit, mobile phone, cellular phone, computer, portable computer, desktop computer, personal digital assistant, in which the IC is integrated (PDA), monitor, computer monitor, television, tuner, radio, satellite radio, music player, digital music player, portable music player, digital video player, video player, digital video disc (DVD) player, and portable digital video player The monolithic 3DIC of claim 1, further comprising a device selected from the group consisting of: 重ねて配置された複数のティアと、
計算、デジタル処理、アナログ処理、無線周波数（ＲＦ）信号処理、アナログ／混合信号処理、電力管理、センサー、電源、バッテリー、メモリ、デジタル論理、低漏れ、低雑音／高利得、クロック、組合せ論理、および順序論理からなるグループから選択された複数の機能を与えるための手段と、
前記複数のティア間に分散された前記複数の機能を与えるための前記手段と、
前記複数のティアを電気的に相互結合するための手段と、
自己充足型システムオンチップ（ＳＯＣ）を与える前記複数の機能を与えるための前記手段と
を備える、モノリシック３次元（３Ｄ）集積回路（ＩＣ）（３ＤＩＣ）システム。 Multiple tiers placed one above the other,
Calculation, digital processing, analog processing, radio frequency (RF) signal processing, analog / mixed signal processing, power management, sensors, power supply, battery, memory, digital logic, low leakage, low noise / high gain, clock, combinational logic, And means for providing a plurality of functions selected from the group consisting of sequential logic;
Said means for providing said plurality of functions distributed among said plurality of tiers;
Means for electrically interconnecting the plurality of tiers;
Self give satisfaction systems-on-chip (SOC) and a said means for providing said plurality of functional, monolithic three dimensional (3D) integrated circuit (IC) (3DIC) system. 前記複数のティアを電気的に相互結合するための前記手段が、モノリシックティア間ビア（ＭＩＶ）を備える、請求項１１に記載のモノリシック３ＤＩＣシステム。 The monolithic 3DIC system of claim 11, wherein the means for electrically interconnecting the plurality of tiers comprises a monolithic inter-tier via (MIV). 前記モノリシック３ＤＩＣシステムがＲＦトランシーバとして動作する、請求項１１に記載のモノリシック３ＤＩＣシステム。 The monolithic 3DIC system operates as an RF transceiver, monolithic 3DIC system of claim 11. ３次元（３Ｄ）集積回路（ＩＣ）（３ＤＩＣ）システムを実装する方法であって、
前記３ＤＩＣ内の複数のティアを与えることと、
前記複数のティアにわたる複数の機能要素を与えることと、
モノリシックティア間ビア（ＭＩＶ）を使用して前記複数のティアを相互結合することと、
前記３ＤＩＣを用いた自己充足型システムオンチップ（ＳＯＣ）を与えることと
を備える方法。 A method of implementing a three-dimensional (3D) integrated circuit (IC) (3DIC) system comprising:
Providing multiple tiers within the 3DIC;
Providing a plurality of functional elements across the plurality of tiers;
Interconnecting the plurality of tiers using a monolithic inter-tier via (MIV);
How and a giving self sufficiency systems-on-chip (SOC) using the 3DIC. 前記複数のティアを与えることが、同等の水平寸法を有する複数のティアを備える、請求項１４に記載の方法。   15. The method of claim 14, wherein providing the plurality of tiers comprises a plurality of tiers having equivalent horizontal dimensions. 前記複数のティアを与えることが、高速動作のために最適化された少なくとも１つのティアを与えることを備える、請求項１４に記載の方法。   15. The method of claim 14, wherein providing the plurality of tiers comprises providing at least one tier optimized for high speed operation. 前記複数のティアを与えることが、低電流漏れのために最適化された少なくとも１つのティアを与えることを備える、請求項１４に記載の方法。   The method of claim 14, wherein providing the plurality of tiers comprises providing at least one tier optimized for low current leakage. 前記複数の機能要素のうちの異なる機能要素が、前記複数のティアのうちの異なるティア上に配置される、請求項１４に記載の方法。 The different functional elements of the plurality of functional elements are arranged on different tee A which ones of the plurality of tiers, the method according to claim 14. 前記複数のティアの第１のティアが、第１の機能を最適化するように構成された第１の技術タイプを備える、請求項１４に記載の方法。 The first tier of the plurality of tiers comprises a first technology type that is configured to optimize the first function, the method according to claim 14. 前記複数のティアの第２のティアが、第２の機能を最適化するように構成された第２の技術タイプを備える、請求項１９に記載の方法。 The second tier of the plurality of tiers comprises a second technology type that is configured to optimize the second function, the method according to claim 19.
JP2016527009A 2013-07-16 2014-07-14 Complete system-on-chip (SOC) using monolithic three-dimensional (3D) integrated circuit (IC) (3DIC) technology Pending JP2016529702A (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361846648P 2013-07-16 2013-07-16
US61/846,648 2013-07-16
US14/013,399 2013-08-29
US14/013,399 US9418985B2 (en) 2013-07-16 2013-08-29 Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology
PCT/US2014/046503 WO2015009614A1 (en) 2013-07-16 2014-07-14 Complete system-on-chip (soc) using monolithic three dimensional (3d) integrated circuit (ic) (3dic) technology

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JP2016529702A JP2016529702A (en) 2016-09-23
JP2016529702A5 true JP2016529702A5 (en) 2016-11-17

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US (2) US9418985B2 (en)
EP (1) EP3022766A1 (en)
JP (1) JP2016529702A (en)
KR (1) KR101832330B1 (en)
CN (1) CN105378918B (en)
BR (1) BR112016000868B1 (en)
CA (1) CA2917586C (en)
TW (1) TWI618222B (en)
WO (1) WO2015009614A1 (en)

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