JP2016187030A - 半導体装置、表示装置、入出力装置、及び電子機器 - Google Patents
半導体装置、表示装置、入出力装置、及び電子機器 Download PDFInfo
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- JP2016187030A JP2016187030A JP2015122914A JP2015122914A JP2016187030A JP 2016187030 A JP2016187030 A JP 2016187030A JP 2015122914 A JP2015122914 A JP 2015122914A JP 2015122914 A JP2015122914 A JP 2015122914A JP 2016187030 A JP2016187030 A JP 2016187030A
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Abstract
【解決手段】トランジスタを有する半導体装置であって、トランジスタは、ゲート電極と、第1の絶縁膜と、酸化物半導体膜と、第2の絶縁膜と、一対の電極と、を有する。ゲート電極と酸化物半導体膜は互いに重なる領域を有する。酸化物半導体膜は、第1の絶縁膜と、第2の絶縁膜との間に設けられ、一対の電極と接する領域を有する。第1の絶縁膜は、ゲート電極と、酸化物半導体膜との間に設けられる。第1の絶縁膜または第2の絶縁膜の少なくとも一は、シリコン及び酸素を含み、フッ酸を用いてエッチングしたときのエッチング速度が、8nm/分より大きい領域を有する。
【選択図】図1
Description
本実施の形態では、本発明の一態様である半導体装置、及びその作製方法について図面を参照して説明する。本実施の形態に示すトランジスタは、ボトムゲート構造のトランジスタである。
図1(A)乃至図1(F)に、半導体装置が有するトランジスタの上面図及び断面図を示す。図1(A)はトランジスタの上面図であり、図1(B)は、図1(A)の一点鎖線C−D間の断面図、図1(C)は、図1(A)の一点鎖線A−B間の断面図である。また、図1(D)乃至図1(F)は、図1(C)の変形例である。なお、本明細書において、上面図は、明瞭化のため、基板、絶縁膜、保護膜などを省略する。
次に、図1に示すトランジスタの作製方法について、図2を用いて説明する。なお、図2において、図1(A)の一点鎖線−Bに示すチャネル長方向の断面図、及び一点鎖線C−Dに示すチャネル幅方向の断面図を用いて、トランジスタの作製方法を説明する。
本実施の形態に示すトランジスタの変形例について、図3を用いて説明する。本変形例で説明するトランジスタは、ゲート絶縁膜または保護膜が図1に示すトランジスタと異なる例について説明する。
実施の形態1に示すトランジスタの変形例について、図4を用いて説明する。図1乃至図3に示すトランジスタは、チャネルエッチ型のトランジスタであったが、本変形例で説明するトランジスタは、チャネル保護型のトランジスタである。
本実施の形態1に示すトランジスタの変形例について、図5を用いて説明する。本変形例に示すトランジスタは、多階調マスクを用いて形成された酸化物半導体膜17a及び一対の電極19a、20aを有することを特徴とする。
本実施の形態1に示すトランジスタ上の絶縁膜の変形例について、図6を用いて説明する。本変形例に示すトランジスタは、保護膜26上に有機絶縁膜41を有する。
本実施の形態1に示すトランジスタ上の絶縁膜の変形例について説明する。
本実施の形態では、実施の形態1と異なる構造の半導体装置、及びその作製方法について図面を参照して説明する。実施の形態1に示すトランジスタは、一つのゲート電極を備えたトランジスタであったが、本実施の形態で説明するトランジスタは、酸化物半導体膜を挟む2つのゲート電極を有する。
本実施の形態1及び実施の形態2に示すトランジスタの変形例について、図8乃至図12を用いて説明する。実施の形態1及び実施の形態2に示すトランジスタは、単層の酸化物半導体膜を有したが、本実施の形態で説明するトランジスタは、多層の酸化物半導体膜を有する。
次に、図8(C)に示すトランジスタに設けられる多層膜45、及び図8(D)に示すトランジスタに設けられる多層膜48のバンド構造について、図12を用いて説明する。
本実施の形態では、実施の形態1と異なる構造の半導体装置、及びその作製方法について図面を参照して説明する。本実施の形態に示すトランジスタは、実施の形態1及び実施の形態2に示すトランジスタと比較して、トップゲート構造のトランジスタである点が異なる。
図13(A)乃至図13(F)に、トランジスタの上面図及び断面図を示す。図13(A)はトランジスタの上面図であり、図13(B)は、図13(A)の一点鎖線C−D間の断面図であり、図13(C)は、図13(A)の一点鎖線A−B間の断面図である。また、図13(D)乃至図13(F)は、図13(C)の変形例である。
次に、図13(A)乃至図13(C)に示すトランジスタの作製方法について、図14を用いて説明する。なお、図13(A)の一点鎖線A−Bに示すチャネル長方向の断面図、及び一点鎖線C−Dに示すチャネル幅方向の断面図を用いて、トランジスタの作製方法を説明する。
実施の形態4に示すトランジスタの変形例について、図15を用いて説明する。本変形例で説明するトランジスタは、一対の電極とゲート絶縁膜の間に酸化物半導体膜を有する例について説明する。
本実施の形態では、本発明の一態様の表示パネルの構成例について説明する。
図16(A)は、本発明の一態様の表示パネルの上面図であり、図16(B)は、本発明の一態様の表示パネルの画素に液晶素子を適用する場合に用いることができる画素回路を説明するための回路図である。また、図16(C)は、本発明の一態様の表示パネルの画素に有機EL素子を適用する場合に用いることができる画素回路を説明するための回路図である。
また、画素の回路構成の一例を図16(B)に示す。ここでは、VA型液晶表示パネルの画素に適用することができる画素回路を示す。
画素の回路構成の他の一例を図16(C)に示す。ここでは、有機EL素子を用いた表示パネルの画素の回路構成を示す。
本実施の形態では、本発明の一態様の半導体装置を適用した表示モジュールについて、説明する。また、本発明の一態様の半導体装置が適用された電子機器の構成例について説明する。
試料A1において、酸化物絶縁膜は、ガラス基板を保持する温度を220℃とし、流量160sccmのシラン及び流量4000sccmの一酸化二窒素を原料ガスとし、処理室内の圧力を200Paとし、平行平板電極に供給する高周波電力を13.56MHz、1500W(電力密度としては8×10−1W/cm2)とするプラズマCVD法を用いて形成した。
試料A2において、酸化物絶縁膜は、ガラス基板を保持する温度を220℃とし、流量30sccmのシラン及び流量4000sccmの一酸化二窒素を原料ガスとし、処理室内の圧力を200Paとし、平行平板電極に供給する高周波電力を13.56MHz、150W(電力密度としては8.0×10−2W/cm2)とするプラズマCVD法を用いて形成した。
試料A3において、酸化物絶縁膜は、ガラス基板を保持する温度を350℃とし、処理室内の圧力を40Paとし、その他の成膜条件は試料A2と同様の条件を用いるプラズマCVD法を用いて形成した。
試料A5において、酸化物絶縁膜は、ガラス基板を保持する温度を200℃とし、流量250sccmのシラン及び流量2500sccmの一酸化二窒素を原料ガスとし、処理室内の圧力を30Paとし、電極に供給するマイクロ波電力を5000W(電力密度としては2.76W/cm2)とするプラズマCVD法を用いて形成した。
試料A6乃至試料A8は、以下の条件を用いて酸化物絶縁膜を形成した。
上記試料A1乃至A8に含まれる酸化物絶縁膜上に導電膜を形成した後、該導電膜を介して酸化物絶縁膜に酸素を添加した。次に、該導電膜を除去して、試料B1乃至試料B8を作製した。
試料A1乃至試料A8を形成した後、それぞれの試料を加熱して試料C1乃至試料C8を形成した。ここでは、トランジスタの作製工程に行われる加熱処理の一条件である、窒素雰囲気での350℃1時間の加熱処理を行った。
試料C1乃至試料C8に含まれる酸化物絶縁膜上に導電膜を形成した後、該導電膜を介して酸化物絶縁膜に酸素を添加した。次に、該導電膜を除去して、試料D1乃至試料D8を作製した。
本実施例に係る試料E1として、実施の形態1及び図1(D)に示すトランジスタを作製した。
試料E1の作製工程において、酸化物絶縁膜21に含まれる第1の酸化シリコン膜の形成、膜22の形成、および酸素24の添加を除き、その他の工程は試料E1と同様の条件を用いて、試料E2を作製した。
試料E1の作製工程において、膜22の形成、および酸素24の添加を除き、その他の工程は試料E1と同様の条件を用いて、試料E3を作製した。
次に、試料E1乃至試料E3のId−Vg特性を測定した。ここでは、チャネル長/チャネル幅(L/W)が、2μm/50μm、3μm/50μm、または6μm/50μmのトランジスタ、それぞれにおいて、ドレイン電圧(Vd)を1Vまたは10Vとし、ゲート電圧(Vg)を−15Vから20Vまで変化させて、Id−Vg特性を測定した。また、各試料において、40個のトランジスタを測定した。
続いて、試料E1乃至試料E3に含まれるトランジスタにおいて、ゲートBTストレス試験を行った。
次に、試料E1乃至試料E3において、暗状態においてゲート電圧を変化させながら、ゲートBTストレス試験を繰り返し行った。
Claims (12)
- トランジスタを有する半導体装置であって、
前記トランジスタは、
ゲート電極と、第1の絶縁膜と、酸化物半導体膜と、第2の絶縁膜と、一対の電極と、を有し、
前記ゲート電極と前記酸化物半導体膜は、互いに重なる領域を有し、
前記酸化物半導体膜は、前記第1の絶縁膜と、前記第2の絶縁膜との間に設けられ、
前記酸化物半導体膜は、前記一対の電極と接する領域を有し、
前記第1の絶縁膜は、前記ゲート電極と、前記酸化物半導体膜との間に設けられ、
前記第1の絶縁膜または前記第2の絶縁膜の少なくとも一は、シリコン及び酸素を含み、
前記第1の絶縁膜または前記第2の絶縁膜の少なくとも一は、フッ酸を用いてエッチングしたときのエッチング速度が、8nm/分より大きい領域を有する
ことを特徴とする半導体装置。 - 請求項1において、
前記ゲート電極は、絶縁表面及び前記酸化物半導体膜の間に設けられ、
前記トランジスタは、第1の膜を有し、
前記第1の膜は、前記第1の絶縁膜及び前記酸化物半導体膜の間に設けられ、
前記第1の膜は、インジウム、亜鉛、チタン、アルミニウム、タングステン、タンタル、またはモリブデンの中から選ばれる少なくとも一以上と、酸素とを有することを特徴とする半導体装置。 - 請求項1において、
前記ゲート電極は、絶縁表面及び前記酸化物半導体膜の間に設けられ、
前記第2の絶縁膜は、第2の膜と接し、
前記第2の絶縁膜は、前記酸化物半導体膜及び前記第2の膜の間に設けられ、
前記第2の膜は、インジウム、亜鉛、チタン、アルミニウム、タングステン、タンタル、またはモリブデンの中から選ばれる少なくとも一以上と、酸素とを有する、ことを特徴とする半導体装置。 - 請求項1において、
前記酸化物半導体膜は、絶縁表面及び前記ゲート電極の間に設けられ、
前記トランジスタは、第3の膜を有し、
前記第3の膜は、前記第1の絶縁膜及び前記ゲート電極の間に設けられ、
前記第3の膜は、インジウム、亜鉛、チタン、アルミニウム、タングステン、タンタル、またはモリブデンの中から選ばれる少なくとも一以上と、酸素とを有する、ことを特徴とする半導体装置。 - 請求項1において、
前記酸化物半導体膜は、絶縁表面及び前記ゲート電極の間に設けられ、
前記第2の絶縁膜は、第4の膜と接し、
前記第4の膜は、前記第2の絶縁膜及び前記酸化物半導体膜の間に設けられ、
前記第4の膜は、インジウム、亜鉛、チタン、アルミニウム、タングステン、タンタル、またはモリブデンの中から選ばれる少なくとも一以上と、酸素とを有する、ことを特徴とする半導体装置。 - トランジスタを有する半導体装置であって、
前記トランジスタは、第1のゲート電極と、第1の絶縁膜と、酸化物半導体膜と、第2の絶縁膜と、第2のゲート電極と、一対の電極と、を有し、
前記第1のゲート電極と、前記酸化物半導体膜とは、互いに重なる領域を有し、
前記第2のゲート電極と、前記酸化物半導体膜とは、互いに重なる領域を有し、
前記第1の絶縁膜は、前記第1のゲート電極と、前記酸化物半導体膜の間に設けられ、
前記第2の絶縁膜は、前記第2のゲート電極と、前記酸化物半導体膜の間に設けられ、
前記酸化物半導体膜は、前記一対の電極と接する領域を有し、
前記第1の絶縁膜または前記第2の絶縁膜の少なくとも一は、シリコン及び酸素を含み、
前記第1の絶縁膜または前記第2の絶縁膜の少なくとも一は、フッ酸を用いてエッチングしたときのエッチング速度が、8nm/分より大きい領域を有する
ことを特徴とする半導体装置。 - 請求項6において、
前記第1の絶縁膜及び前記酸化物半導体膜の間に設けられる第5の膜を有し、
前記第5の膜は、インジウム、亜鉛、チタン、アルミニウム、タングステン、タンタル、またはモリブデンの中から選ばれる少なくとも一以上と、酸素とを有する、ことを特徴とする半導体装置。 - 請求項6において、
前記第2の絶縁膜及び前記第2のゲート電極の間に設けられる第6の膜を有し、
前記第6の膜は、インジウム、亜鉛、チタン、アルミニウム、タングステン、タンタル、またはモリブデンの中から選ばれる少なくとも一以上と、酸素とを有する、ことを特徴とする半導体装置。 - 請求項1乃至請求項8のいずれか一項において、
前記フッ酸の温度は、24℃であり、
前記フッ酸の濃度は0.5wt/vol%であることを特徴とする半導体装置。 - 請求項1乃至請求項9のいずれか一項に記載の半導体装置と、
画素電極と、を有し、
前記画素電極は、前記トランジスタに電気的に接続される表示装置。 - 請求項1乃至請求項9のいずれか一項に記載の半導体装置と、
タッチパネルと、を有し、
前記タッチパネルは、前記半導体装置と電気的に接続されている入出力装置。 - 請求項1乃至請求項9のいずれか一項に記載の半導体装置、請求項10に記載の表示装置、または、請求項11に記載の入出力装置と、
スピーカ、または操作キーと、を有する電子機器。
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US20150372023A1 (en) | 2015-12-24 |
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US9876099B2 (en) | 2018-01-23 |
JP2020031232A (ja) | 2020-02-27 |
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