JP2016039309A - 多層膜をエッチングする方法 - Google Patents
多層膜をエッチングする方法 Download PDFInfo
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- JP2016039309A JP2016039309A JP2014162809A JP2014162809A JP2016039309A JP 2016039309 A JP2016039309 A JP 2016039309A JP 2014162809 A JP2014162809 A JP 2014162809A JP 2014162809 A JP2014162809 A JP 2014162809A JP 2016039309 A JP2016039309 A JP 2016039309A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32091—Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32137—Radio frequency generated discharge controlling of the discharge by modulation of energy
- H01J37/32155—Frequency modulation
- H01J37/32165—Plural frequencies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
- H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/32—Processing objects by plasma generation
- H01J2237/33—Processing objects by plasma generation characterised by the type of processing
- H01J2237/334—Etching
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
Abstract
【解決手段】
多層膜は、交互に積層された第1の膜及び第2の膜を含み、第1の膜及び第2の膜は互いに異なる誘電率を有する。多層膜をエッチングする方法は、(a)プラズマ処理装置の処理容器内に、多層膜及び該多層膜上に設けられたマスクを有する被処理体を準備する工程と、(b)多層膜をエッチングする工程であり、水素ガス、フルオロハイドロカーボンガス、フッ素含有ガス、炭化水素ガス、三塩化ホウ素ガス、及び窒素ガスを含む処理ガスを前記処理容器内で励起させる、該工程と、を含む。
【選択図】図1
Description
・H2ガスの流量:50〜300sccm
・CH2F2ガスの流量:40〜80sccm
・NF3ガスの流量:50〜100sccm
・CH4ガスの流量:5〜50sccm
・BCl3ガスの流量:5〜30sccm
・N2ガスの流量:10〜200sccm
・第1の高周波電源62の高周波電力の周波数:27〜100MHz
・第1の高周波電源62の高周波電力:500〜2700W
・第2の高周波電源64の高周波電力の周波数:0.4〜13MHz
・第2の高周波電源64の高周波電力:1000〜4000W
・処理容器12内の圧力:2.66〜13.3Pa(20〜100mT)
・高周波電力のONとOFFの周波数:1〜40kHz
・一周期において高周波電力がONの期間が占めるデューティー比:50〜90%
・高周波電力がONの期間の負の直流電圧の絶対値:150〜500V
・高周波電力がOFFの期間の負の直流電圧の絶対値:350〜1000V
以下、方法MTを用いて行った実験例、及び比較のために行った比較実験例について説明する。
Claims (8)
- 互いに異なる誘電率を有し、且つ、交互に積層された第1の膜及び第2の膜を含む多層膜をエッチングする方法であって、
プラズマ処理装置の処理容器内に、前記多層膜及び該多層膜上に設けられたマスクを有する被処理体を準備する工程と、
前記多層膜をエッチングする工程であり、水素ガス、フルオロハイドロカーボンガス、フッ素含有ガス、炭化水素ガス、三塩化ホウ素ガス、及び窒素ガスを含む処理ガスを前記処理容器内で励起させる、該工程と、
を含む方法。 - 前記フルオロハイドロカーボンガスは、CH2F2ガス、CH3Fガス、又はCHF3ガスである、請求項1に記載の方法。
- 前記フッ素含有ガスは、NF3ガス又はSF6ガスである、請求項1又は2に記載の方法。
- 前記炭化水素ガスは、CH4ガスである、請求項1〜3の何れか一項に記載の方法。
- 前記第1の膜は酸化シリコン膜であり、前記第2の膜は窒化シリコン膜である、請求項1〜4の何れか一項に記載の方法。
- 前記第1の膜は酸化シリコン膜であり、前記第2の膜はポリシリコン膜である、請求項1〜4の何れか一項に記載の方法。
- 前記第1の膜と前記第2の膜は、合計24層以上積層されている、請求項1〜6の何れか一項に記載の方法。
- 前記マスクは、アモルファスカーボン製である、請求項1〜7の何れか一項に記載の方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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JP2014162809A JP6454492B2 (ja) | 2014-08-08 | 2014-08-08 | 多層膜をエッチングする方法 |
KR1020150106596A KR101835683B1 (ko) | 2014-08-08 | 2015-07-28 | 다층막을 에칭하는 방법 |
US14/817,393 US9263239B1 (en) | 2014-08-08 | 2015-08-04 | Etching method of multilayered film |
SG10201506214XA SG10201506214XA (en) | 2014-08-08 | 2015-08-06 | Etching method of multilayered film |
CN201510484931.8A CN105374756B (zh) | 2014-08-08 | 2015-08-07 | 多层膜的蚀刻方法 |
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JP2014162809A JP6454492B2 (ja) | 2014-08-08 | 2014-08-08 | 多層膜をエッチングする方法 |
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JP2016039309A true JP2016039309A (ja) | 2016-03-22 |
JP6454492B2 JP6454492B2 (ja) | 2019-01-16 |
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JP2014162809A Active JP6454492B2 (ja) | 2014-08-08 | 2014-08-08 | 多層膜をエッチングする方法 |
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US (1) | US9263239B1 (ja) |
JP (1) | JP6454492B2 (ja) |
KR (1) | KR101835683B1 (ja) |
CN (1) | CN105374756B (ja) |
SG (1) | SG10201506214XA (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019138654A1 (ja) * | 2018-10-26 | 2019-07-18 | 株式会社日立ハイテクノロジーズ | プラズマ処理装置及びプラズマ処理方法 |
JP2019145780A (ja) * | 2018-02-15 | 2019-08-29 | 東京エレクトロン株式会社 | プラズマエッチング方法及びプラズマエッチング装置 |
KR20220152139A (ko) | 2021-05-07 | 2022-11-15 | 도쿄엘렉트론가부시키가이샤 | 기판 처리 방법 및 기판 처리 장치 |
KR20230129310A (ko) | 2022-03-01 | 2023-09-08 | 도쿄엘렉트론가부시키가이샤 | 플라즈마 처리 방법 및 플라즈마 처리 장치 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6604911B2 (ja) * | 2016-06-23 | 2019-11-13 | 東京エレクトロン株式会社 | エッチング処理方法 |
JP6948181B2 (ja) * | 2017-08-01 | 2021-10-13 | 東京エレクトロン株式会社 | 多層膜をエッチングする方法 |
JP2020068221A (ja) * | 2018-10-22 | 2020-04-30 | 東京エレクトロン株式会社 | エッチング方法及びプラズマ処理装置 |
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JPS5658972A (en) * | 1979-10-16 | 1981-05-22 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Dry etching method |
JPH0536645A (ja) * | 1991-07-25 | 1993-02-12 | Sony Corp | ドライエツチング方法 |
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JP2005032851A (ja) * | 2003-07-09 | 2005-02-03 | Semiconductor Leading Edge Technologies Inc | 半導体装置の製造方法 |
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JP6056136B2 (ja) * | 2011-09-07 | 2017-01-11 | セントラル硝子株式会社 | ドライエッチング方法 |
CN102738074B (zh) * | 2012-07-05 | 2014-07-02 | 中微半导体设备(上海)有限公司 | 半导体结构的形成方法 |
JP6035117B2 (ja) * | 2012-11-09 | 2016-11-30 | 東京エレクトロン株式会社 | プラズマエッチング方法及びプラズマエッチング装置 |
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2014
- 2014-08-08 JP JP2014162809A patent/JP6454492B2/ja active Active
-
2015
- 2015-07-28 KR KR1020150106596A patent/KR101835683B1/ko active IP Right Grant
- 2015-08-04 US US14/817,393 patent/US9263239B1/en not_active Expired - Fee Related
- 2015-08-06 SG SG10201506214XA patent/SG10201506214XA/en unknown
- 2015-08-07 CN CN201510484931.8A patent/CN105374756B/zh active Active
Patent Citations (8)
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JPS5658972A (en) * | 1979-10-16 | 1981-05-22 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Dry etching method |
JPH0536645A (ja) * | 1991-07-25 | 1993-02-12 | Sony Corp | ドライエツチング方法 |
JPH11307519A (ja) * | 1998-04-03 | 1999-11-05 | United Microelectronics Corp | 酸化タンタルのエッチング処理方法 |
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JP2019145780A (ja) * | 2018-02-15 | 2019-08-29 | 東京エレクトロン株式会社 | プラズマエッチング方法及びプラズマエッチング装置 |
JP7158252B2 (ja) | 2018-02-15 | 2022-10-21 | 東京エレクトロン株式会社 | プラズマエッチング方法及びプラズマエッチング装置 |
WO2019138654A1 (ja) * | 2018-10-26 | 2019-07-18 | 株式会社日立ハイテクノロジーズ | プラズマ処理装置及びプラズマ処理方法 |
JPWO2019138654A1 (ja) * | 2018-10-26 | 2020-01-16 | 株式会社日立ハイテクノロジーズ | プラズマ処理装置及びプラズマ処理方法 |
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KR20220152139A (ko) | 2021-05-07 | 2022-11-15 | 도쿄엘렉트론가부시키가이샤 | 기판 처리 방법 및 기판 처리 장치 |
KR20230129310A (ko) | 2022-03-01 | 2023-09-08 | 도쿄엘렉트론가부시키가이샤 | 플라즈마 처리 방법 및 플라즈마 처리 장치 |
Also Published As
Publication number | Publication date |
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US20160042918A1 (en) | 2016-02-11 |
CN105374756B (zh) | 2019-01-15 |
SG10201506214XA (en) | 2016-03-30 |
KR20160018366A (ko) | 2016-02-17 |
JP6454492B2 (ja) | 2019-01-16 |
CN105374756A (zh) | 2016-03-02 |
KR101835683B1 (ko) | 2018-03-07 |
US9263239B1 (en) | 2016-02-16 |
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