JP2013530527A5 - - Google Patents

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Publication number
JP2013530527A5
JP2013530527A5 JP2013512093A JP2013512093A JP2013530527A5 JP 2013530527 A5 JP2013530527 A5 JP 2013530527A5 JP 2013512093 A JP2013512093 A JP 2013512093A JP 2013512093 A JP2013512093 A JP 2013512093A JP 2013530527 A5 JP2013530527 A5 JP 2013530527A5
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JP
Japan
Prior art keywords
semiconductor device
region
layer
raised
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2013512093A
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English (en)
Japanese (ja)
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JP2013530527A (ja
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Publication date
Application filed filed Critical
Priority claimed from PCT/US2011/037275 external-priority patent/WO2011149768A2/en
Publication of JP2013530527A publication Critical patent/JP2013530527A/ja
Publication of JP2013530527A5 publication Critical patent/JP2013530527A5/ja
Pending legal-status Critical Current

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JP2013512093A 2010-05-25 2011-05-20 逆方向バイアス下においてゲート−ソース漏れが低減された自己整合半導体デバイスおよび作製方法 Pending JP2013530527A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US34792810P 2010-05-25 2010-05-25
US61/347,928 2010-05-25
PCT/US2011/037275 WO2011149768A2 (en) 2010-05-25 2011-05-20 Self-aligned semiconductor devices with reduced gate-source leakage under reverse bias and methods of making

Publications (2)

Publication Number Publication Date
JP2013530527A JP2013530527A (ja) 2013-07-25
JP2013530527A5 true JP2013530527A5 (enExample) 2013-10-31

Family

ID=45004680

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013512093A Pending JP2013530527A (ja) 2010-05-25 2011-05-20 逆方向バイアス下においてゲート−ソース漏れが低減された自己整合半導体デバイスおよび作製方法

Country Status (6)

Country Link
US (2) US8659057B2 (enExample)
EP (1) EP2577735A4 (enExample)
JP (1) JP2013530527A (enExample)
CN (1) CN103038886A (enExample)
TW (1) TW201208076A (enExample)
WO (1) WO2011149768A2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7977713B2 (en) * 2008-05-08 2011-07-12 Semisouth Laboratories, Inc. Semiconductor devices with non-punch-through semiconductor channels having enhanced conduction and methods of making
US9006800B2 (en) * 2011-12-14 2015-04-14 Avogy, Inc. Ingan ohmic source contacts for vertical power devices
US20140145201A1 (en) * 2012-11-29 2014-05-29 Avogy, Inc. Method and system for gallium nitride vertical jfet with separated gate and source
US10727339B2 (en) 2014-03-28 2020-07-28 Intel Corporation Selectively regrown top contact for vertical semiconductor devices
US9935102B1 (en) 2016-10-05 2018-04-03 International Business Machines Corporation Method and structure for improving vertical transistor
US11245027B2 (en) * 2020-03-10 2022-02-08 International Business Machines Corporation Bottom source/drain etch with fin-cut-last-VTFET
US20230327026A1 (en) * 2022-03-25 2023-10-12 Wolfspeed, Inc. Power semiconductor device with shallow conduction region
DE102023208539A1 (de) 2023-08-10 2025-02-13 Infineon Technologies Austria Ag Transistorvorrichtung und verfahren

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