JP2013513252A - 打込みされた側壁を有する半導体デバイスを製造する方法およびそれによって製造されたデバイス - Google Patents
打込みされた側壁を有する半導体デバイスを製造する方法およびそれによって製造されたデバイス Download PDFInfo
- Publication number
- JP2013513252A JP2013513252A JP2012543225A JP2012543225A JP2013513252A JP 2013513252 A JP2013513252 A JP 2013513252A JP 2012543225 A JP2012543225 A JP 2012543225A JP 2012543225 A JP2012543225 A JP 2012543225A JP 2013513252 A JP2013513252 A JP 2013513252A
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- JP
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- Prior art keywords
- layer
- channel layer
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- implantation
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/051—Manufacture or treatment of FETs having PN junction gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/80—FETs having rectifying junction gate electrodes
- H10D30/83—FETs having PN junction gate electrodes
- H10D30/831—Vertical FETs having PN junction gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/343—Gate regions of field-effect devices having PN junction gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
- H10D62/8325—Silicon carbide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
- H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
- H10P30/2042—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors into crystalline silicon carbide
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/222—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface
Landscapes
- Junction Field-Effect Transistors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US26752409P | 2009-12-08 | 2009-12-08 | |
| US61/267,524 | 2009-12-08 | ||
| PCT/US2010/059374 WO2011071973A2 (en) | 2009-12-08 | 2010-12-08 | Methods of making semiconductor devices having implanted sidewalls and devices made thereby |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2013513252A true JP2013513252A (ja) | 2013-04-18 |
| JP2013513252A5 JP2013513252A5 (enExample) | 2014-01-30 |
Family
ID=44081165
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012543225A Pending JP2013513252A (ja) | 2009-12-08 | 2010-12-08 | 打込みされた側壁を有する半導体デバイスを製造する方法およびそれによって製造されたデバイス |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US8466017B2 (enExample) |
| EP (1) | EP2510539A4 (enExample) |
| JP (1) | JP2013513252A (enExample) |
| KR (1) | KR20120091368A (enExample) |
| CN (1) | CN102648514A (enExample) |
| AU (1) | AU2010328256A1 (enExample) |
| CA (1) | CA2780459A1 (enExample) |
| WO (1) | WO2011071973A2 (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015028994A (ja) * | 2013-07-30 | 2015-02-12 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
| JP2019531601A (ja) * | 2016-09-09 | 2019-10-31 | ユナイテッド シリコン カーバイド、インク. | 改善された閾値電圧制御を有するトレンチ垂直jfet |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8338255B2 (en) * | 2009-06-19 | 2012-12-25 | Ss Sc Ip, Llc | Methods of making vertical junction field effect transistors and bipolar junction transistors without ion implantation |
| US9136116B2 (en) * | 2011-08-04 | 2015-09-15 | Avogy, Inc. | Method and system for formation of P-N junctions in gallium nitride based electronics |
| US8969912B2 (en) | 2011-08-04 | 2015-03-03 | Avogy, Inc. | Method and system for a GaN vertical JFET utilizing a regrown channel |
| US9129838B2 (en) * | 2011-11-24 | 2015-09-08 | Sharp Kabushiki Kaisha | Semiconductor device and electronic apparatus |
| US8969994B2 (en) | 2012-08-14 | 2015-03-03 | Avogy, Inc. | Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode by regrowth and etch back |
| US8937317B2 (en) | 2012-12-28 | 2015-01-20 | Avogy, Inc. | Method and system for co-packaging gallium nitride electronics |
| US9324645B2 (en) | 2013-05-23 | 2016-04-26 | Avogy, Inc. | Method and system for co-packaging vertical gallium nitride power devices |
| US9136397B2 (en) * | 2013-05-31 | 2015-09-15 | Infineon Technologies Ag | Field-effect semiconductor device |
| US8947154B1 (en) | 2013-10-03 | 2015-02-03 | Avogy, Inc. | Method and system for operating gallium nitride electronics |
| US9184281B2 (en) * | 2013-10-30 | 2015-11-10 | Infineon Technologies Ag | Method for manufacturing a vertical semiconductor device and vertical semiconductor device |
| US9324809B2 (en) | 2013-11-18 | 2016-04-26 | Avogy, Inc. | Method and system for interleaved boost converter with co-packaged gallium nitride power devices |
| US9543290B2 (en) | 2014-01-23 | 2017-01-10 | International Business Machines Corporation | Normally-off junction field-effect transistors and application to complementary circuits |
| KR101669987B1 (ko) * | 2014-12-03 | 2016-10-27 | 서강대학교산학협력단 | 경사 이온 주입을 이용한 실리콘 카바이드 트렌치 모스 장벽 쇼트키 다이오드 및 그의 제조 방법 |
| US20160268446A1 (en) * | 2015-03-10 | 2016-09-15 | United Silicon Carbide, Inc. | Trench vertical jfet with improved threshold voltage control |
| US10396215B2 (en) | 2015-03-10 | 2019-08-27 | United Silicon Carbide, Inc. | Trench vertical JFET with improved threshold voltage control |
| US9905645B2 (en) | 2016-05-24 | 2018-02-27 | Samsung Electronics Co., Ltd. | Vertical field effect transistor having an elongated channel |
| KR102314006B1 (ko) | 2017-09-11 | 2021-10-18 | 삼성전자주식회사 | 수직 전계 트랜지스터 및 이를 포함하는 반도체 장치 |
| CN112909088B (zh) * | 2021-01-25 | 2022-11-08 | 深圳大学 | 静电感应晶体管及其制备方法 |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60247921A (ja) * | 1984-05-23 | 1985-12-07 | Toshiba Corp | 半導体装置の製造方法 |
| JPS61154029A (ja) * | 1984-12-26 | 1986-07-12 | Nec Corp | ボロンのド−ピング方法 |
| JPH09504656A (ja) * | 1994-07-01 | 1997-05-06 | ダイムラー−ベンツ アクチエンゲゼルシャフト | SiC製電界効果トランジスタ及びその製造方法 |
| JPH10163313A (ja) * | 1996-11-26 | 1998-06-19 | New Japan Radio Co Ltd | 半導体装置の製造方法 |
| JP2004134547A (ja) * | 2002-10-10 | 2004-04-30 | Hitachi Ltd | 半導体装置 |
| US20060270203A1 (en) * | 2005-05-31 | 2006-11-30 | International Business Machines Corporation | Varied impurity profile region formation for varying breakdown voltage of devices |
| US20070187715A1 (en) * | 2003-09-25 | 2007-08-16 | Zhao Jian H | Power junction field effect power transistor with highly vertical channel and uniform channel opening |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5903020A (en) * | 1997-06-18 | 1999-05-11 | Northrop Grumman Corporation | Silicon carbide static induction transistor structure |
| US6509240B2 (en) * | 2000-05-15 | 2003-01-21 | International Rectifier Corporation | Angle implant process for cellular deep trench sidewall doping |
| US6713351B2 (en) * | 2001-03-28 | 2004-03-30 | General Semiconductor, Inc. | Double diffused field effect transistor having reduced on-resistance |
| EP1267210B1 (en) | 2001-06-12 | 2018-02-21 | FUJIFILM Corporation | Positive resist composition |
| JP4234016B2 (ja) * | 2001-07-12 | 2009-03-04 | ミシシッピ・ステイト・ユニバーシティ | 選択的エピタキシの使用による、炭化ケイ素におけるセルフアライントランジスタ |
| US6821834B2 (en) * | 2002-12-04 | 2004-11-23 | Yoshiyuki Ando | Ion implantation methods and transistor cell layout for fin type transistors |
| US20060046392A1 (en) * | 2004-08-26 | 2006-03-02 | Manning H M | Methods of forming vertical transistor structures |
| US7355223B2 (en) * | 2005-03-04 | 2008-04-08 | Cree, Inc. | Vertical junction field effect transistor having an epitaxial gate |
| US7977713B2 (en) * | 2008-05-08 | 2011-07-12 | Semisouth Laboratories, Inc. | Semiconductor devices with non-punch-through semiconductor channels having enhanced conduction and methods of making |
-
2010
- 2010-12-08 KR KR1020127015489A patent/KR20120091368A/ko not_active Withdrawn
- 2010-12-08 CA CA2780459A patent/CA2780459A1/en not_active Abandoned
- 2010-12-08 JP JP2012543225A patent/JP2013513252A/ja active Pending
- 2010-12-08 AU AU2010328256A patent/AU2010328256A1/en not_active Abandoned
- 2010-12-08 CN CN2010800553654A patent/CN102648514A/zh active Pending
- 2010-12-08 WO PCT/US2010/059374 patent/WO2011071973A2/en not_active Ceased
- 2010-12-08 US US12/962,823 patent/US8466017B2/en not_active Expired - Fee Related
- 2010-12-08 EP EP20100836585 patent/EP2510539A4/en not_active Withdrawn
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60247921A (ja) * | 1984-05-23 | 1985-12-07 | Toshiba Corp | 半導体装置の製造方法 |
| JPS61154029A (ja) * | 1984-12-26 | 1986-07-12 | Nec Corp | ボロンのド−ピング方法 |
| JPH09504656A (ja) * | 1994-07-01 | 1997-05-06 | ダイムラー−ベンツ アクチエンゲゼルシャフト | SiC製電界効果トランジスタ及びその製造方法 |
| JPH10163313A (ja) * | 1996-11-26 | 1998-06-19 | New Japan Radio Co Ltd | 半導体装置の製造方法 |
| JP2004134547A (ja) * | 2002-10-10 | 2004-04-30 | Hitachi Ltd | 半導体装置 |
| US20070187715A1 (en) * | 2003-09-25 | 2007-08-16 | Zhao Jian H | Power junction field effect power transistor with highly vertical channel and uniform channel opening |
| US20060270203A1 (en) * | 2005-05-31 | 2006-11-30 | International Business Machines Corporation | Varied impurity profile region formation for varying breakdown voltage of devices |
Non-Patent Citations (1)
| Title |
|---|
| JPN6013037273; Igor Polishchuk: 'CMOS Vt-Control Improvement through Implant Lateral Scatter Elimination' IEEE International Symposium on Semiconductor Manufacturing , 200509, 193-196頁 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2015028994A (ja) * | 2013-07-30 | 2015-02-12 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
| JP2019531601A (ja) * | 2016-09-09 | 2019-10-31 | ユナイテッド シリコン カーバイド、インク. | 改善された閾値電圧制御を有するトレンチ垂直jfet |
| JP7118050B2 (ja) | 2016-09-09 | 2022-08-15 | ユナイテッド シリコン カーバイド、インク. | 改善された閾値電圧制御を有するトレンチ垂直jfet |
Also Published As
| Publication number | Publication date |
|---|---|
| AU2010328256A1 (en) | 2012-06-21 |
| US20110133212A1 (en) | 2011-06-09 |
| WO2011071973A2 (en) | 2011-06-16 |
| WO2011071973A3 (en) | 2011-10-27 |
| US8466017B2 (en) | 2013-06-18 |
| CA2780459A1 (en) | 2011-06-16 |
| EP2510539A4 (en) | 2013-07-31 |
| EP2510539A2 (en) | 2012-10-17 |
| KR20120091368A (ko) | 2012-08-17 |
| CN102648514A (zh) | 2012-08-22 |
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