JP2013242922A - メモリデバイスのインターフェースメソッド、装置、及び、システム - Google Patents
メモリデバイスのインターフェースメソッド、装置、及び、システム Download PDFInfo
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Abstract
【解決手段】装置及びシステムは、基板と、基板上に配置されたインターフェースチップと、インターフェースチップ上に配置された複数のメモリアレイを有する第1のメモリダイであって、複数のスルーウェハインターコネクト(TWI)に接続された第1のメモリダイと、第1のメモリダイ上に配置された複数のメモリアレイを有する第2のメモリダイであって、複数のビアを含む第2のメモリダイと、を含み、複数のビアは、複数のTWIが第2のメモリダイを貫通するように構成される。第2のメモリダイは、第2の複数のTWIと接続されてもよい。このような方法で、インターフェースチップは、第1の複数のTWIと第2の複数のTWIを使用して、第1のメモリダイと第2のメモリダイを連通するために使用されてもよい。
【選択図】図2A
Description
この特許出願は、参照によりここに援用される2007年8月29日に出願された米国出願番号11/847,113からの優先権の利益を主張する。
方法、装置、及び、システムは、所定の水平空間内でのメモリ容量を増加させるメモリデバイス接続方法を開示した。さまざまな実施形態は、基板と、基板上に配置されたインターフェースチップと、インターフェースチップ上に配置された複数のメモリアレイを有する第1のメモリダイを含み、第1のメモリダイは、複数のスルーウェハインターコネクト(TWI)と接続されている。さまざまな実施形態は、第1のメモリダイ上に配置された複数のメモリアレイを有する第2のメモリダイであって、複数のビアを含む第2のメモリダイを含んでいて、その複数のビアは、複数のTWIが第2のメモリダイを貫通するように構成されている。同様に、第2のメモリダイは、第2の複数のTWIと接続されてもよく、インターフェースチップは、第1のメモリダイと第2のメモリダイを、第1の複数のTWIと第2の複数のTWIを使用して、連通するために使用されてもよい。
Claims (1)
- 基板と、
前記基板上に配置されたインターフェースチップと、
前記インターフェースチップ上に配置された、少なくとも一つのメモリアレイを有する第1のメモリダイであって、複数のスルーウェハインターコネクト(TWI)と接続された前記第1のメモリダイと、
前記第1のメモリダイ上に配置された、少なくとも一つのメモリアレイを有する第2のメモリダイであって、複数のビアを含む前記第2のメモリダイと、を含み、
前記複数のビアは、前記複数のTWIが前記第2のメモリダイを貫通することができるように構成されて、前記第2のメモリダイは第2の複数のTWIと接続されていて、
前記インターフェースチップは、前記第1のメモリダイ及び前記第2のメモリダイを、前記第1の複数のTWI及び前記第2の複数のTWIを使用して、連通する
ことを特徴とする装置。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/847,113 | 2007-08-29 | ||
US11/847,113 US7623365B2 (en) | 2007-08-29 | 2007-08-29 | Memory device interface methods, apparatus, and systems |
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Application Number | Title | Priority Date | Filing Date |
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JP2010522950A Division JP5354390B2 (ja) | 2007-08-29 | 2008-08-28 | メモリデバイスのインターフェースメソッド、装置、及び、システム |
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Publication Number | Publication Date |
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JP2013242922A true JP2013242922A (ja) | 2013-12-05 |
JP5643884B2 JP5643884B2 (ja) | 2014-12-17 |
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JP2010522950A Active JP5354390B2 (ja) | 2007-08-29 | 2008-08-28 | メモリデバイスのインターフェースメソッド、装置、及び、システム |
JP2013168771A Active JP5643884B2 (ja) | 2007-08-29 | 2013-08-15 | メモリデバイスのインターフェースメソッド、装置、及び、システム |
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JP2010522950A Active JP5354390B2 (ja) | 2007-08-29 | 2008-08-28 | メモリデバイスのインターフェースメソッド、装置、及び、システム |
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Country | Link |
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US (5) | US7623365B2 (ja) |
EP (1) | EP2195841A2 (ja) |
JP (2) | JP5354390B2 (ja) |
KR (3) | KR101382985B1 (ja) |
CN (1) | CN101809738B (ja) |
TW (1) | TWI470740B (ja) |
WO (1) | WO2009032153A2 (ja) |
Families Citing this family (103)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008204581A (ja) * | 2007-02-22 | 2008-09-04 | Elpida Memory Inc | 不揮発性ram |
US7623365B2 (en) | 2007-08-29 | 2009-11-24 | Micron Technology, Inc. | Memory device interface methods, apparatus, and systems |
US8120958B2 (en) * | 2007-12-24 | 2012-02-21 | Qimonda Ag | Multi-die memory, apparatus and multi-die memory stack |
US9229887B2 (en) * | 2008-02-19 | 2016-01-05 | Micron Technology, Inc. | Memory device with network on chip methods, apparatus, and systems |
US7978721B2 (en) | 2008-07-02 | 2011-07-12 | Micron Technology Inc. | Multi-serial interface stacked-die memory architecture |
US8106520B2 (en) | 2008-09-11 | 2012-01-31 | Micron Technology, Inc. | Signal delivery in stacked device |
US8086913B2 (en) * | 2008-09-11 | 2011-12-27 | Micron Technology, Inc. | Methods, apparatus, and systems to repair memory |
US8516343B2 (en) * | 2008-11-10 | 2013-08-20 | Fusion-Io, Inc. | Apparatus, system, and method for retiring storage regions |
US9063874B2 (en) | 2008-11-10 | 2015-06-23 | SanDisk Technologies, Inc. | Apparatus, system, and method for wear management |
US8549092B2 (en) * | 2009-02-19 | 2013-10-01 | Micron Technology, Inc. | Memory network methods, apparatus, and systems |
US7894230B2 (en) | 2009-02-24 | 2011-02-22 | Mosaid Technologies Incorporated | Stacked semiconductor devices including a master device |
US9779057B2 (en) | 2009-09-11 | 2017-10-03 | Micron Technology, Inc. | Autonomous memory architecture |
US8612809B2 (en) | 2009-12-31 | 2013-12-17 | Intel Corporation | Systems, methods, and apparatuses for stacked memory |
KR101843590B1 (ko) * | 2010-02-26 | 2018-03-29 | 시냅틱스 인코포레이티드 | 간섭을 회피하기 위해 복조를 변경하는 것 |
US20110230711A1 (en) * | 2010-03-16 | 2011-09-22 | Kano Akihito | Endoscopic Surgical Instrument |
US9123552B2 (en) * | 2010-03-30 | 2015-09-01 | Micron Technology, Inc. | Apparatuses enabling concurrent communication between an interface die and a plurality of dice stacks, interleaved conductive paths in stacked devices, and methods for forming and operating the same |
US9287239B2 (en) | 2010-04-26 | 2016-03-15 | Rambus Inc. | Techniques for interconnecting stacked dies using connection sites |
US8595429B2 (en) * | 2010-08-24 | 2013-11-26 | Qualcomm Incorporated | Wide input/output memory with low density, low latency and high density, high latency blocks |
US8793419B1 (en) * | 2010-11-22 | 2014-07-29 | Sk Hynix Memory Solutions Inc. | Interface between multiple controllers |
US9213594B2 (en) | 2011-01-19 | 2015-12-15 | Intelligent Intellectual Property Holdings 2 Llc | Apparatus, system, and method for managing out-of-service conditions |
CN102148761B (zh) * | 2011-04-11 | 2013-11-20 | 北京星网锐捷网络技术有限公司 | 通信接口芯片、通讯设备及通信接口节能的实现方法 |
KR101662576B1 (ko) * | 2011-12-02 | 2016-10-05 | 인텔 코포레이션 | 오프셋 상호접속들을 제공하는 인터페이스를 갖는 적층형 메모리 및 시스템 |
JP5846664B2 (ja) | 2011-12-28 | 2016-01-20 | インテル・コーポレーション | メモリ回路試験エンジン用の汎用アドレススクランブラ |
US9239355B1 (en) * | 2012-03-06 | 2016-01-19 | Inphi Corporation | Memory test sequencer |
DE112012006172B4 (de) * | 2012-03-30 | 2020-12-03 | Intel Corporation | Generischer Adressen-Scrambler für Speicherschaltungs-Testengine |
WO2013147844A1 (en) * | 2012-03-30 | 2013-10-03 | Intel Corporation | Built-in self-test for stacked memory architecture |
US9251019B2 (en) | 2012-05-29 | 2016-02-02 | SanDisk Technologies, Inc. | Apparatus, system and method for managing solid-state retirement |
US9697147B2 (en) | 2012-08-06 | 2017-07-04 | Advanced Micro Devices, Inc. | Stacked memory device with metadata management |
KR20140027859A (ko) | 2012-08-27 | 2014-03-07 | 삼성전자주식회사 | 호스트 장치 및 이를 포함하는 시스템 |
JP5968736B2 (ja) | 2012-09-14 | 2016-08-10 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US9431064B2 (en) * | 2012-11-02 | 2016-08-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory circuit and cache circuit configuration |
US20140138815A1 (en) * | 2012-11-20 | 2014-05-22 | Nvidia Corporation | Server processing module |
US9065722B2 (en) * | 2012-12-23 | 2015-06-23 | Advanced Micro Devices, Inc. | Die-stacked device with partitioned multi-hop network |
US9190133B2 (en) | 2013-03-11 | 2015-11-17 | Micron Technology, Inc. | Apparatuses and methods for a memory die architecture including an interface memory |
US10089043B2 (en) | 2013-03-15 | 2018-10-02 | Micron Technology, Inc. | Apparatus and methods for a distributed memory system including memory nodes |
US9679615B2 (en) | 2013-03-15 | 2017-06-13 | Micron Technology, Inc. | Flexible memory system with a controller and a stack of memory |
US9286948B2 (en) | 2013-07-15 | 2016-03-15 | Advanced Micro Devices, Inc. | Query operations for stacked-die memory device |
US9779138B2 (en) | 2013-08-13 | 2017-10-03 | Micron Technology, Inc. | Methods and systems for autonomous memory searching |
US9230940B2 (en) * | 2013-09-13 | 2016-01-05 | Globalfoundries Inc. | Three-dimensional chip stack for self-powered integrated circuit |
US10003675B2 (en) | 2013-12-02 | 2018-06-19 | Micron Technology, Inc. | Packet processor receiving packets containing instructions, data, and starting location and generating packets containing instructions and data |
KR102197069B1 (ko) | 2014-02-04 | 2020-12-30 | 삼성전자 주식회사 | 이미지 센서 및 이미지 처리 장치 |
US20150234726A1 (en) * | 2014-02-19 | 2015-08-20 | Brian P. Moran | Apparatus, system and method to provide platform support for multiple memory technologies |
US8947931B1 (en) * | 2014-06-13 | 2015-02-03 | Sandisk Technologies Inc. | Memory module |
US9875185B2 (en) * | 2014-07-09 | 2018-01-23 | Intel Corporation | Memory sequencing with coherent and non-coherent sub-systems |
KR102204391B1 (ko) | 2014-08-18 | 2021-01-18 | 삼성전자주식회사 | 공유 가능한 ecc 셀 어레이를 갖는 메모리 장치 |
TWI556247B (zh) | 2014-11-12 | 2016-11-01 | 財團法人工業技術研究院 | 錯誤容忍穿矽孔介面及其控制方法 |
WO2016103359A1 (ja) | 2014-12-24 | 2016-06-30 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR102336455B1 (ko) | 2015-01-22 | 2021-12-08 | 삼성전자주식회사 | 집적 회로 및 집적 회로를 포함하는 스토리지 장치 |
KR102222445B1 (ko) | 2015-01-26 | 2021-03-04 | 삼성전자주식회사 | 선택적으로 동작하는 복수의 디램 장치를 포함하는 메모리 시스템 |
JP6429647B2 (ja) | 2015-01-26 | 2018-11-28 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR102373543B1 (ko) * | 2015-04-08 | 2022-03-11 | 삼성전자주식회사 | 멀티칩 패키지에서 온도 편차를 이용하여 동작 제어하는 방법 및 장치 |
US9570142B2 (en) | 2015-05-18 | 2017-02-14 | Micron Technology, Inc. | Apparatus having dice to perorm refresh operations |
KR102401109B1 (ko) | 2015-06-03 | 2022-05-23 | 삼성전자주식회사 | 반도체 패키지 |
US10241941B2 (en) | 2015-06-29 | 2019-03-26 | Nxp Usa, Inc. | Systems and methods for asymmetric memory access to memory banks within integrated circuit systems |
CN106711139B (zh) * | 2015-11-18 | 2019-09-17 | 凌阳科技股份有限公司 | 多晶胞芯片 |
KR102451156B1 (ko) | 2015-12-09 | 2022-10-06 | 삼성전자주식회사 | 메모리 모듈 내에서 랭크 인터리빙 동작을 갖는 반도체 메모리 장치 |
US10034407B2 (en) * | 2016-07-22 | 2018-07-24 | Intel Corporation | Storage sled for a data center |
JP6721696B2 (ja) | 2016-09-23 | 2020-07-15 | キオクシア株式会社 | メモリデバイス |
US10381327B2 (en) | 2016-10-06 | 2019-08-13 | Sandisk Technologies Llc | Non-volatile memory system with wide I/O memory die |
US10490251B2 (en) | 2017-01-30 | 2019-11-26 | Micron Technology, Inc. | Apparatuses and methods for distributing row hammer refresh events across a memory device |
US11037817B2 (en) * | 2017-03-30 | 2021-06-15 | Intel Corporation | Apparatus with multi-wafer based device and method for forming such |
US10541010B2 (en) * | 2018-03-19 | 2020-01-21 | Micron Technology, Inc. | Memory device with configurable input/output interface |
KR102457825B1 (ko) | 2018-04-10 | 2022-10-24 | 에스케이하이닉스 주식회사 | 반도체시스템 |
US10998291B2 (en) * | 2018-05-07 | 2021-05-04 | Micron Technology, Inc. | Channel routing for memory devices |
WO2019222960A1 (en) | 2018-05-24 | 2019-11-28 | Micron Technology, Inc. | Apparatuses and methods for pure-time, self adopt sampling for row hammer refresh sampling |
US11152050B2 (en) | 2018-06-19 | 2021-10-19 | Micron Technology, Inc. | Apparatuses and methods for multiple row hammer refresh address sequences |
US10573370B2 (en) | 2018-07-02 | 2020-02-25 | Micron Technology, Inc. | Apparatus and methods for triggering row hammer address sampling |
US10685696B2 (en) | 2018-10-31 | 2020-06-16 | Micron Technology, Inc. | Apparatuses and methods for access based refresh timing |
WO2020117686A1 (en) | 2018-12-03 | 2020-06-11 | Micron Technology, Inc. | Semiconductor device performing row hammer refresh operation |
CN117198356A (zh) | 2018-12-21 | 2023-12-08 | 美光科技公司 | 用于目标刷新操作的时序交错的设备和方法 |
US10957377B2 (en) | 2018-12-26 | 2021-03-23 | Micron Technology, Inc. | Apparatuses and methods for distributed targeted refresh operations |
US10770127B2 (en) | 2019-02-06 | 2020-09-08 | Micron Technology, Inc. | Apparatuses and methods for managing row access counts |
US11615831B2 (en) | 2019-02-26 | 2023-03-28 | Micron Technology, Inc. | Apparatuses and methods for memory mat refresh sequencing |
US11043254B2 (en) | 2019-03-19 | 2021-06-22 | Micron Technology, Inc. | Semiconductor device having cam that stores address signals |
US11227649B2 (en) | 2019-04-04 | 2022-01-18 | Micron Technology, Inc. | Apparatuses and methods for staggered timing of targeted refresh operations |
US11264096B2 (en) | 2019-05-14 | 2022-03-01 | Micron Technology, Inc. | Apparatuses, systems, and methods for a content addressable memory cell with latch and comparator circuits |
US11158364B2 (en) | 2019-05-31 | 2021-10-26 | Micron Technology, Inc. | Apparatuses and methods for tracking victim rows |
US11069393B2 (en) | 2019-06-04 | 2021-07-20 | Micron Technology, Inc. | Apparatuses and methods for controlling steal rates |
US10978132B2 (en) | 2019-06-05 | 2021-04-13 | Micron Technology, Inc. | Apparatuses and methods for staggered timing of skipped refresh operations |
US11158373B2 (en) | 2019-06-11 | 2021-10-26 | Micron Technology, Inc. | Apparatuses, systems, and methods for determining extremum numerical values |
US11139015B2 (en) | 2019-07-01 | 2021-10-05 | Micron Technology, Inc. | Apparatuses and methods for monitoring word line accesses |
US10832792B1 (en) | 2019-07-01 | 2020-11-10 | Micron Technology, Inc. | Apparatuses and methods for adjusting victim data |
US11386946B2 (en) | 2019-07-16 | 2022-07-12 | Micron Technology, Inc. | Apparatuses and methods for tracking row accesses |
US10943636B1 (en) | 2019-08-20 | 2021-03-09 | Micron Technology, Inc. | Apparatuses and methods for analog row access tracking |
US10964378B2 (en) | 2019-08-22 | 2021-03-30 | Micron Technology, Inc. | Apparatus and method including analog accumulator for determining row access rate and target row address used for refresh operation |
US11302374B2 (en) | 2019-08-23 | 2022-04-12 | Micron Technology, Inc. | Apparatuses and methods for dynamic refresh allocation |
US11200942B2 (en) | 2019-08-23 | 2021-12-14 | Micron Technology, Inc. | Apparatuses and methods for lossy row access counting |
US11302377B2 (en) | 2019-10-16 | 2022-04-12 | Micron Technology, Inc. | Apparatuses and methods for dynamic targeted refresh steals |
WO2022015741A1 (en) * | 2020-07-14 | 2022-01-20 | Micron Technology, Inc. | Multiplexed memory device interface and method |
CN112088406B (zh) * | 2020-08-06 | 2023-10-03 | 长江存储科技有限责任公司 | 用于三维存储器的多管芯峰值功率管理 |
US11309010B2 (en) | 2020-08-14 | 2022-04-19 | Micron Technology, Inc. | Apparatuses, systems, and methods for memory directed access pause |
US11380382B2 (en) | 2020-08-19 | 2022-07-05 | Micron Technology, Inc. | Refresh logic circuit layout having aggressor detector circuit sampling circuit and row hammer refresh control circuit |
US11348631B2 (en) | 2020-08-19 | 2022-05-31 | Micron Technology, Inc. | Apparatuses, systems, and methods for identifying victim rows in a memory device which cannot be simultaneously refreshed |
US11222682B1 (en) | 2020-08-31 | 2022-01-11 | Micron Technology, Inc. | Apparatuses and methods for providing refresh addresses |
US11557331B2 (en) | 2020-09-23 | 2023-01-17 | Micron Technology, Inc. | Apparatuses and methods for controlling refresh operations |
US11222686B1 (en) | 2020-11-12 | 2022-01-11 | Micron Technology, Inc. | Apparatuses and methods for controlling refresh timing |
US11462291B2 (en) | 2020-11-23 | 2022-10-04 | Micron Technology, Inc. | Apparatuses and methods for tracking word line accesses |
KR20220083291A (ko) | 2020-12-11 | 2022-06-20 | 삼성전자주식회사 | 메모리 시스템 및 상기 메모리 시스템을 포함하는 전자 시스템 |
US11264079B1 (en) | 2020-12-18 | 2022-03-01 | Micron Technology, Inc. | Apparatuses and methods for row hammer based cache lockdown |
US11482275B2 (en) | 2021-01-20 | 2022-10-25 | Micron Technology, Inc. | Apparatuses and methods for dynamically allocated aggressor detection |
US11600314B2 (en) | 2021-03-15 | 2023-03-07 | Micron Technology, Inc. | Apparatuses and methods for sketch circuits for refresh binning |
US11664063B2 (en) | 2021-08-12 | 2023-05-30 | Micron Technology, Inc. | Apparatuses and methods for countering memory attacks |
US11688451B2 (en) | 2021-11-29 | 2023-06-27 | Micron Technology, Inc. | Apparatuses, systems, and methods for main sketch and slim sketch circuit for row address tracking |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06291250A (ja) * | 1993-04-06 | 1994-10-18 | Nec Corp | 半導体集積回路およびその形成方法 |
JP2002259322A (ja) * | 2001-02-27 | 2002-09-13 | Fujitsu Ltd | メモリシステム |
JP2004327474A (ja) * | 2003-04-21 | 2004-11-18 | Elpida Memory Inc | メモリモジュール及びメモリシステム |
JP2005038454A (ja) * | 2003-07-15 | 2005-02-10 | Renesas Technology Corp | メモリモジュール及びメモリシステム |
Family Cites Families (54)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02287847A (ja) | 1989-04-28 | 1990-11-27 | Ricoh Co Ltd | 電子機器 |
US5347428A (en) | 1992-12-03 | 1994-09-13 | Irvine Sensors Corporation | Module comprising IC memory stack dedicated to and structurally combined with an IC microprocessor chip |
DE69426695T2 (de) | 1993-04-23 | 2001-08-09 | Irvine Sensors Corp | Elektronisches modul mit einem stapel von ic-chips |
US5567654A (en) * | 1994-09-28 | 1996-10-22 | International Business Machines Corporation | Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging |
US5731945A (en) | 1995-02-22 | 1998-03-24 | International Business Machines Corporation | Multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes |
US6148389A (en) | 1997-03-24 | 2000-11-14 | Texas Instruments Incorporated | PC circuits, systems and methods |
US5815427A (en) | 1997-04-02 | 1998-09-29 | Micron Technology, Inc. | Modular memory circuit and method for forming same |
US7301748B2 (en) | 1997-04-08 | 2007-11-27 | Anthony Anthony A | Universal energy conditioning interposer with circuit architecture |
US6038133A (en) | 1997-11-25 | 2000-03-14 | Matsushita Electric Industrial Co., Ltd. | Circuit component built-in module and method for producing the same |
US5982027A (en) | 1997-12-10 | 1999-11-09 | Micron Technology, Inc. | Integrated circuit interposer with power and ground planes |
US6081463A (en) | 1998-02-25 | 2000-06-27 | Micron Technology, Inc. | Semiconductor memory remapping |
US6600364B1 (en) | 1999-01-05 | 2003-07-29 | Intel Corporation | Active interposer technology for high performance CMOS packaging application |
US6461895B1 (en) | 1999-01-05 | 2002-10-08 | Intel Corporation | Process for making active interposer for high performance packaging applications |
US20030214800A1 (en) | 1999-07-15 | 2003-11-20 | Dibene Joseph Ted | System and method for processor power delivery and thermal management |
US6376909B1 (en) | 1999-09-02 | 2002-04-23 | Micron Technology, Inc. | Mixed-mode stacked integrated circuit with power supply circuit part of the stack |
JP3879816B2 (ja) | 2000-06-02 | 2007-02-14 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、積層型半導体装置、回路基板並びに電子機器 |
US6320812B1 (en) * | 2000-09-20 | 2001-11-20 | Agilent Technologies, Inc. | Error catch RAM for memory tester has SDRAM memory sets configurable for size and speed |
JP2002170844A (ja) * | 2000-12-04 | 2002-06-14 | Oki Electric Ind Co Ltd | 半導体装置 |
JP2003060153A (ja) | 2001-07-27 | 2003-02-28 | Nokia Corp | 半導体パッケージ |
US6979904B2 (en) | 2002-04-19 | 2005-12-27 | Micron Technology, Inc. | Integrated circuit package having reduced interconnects |
US6742058B2 (en) | 2002-09-27 | 2004-05-25 | Texas Instruments Incorporated | Memory controller having a multiplexer selecting either second set of input signals or converted signals from first set of input signals by a bus mode input |
JP2004158595A (ja) | 2002-11-06 | 2004-06-03 | Sanyo Electric Co Ltd | 回路装置、回路モジュールおよび回路装置の製造方法 |
US6856009B2 (en) | 2003-03-11 | 2005-02-15 | Micron Technology, Inc. | Techniques for packaging multiple device components |
JP4205553B2 (ja) * | 2003-11-06 | 2009-01-07 | エルピーダメモリ株式会社 | メモリモジュール及びメモリシステム |
JP4205613B2 (ja) | 2004-03-01 | 2009-01-07 | エルピーダメモリ株式会社 | 半導体装置 |
US7145249B2 (en) | 2004-03-29 | 2006-12-05 | Intel Corporation | Semiconducting device with folded interposer |
US7217994B2 (en) | 2004-12-01 | 2007-05-15 | Kyocera Wireless Corp. | Stack package for high density integrated circuits |
US7400047B2 (en) | 2004-12-13 | 2008-07-15 | Agere Systems Inc. | Integrated circuit with stacked-die configuration utilizing substrate conduction |
JP4356683B2 (ja) | 2005-01-25 | 2009-11-04 | セイコーエプソン株式会社 | デバイス実装構造とデバイス実装方法、液滴吐出ヘッド及びコネクタ並びに半導体装置 |
JP4747621B2 (ja) * | 2005-03-18 | 2011-08-17 | 日本電気株式会社 | メモリインターフェイス制御回路 |
JP4309368B2 (ja) * | 2005-03-30 | 2009-08-05 | エルピーダメモリ株式会社 | 半導体記憶装置 |
US7030317B1 (en) | 2005-04-13 | 2006-04-18 | Delphi Technologies, Inc. | Electronic assembly with stacked integrated circuit die |
JP4423453B2 (ja) * | 2005-05-25 | 2010-03-03 | エルピーダメモリ株式会社 | 半導体記憶装置 |
GB2441726B (en) * | 2005-06-24 | 2010-08-11 | Metaram Inc | An integrated memory core and memory interface circuit |
US20070013080A1 (en) | 2005-06-29 | 2007-01-18 | Intel Corporation | Voltage regulators and systems containing same |
JP4507101B2 (ja) | 2005-06-30 | 2010-07-21 | エルピーダメモリ株式会社 | 半導体記憶装置及びその製造方法 |
US7517798B2 (en) | 2005-09-01 | 2009-04-14 | Micron Technology, Inc. | Methods for forming through-wafer interconnects and structures resulting therefrom |
WO2007029253A2 (en) | 2005-09-06 | 2007-03-15 | Beyond Blades Ltd. | 3-dimensional multi-layered modular computer architecture |
US7464225B2 (en) * | 2005-09-26 | 2008-12-09 | Rambus Inc. | Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology |
JP4655891B2 (ja) * | 2005-11-02 | 2011-03-23 | ソニー株式会社 | 通信用半導体チップ、キャリブレーション方法、並びにプログラム |
US7564066B2 (en) * | 2005-11-09 | 2009-07-21 | Intel Corporation | Multi-chip assembly with optically coupled die |
US20070126085A1 (en) | 2005-12-02 | 2007-06-07 | Nec Electronics Corporation | Semiconductor device and method of manufacturing the same |
JP2007157226A (ja) | 2005-12-02 | 2007-06-21 | Fujitsu Ltd | ディスク装置及びデータ読み書き方法 |
JP4799157B2 (ja) * | 2005-12-06 | 2011-10-26 | エルピーダメモリ株式会社 | 積層型半導体装置 |
US7279795B2 (en) | 2005-12-29 | 2007-10-09 | Intel Corporation | Stacked die semiconductor package |
JP2007188916A (ja) | 2006-01-11 | 2007-07-26 | Renesas Technology Corp | 半導体装置 |
JP4753725B2 (ja) | 2006-01-20 | 2011-08-24 | エルピーダメモリ株式会社 | 積層型半導体装置 |
JP2008004853A (ja) | 2006-06-26 | 2008-01-10 | Hitachi Ltd | 積層半導体装置およびモジュール |
US20080001271A1 (en) | 2006-06-30 | 2008-01-03 | Sony Ericsson Mobile Communications Ab | Flipped, stacked-chip IC packaging for high bandwidth data transfer buses |
EP4254413A3 (en) * | 2006-12-14 | 2023-12-27 | Rambus Inc. | Multi-die memory device |
US8143719B2 (en) | 2007-06-07 | 2012-03-27 | United Test And Assembly Center Ltd. | Vented die and package |
US7623365B2 (en) * | 2007-08-29 | 2009-11-24 | Micron Technology, Inc. | Memory device interface methods, apparatus, and systems |
US8106520B2 (en) | 2008-09-11 | 2012-01-31 | Micron Technology, Inc. | Signal delivery in stacked device |
US7872936B2 (en) * | 2008-09-17 | 2011-01-18 | Qimonda Ag | System and method for packaged memory |
-
2007
- 2007-08-29 US US11/847,113 patent/US7623365B2/en active Active
-
2008
- 2008-08-28 JP JP2010522950A patent/JP5354390B2/ja active Active
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- 2008-08-28 WO PCT/US2008/010188 patent/WO2009032153A2/en active Application Filing
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-
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- 2013-08-15 JP JP2013168771A patent/JP5643884B2/ja active Active
- 2013-10-29 US US14/066,269 patent/US9001548B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06291250A (ja) * | 1993-04-06 | 1994-10-18 | Nec Corp | 半導体集積回路およびその形成方法 |
JP2002259322A (ja) * | 2001-02-27 | 2002-09-13 | Fujitsu Ltd | メモリシステム |
JP2004327474A (ja) * | 2003-04-21 | 2004-11-18 | Elpida Memory Inc | メモリモジュール及びメモリシステム |
JP2005038454A (ja) * | 2003-07-15 | 2005-02-10 | Renesas Technology Corp | メモリモジュール及びメモリシステム |
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WO2009032153A2 (en) | 2009-03-12 |
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CN101809738A (zh) | 2010-08-18 |
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