JP2013004576A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2013004576A
JP2013004576A JP2011131251A JP2011131251A JP2013004576A JP 2013004576 A JP2013004576 A JP 2013004576A JP 2011131251 A JP2011131251 A JP 2011131251A JP 2011131251 A JP2011131251 A JP 2011131251A JP 2013004576 A JP2013004576 A JP 2013004576A
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JP
Japan
Prior art keywords
metal film
semiconductor device
core substrate
semiconductor element
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2011131251A
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English (en)
Japanese (ja)
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JP2013004576A5 (https=
Inventor
Michio Horiuchi
道夫 堀内
Yasue Tokutake
安衛 徳武
Yuichi Matsuda
勇一 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2011131251A priority Critical patent/JP2013004576A/ja
Priority to US13/493,123 priority patent/US8664764B2/en
Publication of JP2013004576A publication Critical patent/JP2013004576A/ja
Publication of JP2013004576A5 publication Critical patent/JP2013004576A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9413—Dispositions of bond pads on encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/019—Manufacture or treatment using temporary auxiliary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/288—Configurations of stacked chips characterised by arrangements for thermal management of the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP2011131251A 2011-06-13 2011-06-13 半導体装置 Pending JP2013004576A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2011131251A JP2013004576A (ja) 2011-06-13 2011-06-13 半導体装置
US13/493,123 US8664764B2 (en) 2011-06-13 2012-06-11 Semiconductor device including a core substrate and a semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011131251A JP2013004576A (ja) 2011-06-13 2011-06-13 半導体装置

Publications (2)

Publication Number Publication Date
JP2013004576A true JP2013004576A (ja) 2013-01-07
JP2013004576A5 JP2013004576A5 (https=) 2014-07-03

Family

ID=47292477

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011131251A Pending JP2013004576A (ja) 2011-06-13 2011-06-13 半導体装置

Country Status (2)

Country Link
US (1) US8664764B2 (https=)
JP (1) JP2013004576A (https=)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014082447A (ja) * 2012-09-26 2014-05-08 Fujifilm Corp 多層基板および半導体パッケージ
WO2014156025A1 (ja) * 2013-03-26 2014-10-02 田中貴金属工業株式会社 半導体装置及び放熱機構
JPWO2013073082A1 (ja) * 2011-11-16 2015-04-02 パナソニック株式会社 拡張型半導体チップ及び半導体装置
JP2016195238A (ja) * 2015-03-31 2016-11-17 新光電気工業株式会社 配線基板及び半導体パッケージ
JP2021502706A (ja) * 2017-11-10 2021-01-28 エルペーカーエフ レーザー ウント エレクトロニクス アーゲー 半導体ウェハの集積方法及び装置
JP2024090149A (ja) * 2022-12-22 2024-07-04 株式会社村田製作所 複合部品デバイスおよびその製造方法

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012256675A (ja) * 2011-06-08 2012-12-27 Shinko Electric Ind Co Ltd 配線基板、半導体装置及びその製造方法
US9030017B2 (en) * 2012-11-13 2015-05-12 Invensas Corporation Z-connection using electroless plating
US20140151095A1 (en) * 2012-12-05 2014-06-05 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and method for manufacturing the same
CN104185365B (zh) * 2013-05-23 2018-06-26 比亚迪股份有限公司 一种线路板及其制备方法
JP6031060B2 (ja) 2014-03-31 2016-11-24 信越化学工業株式会社 半導体装置、積層型半導体装置、封止後積層型半導体装置、及びこれらの製造方法
CN105118815B (zh) * 2015-08-13 2017-09-29 上海航天电子通讯设备研究所 一种基于铝基板的三维封装用垂直互连结构及其制备方法
KR102561987B1 (ko) * 2017-01-11 2023-07-31 삼성전기주식회사 반도체 패키지와 그 제조 방법

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0433396A (ja) * 1990-05-30 1992-02-04 Fujitsu Ltd 空気層を有するセラミック多層プリント板
JP2004153084A (ja) * 2002-10-31 2004-05-27 Denso Corp 多層配線基板の製造方法及び多層配線基板
JP2006019342A (ja) * 2004-06-30 2006-01-19 Tdk Corp 半導体ｉｃ内蔵基板
WO2007069789A1 (ja) * 2005-12-16 2007-06-21 Ibiden Co., Ltd. 多層プリント配線板およびその製造方法
JP2008091471A (ja) * 2006-09-29 2008-04-17 Tdk Corp 半導体内蔵基板及びその製造方法
JP2011023626A (ja) * 2009-07-17 2011-02-03 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW472330B (en) * 1999-08-26 2002-01-11 Toshiba Corp Semiconductor device and the manufacturing method thereof
US6392301B1 (en) * 1999-10-22 2002-05-21 Intel Corporation Chip package and method
US8193092B2 (en) * 2007-07-31 2012-06-05 Micron Technology, Inc. Semiconductor devices including a through-substrate conductive member with an exposed end and methods of manufacturing such semiconductor devices
TWI328423B (en) * 2007-09-14 2010-08-01 Unimicron Technology Corp Circuit board structure having heat-dissipating structure
US8129828B2 (en) * 2008-09-29 2012-03-06 Ngk Spark Plug Co., Ltd. Wiring substrate with reinforcement
JP5249132B2 (ja) * 2009-06-03 2013-07-31 新光電気工業株式会社 配線基板
JP5280945B2 (ja) * 2009-06-19 2013-09-04 新光電気工業株式会社 半導体装置及びその製造方法
WO2011027588A1 (ja) * 2009-09-04 2011-03-10 シャープ株式会社 電子パッケージ、照明装置、表示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0433396A (ja) * 1990-05-30 1992-02-04 Fujitsu Ltd 空気層を有するセラミック多層プリント板
JP2004153084A (ja) * 2002-10-31 2004-05-27 Denso Corp 多層配線基板の製造方法及び多層配線基板
JP2006019342A (ja) * 2004-06-30 2006-01-19 Tdk Corp 半導体ｉｃ内蔵基板
WO2007069789A1 (ja) * 2005-12-16 2007-06-21 Ibiden Co., Ltd. 多層プリント配線板およびその製造方法
JP2008091471A (ja) * 2006-09-29 2008-04-17 Tdk Corp 半導体内蔵基板及びその製造方法
JP2011023626A (ja) * 2009-07-17 2011-02-03 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2013073082A1 (ja) * 2011-11-16 2015-04-02 パナソニック株式会社 拡張型半導体チップ及び半導体装置
JP2014082447A (ja) * 2012-09-26 2014-05-08 Fujifilm Corp 多層基板および半導体パッケージ
WO2014156025A1 (ja) * 2013-03-26 2014-10-02 田中貴金属工業株式会社 半導体装置及び放熱機構
JP2014192209A (ja) * 2013-03-26 2014-10-06 Tanaka Kikinzoku Kogyo Kk 半導体装置及び放熱機構
US9607922B2 (en) 2013-03-26 2017-03-28 Tanaka Kikinzoku Kogyo K.K. Semiconductor device and heat-dissipating mechanism
JP2016195238A (ja) * 2015-03-31 2016-11-17 新光電気工業株式会社 配線基板及び半導体パッケージ
JP2021502706A (ja) * 2017-11-10 2021-01-28 エルペーカーエフ レーザー ウント エレクトロニクス アーゲー 半導体ウェハの集積方法及び装置
JP7090153B2 (ja) 2017-11-10 2022-06-23 エルペーカーエフ レーザー ウント エレクトロニクス アーゲー 半導体ウェハの集積方法及び装置
JP2024090149A (ja) * 2022-12-22 2024-07-04 株式会社村田製作所 複合部品デバイスおよびその製造方法
JP7715143B2 (ja) 2022-12-22 2025-07-30 株式会社村田製作所 複合部品デバイスおよびその製造方法

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US20120313245A1 (en) 2012-12-13
US8664764B2 (en) 2014-03-04

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