JP2012521652A - デチャック時における電位スパイクを抑制する方法及び装置 - Google Patents
デチャック時における電位スパイクを抑制する方法及び装置 Download PDFInfo
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32733—Means for moving the material to be treated
- H01J37/32788—Means for moving the material to be treated for extracting the material from the process chamber
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- H—ELECTRICITY
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
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- H01L21/68742—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
【選択図】図1
Description
Claims (20)
- プラズマ処理チャンバー内で静電チャックから基板をデチャックする方法であって、
処理ガスを前記チャンバーに供給し、
前記処理ガスをプラズマ状態に励起させ、
前記プラズマ処理チャンバーを減圧かつ低RF電力状態に維持して、前記基板の上方に2mm以上の厚みのプラズマ・シースを形成し、
前記基板を、前記静電チャックの支持面の上方に、プラズマを不安定化させることなく、前記プラズマ・シース内の中間リフト位置まで持ち上げて、前記基板を前記中間リフト位置に保持し、
前記プラズマを消滅させ、
前記基板を、前記中間リフト位置の上方に、前記基板を前記プラズマ処理チャンバーから取り出すことのできる上昇位置まで持ち上げる、方法。 - 請求項1に記載の方法であって、
(a)前記処理ガスがアルゴン、窒素、又はその混合ガスである、
(b)前記基板が2〜30秒間、前記中間リフト位置で保持される、及び/又は、
(c)前記基板を前記中間リフト位置まで持ち上げる場合、前記静電チャックの前記支持面よりも0.5〜3mm上に持ち上げる、方法。 - 請求項1に記載の方法であって、
デチャック時に、電気絶縁材料から形成されるリフトピンにより前記基板を持ち上げ、電圧を前記静電チャックに印加する、方法。 - 請求項1に記載の方法であって、
(a)前記基板がガラスキャリアに接合されたシリコンウエハの場合に、前記方法は、さらに、前記シリコン材をプラズマエッチングすることを含む、
(b)前記基板が半導体ウエハの場合に、前記方法は、さらに、前記ウエハ内のシリコン層をエッチングすることを含む、又は、
(c)前記基板が少なくとも1層の誘電体を含む半導体ウエハの場合に、前記方法は、さらに、前記誘電体に開口部をプラズマエッチングすることを含む、方法。 - 請求項5に記載の方法であって、
前記誘電体に開口部をプラズマエッチングする間、前記基板の下面にヘリウムガスを供給し、さらに、基板を前記中間リフト位置まで上昇させる前に、ヘリウムガスの供給を停止する、方法。 - 請求項1に記載の方法であって、
前記基板を前記静電チャックから取り外す前に、前記基板の下面にヘリウムガスを供給し、その後、前記基板の下面へのヘリウムガスの供給を停止する、方法。 - 請求項1に記載の方法であって、
前記基板の下面にヘリウムガスを供給し、さらに、処理ガスがプラズマ状態となっている間に、1〜5トールのヘリウム背圧を前記基板の下面に印加する、方法。 - 請求項1に記載の方法であって、
前記静電チャックに印加する電圧を、前記基板を持ち上げる前に、基板電位スパイクの大きさを25V未満に減少させるのに十分な値に設定する、方法。 - 請求項1に記載の方法であって、
前記基板を前記上昇位置まで持ち上げる際に、前記基板を前記静電チャックの前記支持面の少なくとも5mm上まで持ち上げる、方法。 - 請求項1に記載の方法であって、
(a)前記プラズマ処理チャンバーは、上部シャワー電極が前記基板を支持する下部電極に対向して配置される容量結合プラズマ処理チャンバーであって、前記励起させる場合に、前記下部電極に高周波電力(RF電力)を供給する、又は、
(b)前記プラズマ処理チャンバーは、コイルを備える誘導結合プラズマ処理チャンバーであって、前記励起させる場合に、前記コイルにRF電力を供給する、方法。 - 請求項10に記載の方法であって、
前記チャンバーは容量結合プラズマ処理チャンバーであって、前記上部電極と前記下部電極との間のギャップが少なくとも20mmであり、前記チャンバー内の圧力が15〜500ミリトール(mTorr)である、方法。 - 請求項1に記載の方法であって、
さらに、前記プラズマを消滅させる前に、デチャック電圧を印加する、方法。 - 請求項12に記載の方法であって、
前記デチャック電圧を、前記基板上のプラズマ誘導バイアスの50V又は200Vの範囲内の値に設定する、方法。 - 請求項1に記載の方法であって、
さらに、前記基板を持ち上げる前に前記基板を処理し、
前記処理が、
(a)前記基板の上表面上に層を形成する、又は、
(b)前記基板からフォトレジストを剥離する、
ことを含む、方法。 - 請求項1に記載の方法であって、
前記中間リフト位置への持ち上げ、及び、前記中間リフト位置から上方への持ち上げのいずれも、ガス圧式アクチュエータによる持ち上げを含み、
シャトル弁を通るガス流が持ち上げ力の削減に貢献する、方法。 - リフトピンが静電チャックの上表面に対して少なくとも3つの位置に基板を昇降するプラズマリアクター用のガス圧式リフト機構であって、
上部チャンバーと下部チャンバーとを有する筺体と、
前記上部チャンバー内で上下に移動するようにスライド可能に取り付けられる上部ピストンと、
前記下部チャンバー内で上下に移動するようにスライド可能に取り付けられる下部ピストンと、を備え、
前記下部チャンバーが、前記下部ピストンの移動上限を規定するハードストップを備え、
前記3つの位置が、
(1)前記上部ピストンが前記静電チャックの前記上表面の下方に前記リフトピンを位置させる下降位置と、
(2)前記下部ピストンが前記ハードストップに接して、前記下部ピストンのシャフトが前記上部ピストンを持ち上げる中間リフト位置と、
(3)前記基板を前記プラズマチャンバーから取り出すことができる上昇位置と、であり、
前記上部ピストンと前記下部ピストンが、独立にガス圧により作動する、リフト機構。 - 請求項16に記載のリフト機構であって、
さらに、前記上部ピストンから上方に伸長するシャフトに動作可能に接続されるリフトピン・ヨークを備える、リフト機構。 - 請求項16に記載のリフト機構であって、
前記筺体が、加圧ガス源に動作可能に接続される複数の吸気口を備え、
前記複数の吸気口が、前記上部ピストンの上方で前記上部チャンバーの一部と流体連結する第1の吸気口と、前記上部ピストンの下方で前記上部チャンバーの一部と流体連結する第2の吸気口と、前記下部ピストンの上方で前記下部チャンバーの一部と流体連結する第3の吸気口と、前記下部ピストンの下方で前記下部チャンバーの一部と流体連結する第4の吸気口と、を含み、
前記上部ピストンに印加される上向きの力が、前記第1の吸気口に供給される加圧ガスにより与えられる反対向きのガス圧により制限される、リフト機構。 - 請求項18に記載のリフト機構であって、
前記第1の吸気口は、25〜65psigの圧力でガスを供給する第1のガス源に流体連結し、前記第2、第3及び第4の吸気口は、70〜120psimの圧力でガスを供給する第2のガス源に流体連結し、
さらに、前記第1及び第2のガス源から前記複数の吸気口に選択的にガスを供給するように操作可能なコントローラーを備える、リフト機構。 - 請求項19に記載のリフト機構であって、
さらに、前記第1のガス源と前記第2のガス源のいずれかに流体連結するように前記第1の吸気口を設定する働きをする弁を備える、リフト機構。
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US12/410,202 US8313612B2 (en) | 2009-03-24 | 2009-03-24 | Method and apparatus for reduction of voltage potential spike during dechucking |
US12/410,202 | 2009-03-24 | ||
PCT/IB2010/051137 WO2010109373A2 (en) | 2009-03-24 | 2010-03-16 | Method and apparatus for reduction of voltage potential spike during dechucking |
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CN (1) | CN102362342B (ja) |
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Also Published As
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CN102362342A (zh) | 2012-02-22 |
WO2010109373A3 (en) | 2010-12-29 |
KR101690808B1 (ko) | 2017-01-09 |
US8628675B2 (en) | 2014-01-14 |
US20130059447A1 (en) | 2013-03-07 |
KR20110128895A (ko) | 2011-11-30 |
US20100248490A1 (en) | 2010-09-30 |
CN102362342B (zh) | 2014-01-15 |
TW201108349A (en) | 2011-03-01 |
JP6049453B2 (ja) | 2016-12-21 |
WO2010109373A2 (en) | 2010-09-30 |
US8313612B2 (en) | 2012-11-20 |
JP2015216391A (ja) | 2015-12-03 |
TWI502681B (zh) | 2015-10-01 |
JP6149071B2 (ja) | 2017-06-14 |
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