JP2012518867A5 - - Google Patents

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Publication number
JP2012518867A5
JP2012518867A5 JP2011551276A JP2011551276A JP2012518867A5 JP 2012518867 A5 JP2012518867 A5 JP 2012518867A5 JP 2011551276 A JP2011551276 A JP 2011551276A JP 2011551276 A JP2011551276 A JP 2011551276A JP 2012518867 A5 JP2012518867 A5 JP 2012518867A5
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JP
Japan
Prior art keywords
resistance state
read
tunnel junction
data cell
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2011551276A
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English (en)
Japanese (ja)
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JP2012518867A (ja
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Publication date
Priority claimed from US12/390,006 external-priority patent/US7876604B2/en
Application filed filed Critical
Publication of JP2012518867A publication Critical patent/JP2012518867A/ja
Publication of JP2012518867A5 publication Critical patent/JP2012518867A5/ja
Pending legal-status Critical Current

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JP2011551276A 2009-02-20 2010-02-22 スピン転移トルクメモリの自己参照読出方法 Pending JP2012518867A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/390,006 2009-02-20
US12/390,006 US7876604B2 (en) 2008-11-05 2009-02-20 Stram with self-reference read scheme
PCT/US2010/024928 WO2010096768A1 (en) 2009-02-20 2010-02-22 Spin-transfer torque memory self-reference read method

Publications (2)

Publication Number Publication Date
JP2012518867A JP2012518867A (ja) 2012-08-16
JP2012518867A5 true JP2012518867A5 (enExample) 2013-04-11

Family

ID=42173868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011551276A Pending JP2012518867A (ja) 2009-02-20 2010-02-22 スピン転移トルクメモリの自己参照読出方法

Country Status (6)

Country Link
US (2) US7876604B2 (enExample)
EP (1) EP2399259B1 (enExample)
JP (1) JP2012518867A (enExample)
KR (1) KR101405863B1 (enExample)
CN (1) CN102326204B (enExample)
WO (1) WO2010096768A1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7826255B2 (en) * 2008-09-15 2010-11-02 Seagate Technology Llc Variable write and read methods for resistive random access memory
US7859891B2 (en) * 2008-09-30 2010-12-28 Seagate Technology Llc Static source plane in stram
US7876604B2 (en) * 2008-11-05 2011-01-25 Seagate Technology Llc Stram with self-reference read scheme
US9183911B2 (en) 2011-11-17 2015-11-10 Everspin Technologies, Inc. Hybrid read scheme for spin torque MRAM
US8493776B1 (en) * 2012-02-02 2013-07-23 Taiwan Semiconductor Manufacturing Co., Ltd. MRAM with current-based self-referenced read operations
WO2013147728A1 (en) * 2012-03-25 2013-10-03 Intel Corporation Methods and systems to read a magnetic tunnel junction (mtj) based memory cell based on a pulsed read current
US8923041B2 (en) 2012-04-11 2014-12-30 Everspin Technologies, Inc. Self-referenced sense amplifier for spin torque MRAM
US9047944B2 (en) 2013-04-24 2015-06-02 Micron Technology, Inc. Resistance variable memory sensing
CN103268916B (zh) * 2013-04-25 2015-06-10 中国科学院宁波材料技术与工程研究所 一种磁性隧道结的制备方法
KR20140137024A (ko) * 2013-05-16 2014-12-02 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 데이터 처리 방법
US9627024B2 (en) 2013-09-19 2017-04-18 University of Pittsburgh—of the Commonwealth System of Higher Education Magnetic-assisted nondestructive self-reference sensing method for spin-transfer torque random access memory
EP3062215B1 (en) * 2015-02-24 2018-04-04 Crocus Technology S.A. Mram-based programmable magnetic device for generating random numbers
JP2018163713A (ja) * 2017-03-24 2018-10-18 東芝メモリ株式会社 メモリデバイス及びその制御方法

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19950581A1 (de) 1999-10-20 2001-04-26 Infineon Technologies Ag Anordnung zur Selbstreferenzierung von ferroelektrischen Speicherzellen
US6349056B1 (en) 2000-12-28 2002-02-19 Sandisk Corporation Method and structure for efficient data verification operation for non-volatile memories
JP4679036B2 (ja) * 2002-09-12 2011-04-27 ルネサスエレクトロニクス株式会社 記憶装置
US6870760B2 (en) 2003-02-24 2005-03-22 Applied Spintronics Technology, Inc. Method and system for performing readout utilizing a self reference scheme
KR100560661B1 (ko) 2003-06-19 2006-03-16 삼성전자주식회사 자기 메모리의 읽기 방법
US6925000B2 (en) 2003-12-12 2005-08-02 Maglabs, Inc. Method and apparatus for a high density magnetic random access memory (MRAM) with stackable architecture
US7187576B2 (en) 2004-07-19 2007-03-06 Infineon Technologies Ag Read out scheme for several bits in a single MRAM soft layer
JP5160724B2 (ja) * 2004-09-06 2013-03-13 ソニー株式会社 メモリ
KR100669363B1 (ko) 2004-10-26 2007-01-16 삼성전자주식회사 메모리 장치의 읽기 방법
JP3959417B2 (ja) 2004-10-29 2007-08-15 株式会社東芝 半導体メモリの読み出し回路
JP4261461B2 (ja) * 2004-11-05 2009-04-30 株式会社東芝 半導体集積回路装置、及びそれを用いた不揮発性メモリシステム
JP4543901B2 (ja) * 2004-11-26 2010-09-15 ソニー株式会社 メモリ
JP4284279B2 (ja) * 2005-01-04 2009-06-24 株式会社東芝 磁気記録装置の書き込み及び読み出し方法
US7102946B2 (en) 2005-02-09 2006-09-05 International Business Machines Corporation Local bit select circuit with slow read recovery scheme
JP2006294179A (ja) 2005-04-14 2006-10-26 Renesas Technology Corp 不揮発性記憶装置
US7289356B2 (en) 2005-06-08 2007-10-30 Grandis, Inc. Fast magnetic memory devices utilizing spin transfer and magnetic elements used therein
US7224601B2 (en) 2005-08-25 2007-05-29 Grandis Inc. Oscillating-field assisted spin torque switching of a magnetic tunnel junction memory element
US7272035B1 (en) 2005-08-31 2007-09-18 Grandis, Inc. Current driven switching of magnetic storage cells utilizing spin transfer and magnetic memories using such cells
US7272034B1 (en) 2005-08-31 2007-09-18 Grandis, Inc. Current driven switching of magnetic storage cells utilizing spin transfer and magnetic memories using such cells
US20090103215A1 (en) * 2005-10-21 2009-04-23 Freitag James M Magnetoresistive (mr) elements having improved hard bias seed layers
US7286395B2 (en) * 2005-10-27 2007-10-23 Grandis, Inc. Current driven switched magnetic storage cells having improved read and write margins and magnetic memories using such cells
US7187577B1 (en) 2005-11-23 2007-03-06 Grandis, Inc. Method and system for providing current balanced writing for memory cells and magnetic devices
US7515457B2 (en) 2006-02-24 2009-04-07 Grandis, Inc. Current driven memory cells having enhanced current and enhanced current symmetry
JPWO2007111318A1 (ja) * 2006-03-28 2009-08-13 日本電気株式会社 磁気ランダムアクセスメモリ及びその動作方法
US7564110B2 (en) * 2006-04-19 2009-07-21 Hitachi Global Storage Technologies Netherlands B.V. Electrical lapping guides made from tunneling magnetoresistive (TMR) material
US7345912B2 (en) 2006-06-01 2008-03-18 Grandis, Inc. Method and system for providing a magnetic memory structure utilizing spin transfer
US7379327B2 (en) 2006-06-26 2008-05-27 Grandis, Inc. Current driven switching of magnetic storage cells utilizing spin transfer and magnetic memories using such cells having enhanced read and write margins
US7502249B1 (en) 2006-07-17 2009-03-10 Grandis, Inc. Method and system for using a pulsed field to assist spin transfer induced switching of magnetic memory elements
US7764537B2 (en) * 2007-04-05 2010-07-27 Qualcomm Incorporated Spin transfer torque magnetoresistive random access memory and design methods
WO2008154519A1 (en) 2007-06-12 2008-12-18 Grandis, Inc. Method and system for providing a magnetic element and magnetic memory being unidirectional writing enabled
US7742328B2 (en) 2007-06-15 2010-06-22 Grandis, Inc. Method and system for providing spin transfer tunneling magnetic memories utilizing non-planar transistors
US7764536B2 (en) 2007-08-07 2010-07-27 Grandis, Inc. Method and system for providing a sense amplifier and drive circuit for spin transfer torque magnetic random access memory
US20090185410A1 (en) 2008-01-22 2009-07-23 Grandis, Inc. Method and system for providing spin transfer tunneling magnetic memories utilizing unidirectional polarity selection devices
US7876604B2 (en) * 2008-11-05 2011-01-25 Seagate Technology Llc Stram with self-reference read scheme

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