WO2010096768A1 - Spin-transfer torque memory self-reference read method - Google Patents

Spin-transfer torque memory self-reference read method Download PDF

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Publication number
WO2010096768A1
WO2010096768A1 PCT/US2010/024928 US2010024928W WO2010096768A1 WO 2010096768 A1 WO2010096768 A1 WO 2010096768A1 US 2010024928 W US2010024928 W US 2010024928W WO 2010096768 A1 WO2010096768 A1 WO 2010096768A1
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WO
WIPO (PCT)
Prior art keywords
resistance state
tunnel junction
magnetic tunnel
data cell
junction data
Prior art date
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Ceased
Application number
PCT/US2010/024928
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English (en)
French (fr)
Inventor
Yuanki Zheng
Yiran Chen
Xiaobin Wang
Zheng Gao
Dimitar Dimitrov
Wenzhong Zhu
Yong Lu
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Seagate Technology LLC
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Seagate Technology LLC
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Publication date
Application filed by Seagate Technology LLC filed Critical Seagate Technology LLC
Priority to JP2011551276A priority Critical patent/JP2012518867A/ja
Priority to EP10707396.7A priority patent/EP2399259B1/en
Priority to CN201080008973.XA priority patent/CN102326204B/zh
Priority to KR1020117021976A priority patent/KR101405863B1/ko
Publication of WO2010096768A1 publication Critical patent/WO2010096768A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1673—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect

Definitions

  • Flash memory is one such device but has several drawbacks such as slow access speed ( ⁇ ms write and -50- 100ns read), limited endurance ( ⁇ 10 3 -10 4 programming cycles), and the integration difficulty in system-on-chip (SoC). Flash memory (NAND or NOR) also faces significant scaling problems at 32nm node and beyond.
  • MRAM Magneto-resistive Random Access Memory
  • MRAM Magneto-resistive Random Access Memory
  • MTJ magnetic tunneling junction
  • Data storage is realized by switching the resistance of MTJ between a high-resistance state and a low- resistance state.
  • MRAM switches the MTJ resistance by using a current induced magnetic field to switch the magnetization of MTJ. As the MTJ size shrinks, the switching magnetic field amplitude increases and the switching variation becomes more severe.
  • STRAM Spin-Torque Transfer RAM
  • MTJ Magnetization switching
  • the switching mechanism of STRAM is constrained locally and STRAM is believed to have a better scaling property than the conventional MRAM.
  • reading a STRAM cell is challenging as the cell is scaled down.
  • present disclosure relates to spin-transfer torque random access memory self-reference read operations and apparatus for the same.
  • present disclosure relates to a spin-transfer torque random access memory self-reference read operation.
  • One illustrative method of reading a magnetic tunnel junction data cell includes applying a read voltage across a magnetic tunnel junction data cell and forming a read current.
  • the magnetic tunnel junction data cell has a first resistance state.
  • the read voltage is sufficient to switch the magnetic tunnel junction data cell resistance.
  • the method includes detecting the read current and determining if the read current remains constant during the applying step. If the read current remains constant during the applying step, then the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read voltage was sufficient to switch the magnetic tunnel junction data cell to.
  • Another illustrative method of self-reference reading a magnetic tunnel junction data cell includes applying a read current across a magnetic tunnel junction data cell and forming a read voltage.
  • the magnetic tunnel junction data cell has a first resistance state.
  • the read current is sufficient to switch the magnetic tunnel junction data cell resistance.
  • the method includes detecting the read voltage and determining if the read voltage remains constant during the applying step. If the read voltage remains constant during the applying step, then the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read current was sufficient to switch the magnetic tunnel junction data cell to.
  • Another embodiments includes a magnetic memory apparatus having a magnetic tunnel junction data cell that is switchable between a high resistance data state and a low resistance data state upon application of a spin polarized switching current and a switching current or voltage source electrically connected to the magnetic tunnel junction data cell.
  • a voltage or current differentiator is electrically coupled to the magnetic tunnel junction data cell to detect a read current or read voltage change within a time interval of less than 50 nanoseconds when a switching current or voltage is applied to the magnetic tunnel junction data cell.
  • FIG. 1 is a cross-sectional schematic diagram of an illustrative spin-transfer torque MTJ memory unit in the low resistance state
  • FIG. 2 is a cross-sectional schematic diagram of another spin-transfer torque MTJ memory unit in the high resistance state
  • FIG. 3 is a schematic circuit diagram of a spin-transfer torque MTJ memory unit
  • FIG. 4 is a schematic circuit diagram of an illustrative spin-transfer torque MTJ memory read detection apparatus
  • FIG. 5 is an illustrative detailed signal timing graphs for the read detection apparatus shown in FIG. 5;
  • FIG. 6 is a is a graph of a static R-V (resistance-voltage) curve of a spin-transfer torque MTJ memory unit where the resistance state switches from the high resistance state to the low resistance state;
  • FIG. 7 is illustrative detailed signal timing graphs for read current detection at the high to low resistance state switching voltage when the spin-transfer torque MTJ memory unit is in the high resistance state;
  • FIG. 8 is illustrative detailed signal timing graphs for read current detection at the high to low resistance state switching voltage when the spin-transfer torque MTJ memory unit is in the low resistance state;
  • FIG. 9 is a is a graph of a static R-I (resistance-current) curve of a spin-transfer torque MTJ memory unit where the resistance state switches from the high resistance state to the low resistance state;
  • FIG. 10 is illustrative detailed signal timing graphs for read current detection at the high to low resistance state switching voltage when the spin-transfer torque MTJ memory unit is in the high resistance state;
  • FIG. 11 is illustrative detailed signal timing graphs for read current detection at the high to low resistance state switching voltage when the spin-transfer torque MTJ memory unit is in the low resistance state;
  • FIG. 12A is a flow diagram of an illustrative self-reference reading method sensing a read current when applying a voltage sufficient to switch the MTJ from a high resistance state to a low resistance state;
  • FIG. 12B is a flow diagram of an illustrative self-reference reading method sensing a read current when applying a voltage sufficient to switch the MTJ from a low resistance state to a high resistance state;
  • FIG. 13 is a flow diagram of an illustrative self-reference reading method sensing a read voltage.
  • the present disclosure relates to spin-transfer torque memory apparatus and self-reference read methods.
  • present disclosure relates to self-reference reading methods to determine whether a spin-transfer torque memory unit has a high resistance state or low resistance state data state.
  • a read current or read voltage sufficient to switch the resistance state of a magnetic tunnel junction data cell, is applied to a magnetic tunnel junction data cell.
  • a resulting read voltage or current is detected and if a voltage or current jump or drop is detected, the resistance state of the magnetic tunnel junction data cell is determined to be the opposing data state that the read current or read voltage was sufficient to switch the magnetic tunnel junction to.
  • the resistance state of the magnetic tunnel junction data cell is determined to be the data state that the read current or read voltage was sufficient to switch the magnetic tunnel junction to. If a resulting read voltage or resulting read current jump or drop is detected, then a write back operation returns the magnetic tunnel junction data cell to its original resistive data state.
  • the disclosed method provides a large available detection signal, and fast reading speed. While the present disclosure is not so limited, an appreciation of various aspects of the disclosure will be gained through a discussion of the examples provided below.
  • FIG. 1 is a cross-sectional schematic diagram of an illustrative spin-transfer torque MTJ memory unit 10 in the low resistance state
  • FIG. 2 is a cross-sectional schematic diagram of another spin-transfer torque MTJ memory unit 10 in the high resistance state.
  • a magnetic tunnel junction (MTJ) memory unit 10 includes a ferromagnetic free layer 12 and a ferromagnetic reference (i.e., pinned) layer 14. The ferromagnetic free layer 12 and a ferromagnetic reference layer 14 are separated by an oxide barrier layer 13 or tunnel barrier.
  • a first electrode 15 is in electrical contact with the ferromagnetic free layer 12 and a second electrode 16 is in electrical contact with the ferromagnetic reference layer 14.
  • the ferromagnetic layers 12, 14 may be made of any useful ferromagnetic (FM) alloys such as, for example, Fe, Co, Ni and the insulating barrier layer 13 may be made of an electrically insulating material such as, for example an oxide material (e.g., AI2O3 or MgO). Other suitable materials may also be used.
  • FM ferromagnetic
  • the electrodes 15, 16 electrically connect the ferromagnetic layers 12, 14 to a control circuit providing read and write currents through the ferromagnetic layers 12, 14.
  • the resistance across the spin-transfer torque MTJ memory unit 10 is determined by the relative orientation of the magnetization vectors or magnetization orientations of the ferromagnetic layers 12, 14.
  • the magnetization direction of the ferromagnetic reference layer 14 is pinned in a predetermined direction while the magnetization direction of the ferromagnetic free layer 12 is free to rotate under the influence of a spin torque. Pinning of the ferromagnetic reference layer 14 may be achieved through, e.g., the use of exchange bias with an antiferro magnetically ordered material such as PtMn, IrMn and others.
  • the reference magnetic layer 14 can be a single ferromagnetic layer, or may include multiple layers, for example, a pair of ferromagnetically coupled ferromagnetic layers, an antiferromagnetic pinning layer and a ferromagnetic pinned layer, a synthetic antiferromagnetic, or a synthetic antiferromagnetic with an antiferromagnetic layer.
  • FIG. 1 illustrates the spin-transfer torque MTJ memory unit 10 in the low resistance state where the magnetization orientation of the ferromagnetic free layer 12 is parallel and in the same direction of the magnetization orientation of the ferromagnetic reference layer 14. This is termed the low resistance state or "0"data state.
  • FIG. 2 illustrates the spin-transfer torque MTJ memory unit 10 in the high resistance state where the magnetization orientation of the ferromagnetic free layer 12 is anti-parallel and in the opposite direction of the magnetization orientation of the ferromagnetic reference layer 14. This is termed the high resistance state or 'T'data state.
  • the illustrative spin-transfer torque MTJ memory unit 10 may be used to construct a memory device that includes multiple MTJ memory units where a data bit is stored in spin-transfer torque MTJ memory unit by changing the relative magnetization state of the free magnetic layer 12 with respect to the pinned magnetic layer 14.
  • the stored data bit can be read out by measuring the resistance of the cell which changes with the magnetization direction of the free layer relative to the pinned magnetic layer.
  • the free layer exhibits thermal stability against random fluctuations so that the orientation of the free layer is changed only when it is controlled to make such a change.
  • This thermal stability can be achieved via the magnetic anisotropy using different methods, e.g., varying the bit size, shape, and crystalline anisotropy.
  • the anisotropy causes a soft and hard axis to form in thin magnetic layers.
  • the hard and soft axes are defined by the magnitude of the external energy, usually in the form of a magnetic field, needed to fully rotate (saturate) the direction of the magnetization in that direction, with the hard axis requiring a higher saturation magnetic field.
  • FIG. 3 is a schematic diagram of an illustrative spin-transfer torque MTJ memory unit MTJ.
  • the spin-transfer torque MTJ memory unit MTJ is electrically connected in series to a transistor such as, for example, a NMOS transistor.
  • the opposing side of the spin-transfer torque MTJ memory unit MTJ is electrically connected to a bit line BL.
  • the transistor is electrically coupled to a source line SL and a word line WL.
  • the MTJ can be modeled as a variable resistor in circuit schematic, as shown in FIG. 3.
  • FIG. 4 is a schematic circuit diagram of an illustrative spin-transfer torque MTJ memory apparatus to detect a voltage (or current) jump or drop during the read operation described herein.
  • the detection circuit can be described as a differentiator.
  • the magnetic tunnel junction data cell R MTJ (as described above) is electrically connected to a current source Is (or voltage source Vs) and a capacitor C is electrically between the magnetic tunnel junction data cell R MTJ and a sense amplifier A.
  • the sense amplifier A provides a voltage output V OUT - Any voltage change can be detected by the differentiator.
  • An illustrative detailed signal is shown in FIG. 5.
  • FIG. 5 illustrates application of a constant current source Is and a corresponding resulting voltage drop Vs.
  • the voltage output V OUT show three voltage spikes.
  • a clock CLOCK is utilized to remove the unwanted initial and final voltage spikes (at the start and end of the signal detection).
  • the resulting voltage output V OUTI indicates a voltage drop due to the magnetic tunnel junction data cell R MTJ switching resistance states (from the high resistance state to the low resistance state in this example).
  • the read operation indicates that the magnetic tunnel junction data cell R MTJ was in the high resistance state.
  • a write back operation can then be performed to return the magnetic tunnel junction data cell R MTJ to the original high resistance state.
  • FIG. 6 is a is a graph of a static R-V (resistance-voltage) curve of a spin-transfer torque MTJ memory unit where the resistance state switches from the high resistance state to the low resistance state.
  • the MTJ 10 When applying a positive voltage on the second electrode 16 in FIG. 1 or 2, the MTJ 10 enters the positive applied voltage region in FIG. 6 and switches from the high resistance state (FIG. 2) to the low resistance state (FIG. 1).
  • the MTJ 10 When applying a positive voltage on the first electrode 15 in FIG. 1 or 2, the MTJ 10 enters the negative applied voltage region in FIG. 6. The resistance of the MTJ switches from the low resistance state (FIG. 1) to the high resistance state (FIG. 2).
  • FIG. 7 is illustrative detailed signal timing graphs for read current detection at the high to low resistance state switching voltage when the spin-transfer torque MTJ memory unit is in the high resistance state.
  • FIG. 8 is illustrative detailed signal timing graphs for read current detection at the high to low resistance state switching voltage when the spin-transfer torque MTJ memory unit is in the low resistance state.
  • a read voltage Vs is applied across the magnetic tunnel junction data cell or spin-transfer torque MTJ memory unit.
  • the read voltage Vs is equal to or greater than the critical voltage that is sufficient to switch the data resistance state of the magnetic tunnel junction data cell (from the high to the low resistance state in this example).
  • the read voltage Vs is applied for a time duration of 0.1 to 50 nanoseconds, or from 0.1 to 25 nanoseconds, or from 01. to 10 nanoseconds.
  • the read operation is a high speed operation.
  • the resulting (or sensed) read current Is passing though the magnetic tunnel junction data cell is detected, as illustrated in FIG. 7 and FIG. 8.
  • FIG. 7 illustrates the magnetic tunnel junction data cell in the high resistance state Rl and switching to the low resistance state RO.
  • FIG. 8 illustrates the magnetic tunnel junction data cell in the low resistance state RO.
  • a sensed read current Is remains constant during the read operation.
  • the read voltage is equal to or greater than the critical voltage that is sufficient to switch the data resistance state of the magnetic tunnel junction data cell from the low to the high resistance state.
  • FIG. 9 is a is a graph of a static R-I (resistance-current) curve of a spin-transfer torque MTJ memory unit where the resistance state switches from the high resistance state to the low resistance state.
  • FIG. 10 is illustrative detailed signal timing graphs for read voltage detection at the high to low resistance state switching current when the spin-transfer torque MTJ memory unit is in the high resistance state.
  • FIG. 11 is illustrative detailed signal timing graphs for read voltage detection at the high to low resistance state switching current when the spin-transfer torque MTJ memory unit is in the low resistance state.
  • a read current Is is applied across the magnetic tunnel junction data cell or spin-transfer torque MTJ memory unit.
  • the read current Is is equal to or greater than the critical current that is sufficient to switch the data resistance state of the magnetic tunnel junction data cell (from the high to the low resistance state in this example).
  • the read current Is is applied for a time duration of 0.1 to 50 nanoseconds, or from 0.1 to 25 nanoseconds, or from 0.1 to 10 nanoseconds.
  • the read operation is a high speed operation.
  • the resulting (or sensed) read voltage Vs passing though the magnetic tunnel junction data cell is detected, as illustrated in FIG. 10 and FIG. 11.
  • FIG. 10 illustrates the magnetic tunnel junction data cell in the high resistance state Rl and switching to the low resistance state RO.
  • a sensed read voltage Vs drop occurs during the read operation.
  • the voltage change can be 100 mV or more.
  • FIG. 11 illustrates the magnetic tunnel junction data cell in the low resistance state RO.
  • a sensed read voltage Vs remains constant during the read operation.
  • the read current is equal to or greater than the critical current that is sufficient to switch the data resistance state of the magnetic tunnel junction data cell from the low to the high resistance state.
  • FIG. 12A is a flow diagram of an illustrative self-reference reading method sensing a read current when applying a voltage sufficient to switch the MTJ from a high resistance state to a low resistance state.
  • the method includes applying a read voltage across a magnetic tunnel junction data cell and forming a read current at block Ml.
  • the magnetic tunnel junction data cell having a first resistance state and the read voltage is sufficient to switch the magnetic tunnel junction data cell resistance (from the high to the low resistance state, in this example).
  • the read current is detected.
  • the method includes determining if the read current remains constant during the applying step at block C3.
  • the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read voltage was sufficient to switch the magnetic tunnel junction data cell to (the low resistance state, in this example) at block D2. If the read current changes (increases, in this example) the first resistance state is the opposing resistance state (the high resistance state, in this example) at block Dl and the high resistance state is written back to the magnetic tunnel junction data cell at block M3.
  • FIG. 12B is a flow diagram of an illustrative self-reference reading method sensing a read current when applying a voltage sufficient to switch the MTJ from a low resistance state to a high resistance state.
  • the method includes applying a read voltage across a magnetic tunnel junction data cell and forming a read current at block M4.
  • the magnetic tunnel junction data cell having a first resistance state and the read voltage is sufficient to switch the magnetic tunnel junction data cell resistance (from the low to the high resistance state, in this example).
  • the read current is detected. Then the method includes determining if the read current remains constant during the applying step at block C4.
  • the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read voltage was sufficient to switch the magnetic tunnel junction data cell to (the high resistance state, in this example) at block D4. If the read current changes (increases, in this example) the first resistance state is the opposing resistance state (the high resistance state, in this example) at block D3 and the low resistance state is written back to the magnetic tunnel junction data cell at block M6.
  • FIG. 13 is a flow diagram of an illustrative self-reference reading method sensing a read voltage. The method includes applying a read current across a magnetic tunnel junction data cell and forming a read voltage at block Mil.
  • the magnetic tunnel junction data cell having a first resistance state and the read current is sufficient to switch the magnetic tunnel junction data cell resistance (from the high to the low resistance state, in this example).
  • the read voltage is detected. Then the method includes determining if the read voltage remains constant during the applying step at block C13. If the read voltage remains constant during the applying step, then the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read current was sufficient to switch the magnetic tunnel junction data cell to (the low resistance state, in this example) at block D12. Otherwise the first resistance state is the opposing resistance state (the high resistance state, in this example) at block DIl and the high resistance state is written back to the magnetic tunnel junction data cell at block M13.
  • the read current is sufficient to switch the magnetic tunnel junction data cell resistance from the low to the high resistance state.
  • the first resistance state of the magnetic tunnel junction data cell is the low resistance state. If the read voltage does not remain constant or changes (increases in this example) the first resistance state is the opposing resistance state (the high resistance state, in this example) and the high resistance state is written back to the magnetic tunnel junction data cell at block.
  • embodiments of the SPIN-TRANSFER TORQUE MEMORY SELF-REFERENCE READ METHOD are disclosed. The implementations described above and other implementations are within the scope of the following claims. One skilled in the art will appreciate that the present disclosure can be practiced with embodiments other than those disclosed. The disclosed embodiments are presented for purposes of illustration and not limitation, and the present invention is limited only by the claims that follow.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Hall/Mr Elements (AREA)
  • Mram Or Spin Memory Techniques (AREA)
PCT/US2010/024928 2009-02-20 2010-02-22 Spin-transfer torque memory self-reference read method Ceased WO2010096768A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2011551276A JP2012518867A (ja) 2009-02-20 2010-02-22 スピン転移トルクメモリの自己参照読出方法
EP10707396.7A EP2399259B1 (en) 2009-02-20 2010-02-22 Spin-transfer torque memory self-reference read method
CN201080008973.XA CN102326204B (zh) 2009-02-20 2010-02-22 自旋转移转矩存储器自基准读取方法
KR1020117021976A KR101405863B1 (ko) 2009-02-20 2010-02-22 스핀-전달 토크 메모리 자가-참조 판독 방법

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/390,006 2009-02-20
US12/390,006 US7876604B2 (en) 2008-11-05 2009-02-20 Stram with self-reference read scheme

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WO2010096768A1 true WO2010096768A1 (en) 2010-08-26

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US (2) US7876604B2 (enExample)
EP (1) EP2399259B1 (enExample)
JP (1) JP2012518867A (enExample)
KR (1) KR101405863B1 (enExample)
CN (1) CN102326204B (enExample)
WO (1) WO2010096768A1 (enExample)

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US8194444B2 (en) 2012-06-05
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US7876604B2 (en) 2011-01-25
JP2012518867A (ja) 2012-08-16
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US20100110784A1 (en) 2010-05-06
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US20110085373A1 (en) 2011-04-14

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