JP2003228993A5 - - Google Patents

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Publication number
JP2003228993A5
JP2003228993A5 JP2003013288A JP2003013288A JP2003228993A5 JP 2003228993 A5 JP2003228993 A5 JP 2003228993A5 JP 2003013288 A JP2003013288 A JP 2003013288A JP 2003013288 A JP2003013288 A JP 2003013288A JP 2003228993 A5 JP2003228993 A5 JP 2003228993A5
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JP
Japan
Prior art keywords
memory cell
current flowing
bias voltage
mtj
memory
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JP2003013288A
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English (en)
Japanese (ja)
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JP2003228993A (ja
JP3958692B2 (ja
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Priority claimed from US10/055,299 external-priority patent/US6650562B2/en
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Publication of JP2003228993A publication Critical patent/JP2003228993A/ja
Publication of JP2003228993A5 publication Critical patent/JP2003228993A5/ja
Application granted granted Critical
Publication of JP3958692B2 publication Critical patent/JP3958692B2/ja
Anticipated expiration legal-status Critical
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JP2003013288A 2002-01-23 2003-01-22 磁気トンネル接合メモリデバイスにおけるメモリセルの論理状態を判定するためのシステム及び方法 Expired - Fee Related JP3958692B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/055299 2002-01-23
US10/055,299 US6650562B2 (en) 2002-01-23 2002-01-23 System and method for determining the logic state of a memory cell in a magnetic tunnel junction memory device

Publications (3)

Publication Number Publication Date
JP2003228993A JP2003228993A (ja) 2003-08-15
JP2003228993A5 true JP2003228993A5 (enExample) 2005-05-19
JP3958692B2 JP3958692B2 (ja) 2007-08-15

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ID=21996962

Family Applications (1)

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JP2003013288A Expired - Fee Related JP3958692B2 (ja) 2002-01-23 2003-01-22 磁気トンネル接合メモリデバイスにおけるメモリセルの論理状態を判定するためのシステム及び方法

Country Status (3)

Country Link
US (2) US6650562B2 (enExample)
JP (1) JP3958692B2 (enExample)
DE (1) DE10301305A1 (enExample)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6597600B2 (en) * 2001-08-27 2003-07-22 Micron Technology, Inc. Offset compensated sensing for magnetic random access memory
US6650562B2 (en) * 2002-01-23 2003-11-18 Hewlett-Packard Development Company, L.P. System and method for determining the logic state of a memory cell in a magnetic tunnel junction memory device
US6707084B2 (en) * 2002-02-06 2004-03-16 Micron Technology, Inc. Antiferromagnetically stabilized pseudo spin valve for memory applications
US7116576B2 (en) * 2003-07-07 2006-10-03 Hewlett-Packard Development Company, L.P. Sensing the state of a storage cell including a magnetic element
US20060004652A1 (en) * 2004-06-22 2006-01-05 Greig Russell H Jr Loan option algorithm adaptable to fully variable option loans and fixed option loans
KR100669363B1 (ko) * 2004-10-26 2007-01-16 삼성전자주식회사 메모리 장치의 읽기 방법
TWI337355B (en) * 2007-06-29 2011-02-11 Ind Tech Res Inst Simulating circuit for simulating a toggle magnetic tunneling junction element
US7602649B2 (en) * 2007-09-04 2009-10-13 Qimonda Ag Method of operating an integrated circuit for reading the logical state of a memory cell
US8659852B2 (en) * 2008-04-21 2014-02-25 Seagate Technology Llc Write-once magentic junction memory array
US7852663B2 (en) 2008-05-23 2010-12-14 Seagate Technology Llc Nonvolatile programmable logic gates and adders
US7855911B2 (en) 2008-05-23 2010-12-21 Seagate Technology Llc Reconfigurable magnetic logic device using spin torque
US8116123B2 (en) 2008-06-27 2012-02-14 Seagate Technology Llc Spin-transfer torque memory non-destructive self-reference read method
US7881098B2 (en) 2008-08-26 2011-02-01 Seagate Technology Llc Memory with separate read and write paths
US7985994B2 (en) * 2008-09-29 2011-07-26 Seagate Technology Llc Flux-closed STRAM with electronically reflective insulative spacer
US8169810B2 (en) 2008-10-08 2012-05-01 Seagate Technology Llc Magnetic memory with asymmetric energy barrier
US8039913B2 (en) 2008-10-09 2011-10-18 Seagate Technology Llc Magnetic stack with laminated layer
US8089132B2 (en) 2008-10-09 2012-01-03 Seagate Technology Llc Magnetic memory with phonon glass electron crystal material
US8045366B2 (en) 2008-11-05 2011-10-25 Seagate Technology Llc STRAM with composite free magnetic element
US8043732B2 (en) 2008-11-11 2011-10-25 Seagate Technology Llc Memory cell with radial barrier
US7826181B2 (en) 2008-11-12 2010-11-02 Seagate Technology Llc Magnetic memory with porous non-conductive current confinement layer
US8289756B2 (en) 2008-11-25 2012-10-16 Seagate Technology Llc Non volatile memory including stabilizing structures
US7826259B2 (en) 2009-01-29 2010-11-02 Seagate Technology Llc Staggered STRAM cell
US9728240B2 (en) * 2009-04-08 2017-08-08 Avalanche Technology, Inc. Pulse programming techniques for voltage-controlled magnetoresistive tunnel junction (MTJ)
JP2011008861A (ja) * 2009-06-25 2011-01-13 Sony Corp メモリ
US7999338B2 (en) 2009-07-13 2011-08-16 Seagate Technology Llc Magnetic stack having reference layers with orthogonal magnetization orientation directions
WO2012029007A1 (en) * 2010-08-31 2012-03-08 International Business Machines Corporation Cell-state determination in phase-change memory
US9111613B2 (en) * 2012-07-12 2015-08-18 The Regents Of The University Of Michigan Adaptive reading of a resistive memory
US9153307B2 (en) * 2013-09-09 2015-10-06 Qualcomm Incorporated System and method to provide a reference cell
US8891326B1 (en) * 2013-09-11 2014-11-18 Avalanche Technology, Inc. Method of sensing data in magnetic random access memory with overlap of high and low resistance distributions
US9721639B1 (en) 2016-06-21 2017-08-01 Micron Technology, Inc. Memory cell imprint avoidance

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6169689B1 (en) * 1999-12-08 2001-01-02 Motorola, Inc. MTJ stacked cell memory sensing method and apparatus
US6185143B1 (en) * 2000-02-04 2001-02-06 Hewlett-Packard Company Magnetic random access memory (MRAM) device including differential sense amplifiers
US6426907B1 (en) * 2001-01-24 2002-07-30 Infineon Technologies North America Corp. Reference for MRAM cell
US6650562B2 (en) * 2002-01-23 2003-11-18 Hewlett-Packard Development Company, L.P. System and method for determining the logic state of a memory cell in a magnetic tunnel junction memory device
US6639839B1 (en) * 2002-05-21 2003-10-28 Macronix International Co., Ltd. Sensing method for EEPROM refresh scheme
US6590804B1 (en) * 2002-07-16 2003-07-08 Hewlett-Packard Development Company, L.P. Adjustable current mode differential amplifier
US6674679B1 (en) * 2002-10-01 2004-01-06 Hewlett-Packard Development Company, L.P. Adjustable current mode differential amplifier for multiple bias point sensing of MRAM having equi-potential isolation
US6954373B2 (en) * 2003-06-27 2005-10-11 Hewlett-Packard Development Company, L.P. Apparatus and method for determining the logic state of a magnetic tunnel junction memory device

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