JP2012256737A - 半導体装置及び半導体装置の製造方法 - Google Patents

半導体装置及び半導体装置の製造方法 Download PDF

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Publication number
JP2012256737A
JP2012256737A JP2011129192A JP2011129192A JP2012256737A JP 2012256737 A JP2012256737 A JP 2012256737A JP 2011129192 A JP2011129192 A JP 2011129192A JP 2011129192 A JP2011129192 A JP 2011129192A JP 2012256737 A JP2012256737 A JP 2012256737A
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Prior art keywords
semiconductor device
alignment mark
alignment
semiconductor
semiconductor element
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JP2011129192A
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Japanese (ja)
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JP2012256737A5 (https=
Inventor
Satoru Wakiyama
悟 脇山
Masaki Minami
正樹 南
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Sony Corp
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Sony Corp
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Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2011129192A priority Critical patent/JP2012256737A/ja
Priority to TW101118058A priority patent/TWI497678B/zh
Priority to CN201210177169.5A priority patent/CN102820284B/zh
Priority to KR1020120058005A priority patent/KR20120137238A/ko
Priority to US13/487,163 priority patent/US9548290B2/en
Publication of JP2012256737A publication Critical patent/JP2012256737A/ja
Publication of JP2012256737A5 publication Critical patent/JP2012256737A5/ja
Priority to KR1020190054795A priority patent/KR102071823B1/ko
Ceased legal-status Critical Current

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    • H10W90/792Package configurations characterised by the relative positions of pads or connectors relative to package parts of direct-bonded pads between multiple chips

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
JP2011129192A 2011-06-09 2011-06-09 半導体装置及び半導体装置の製造方法 Ceased JP2012256737A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2011129192A JP2012256737A (ja) 2011-06-09 2011-06-09 半導体装置及び半導体装置の製造方法
TW101118058A TWI497678B (zh) 2011-06-09 2012-05-21 半導體裝置及其製造方法
CN201210177169.5A CN102820284B (zh) 2011-06-09 2012-05-31 半导体器件和半导体器件的制造方法
KR1020120058005A KR20120137238A (ko) 2011-06-09 2012-05-31 반도체 장치 및 반도체 장치의 제조 방법
US13/487,163 US9548290B2 (en) 2011-06-09 2012-06-02 Semiconductor device having magnetic alignment marks and underfill resin layers
KR1020190054795A KR102071823B1 (ko) 2011-06-09 2019-05-10 반도체 장치 및 반도체 장치의 제조 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011129192A JP2012256737A (ja) 2011-06-09 2011-06-09 半導体装置及び半導体装置の製造方法

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220106013A (ko) * 2021-01-21 2022-07-28 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 재분배층과의 하이브리드 마이크로 범프의 통합
WO2024247248A1 (ja) * 2023-06-02 2024-12-05 東北マイクロテック株式会社 微小素子、整列システム及び実装方法

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9978656B2 (en) * 2011-11-22 2018-05-22 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming fine-pitch copper bump structures
US20130199831A1 (en) * 2012-02-06 2013-08-08 Christopher Morris Electromagnetic field assisted self-assembly with formation of electrical contacts
US9343419B2 (en) * 2012-12-14 2016-05-17 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structures for semiconductor package
CN110071089A (zh) * 2012-12-14 2019-07-30 台湾积体电路制造股份有限公司 用于半导体封装件的凸块结构及其制造方法
US9773724B2 (en) * 2013-01-29 2017-09-26 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices, methods of manufacture thereof, and semiconductor device packages
KR102253995B1 (ko) 2013-03-12 2021-05-18 마이크로닉 아베 기계적으로 생성된 정렬 표식 방법 및 정렬 시스템
WO2014140047A2 (en) 2013-03-12 2014-09-18 Micronic Mydata AB Method and device for writing photomasks with reduced mura errors
JP2014216377A (ja) * 2013-04-23 2014-11-17 イビデン株式会社 電子部品とその製造方法及び多層プリント配線板の製造方法
JP6234074B2 (ja) * 2013-06-07 2017-11-22 オリンパス株式会社 半導体装置、固体撮像装置、および撮像装置
US9142475B2 (en) 2013-08-13 2015-09-22 Intel Corporation Magnetic contacts
KR102160786B1 (ko) * 2013-10-29 2020-09-28 삼성전자주식회사 반도체 패키지
US9263405B2 (en) * 2013-12-05 2016-02-16 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device
EP2889900B1 (en) 2013-12-19 2019-11-06 IMEC vzw Method for aligning micro-electronic components using an alignment liquid and electrostatic alignment as well as corresponding assembly of aligned micro-electronic components
WO2015157124A1 (en) 2014-04-07 2015-10-15 Flir Systems, Inc. Method and systems for coupling semiconductor substrates
WO2016048347A1 (en) 2014-09-26 2016-03-31 Intel Corporation Flexible packaging architecture
JP6470320B2 (ja) * 2015-02-04 2019-02-13 オリンパス株式会社 半導体装置
US10446522B2 (en) * 2015-04-16 2019-10-15 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of forming multiple conductive features in semiconductor devices in a same formation process
US9971970B1 (en) * 2015-04-27 2018-05-15 Rigetti & Co, Inc. Microwave integrated quantum circuits with VIAS and methods for making the same
CN104778904B (zh) * 2015-05-08 2017-11-24 合肥京东方光电科技有限公司 一种显示面板母板及其制备方法
KR20160142943A (ko) * 2015-06-03 2016-12-14 한국전자통신연구원 반도체 패키지 및 반도체 패키지의 제조 방법
US9633882B2 (en) * 2015-09-29 2017-04-25 Globalfoundries Singapore Pte. Ltd. Integrated circuits with alignment marks and methods of producing the same
US10636757B2 (en) * 2017-08-29 2020-04-28 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit component package and method of fabricating the same
US11417569B2 (en) * 2017-09-18 2022-08-16 Taiwan Semiconductor Manufacturing Company, Ltd. Package structure having integrated circuit component with conductive terminals of different dimensions
US10217718B1 (en) * 2017-10-13 2019-02-26 Denselight Semiconductors Pte. Ltd. Method for wafer-level semiconductor die attachment
US10276539B1 (en) * 2017-10-30 2019-04-30 Micron Technology, Inc. Method for 3D ink jet TCB interconnect control
DE102018103431A1 (de) * 2018-02-15 2019-08-22 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung einer Verbindung zwischen Bauteilen und Bauelement aus Bauteilen
US11009798B2 (en) 2018-09-05 2021-05-18 Micron Technology, Inc. Wafer alignment markers, systems, and related methods
US11251096B2 (en) 2018-09-05 2022-02-15 Micron Technology, Inc. Wafer registration and overlay measurement systems and related methods
EP3637963B1 (en) * 2018-10-12 2024-02-07 AT&S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier structures connected by cooperating magnet structures
CN111524873B (zh) 2019-02-01 2022-05-13 台达电子企业管理(上海)有限公司 嵌入式封装模块及其封装方法
US11600590B2 (en) * 2019-03-22 2023-03-07 Advanced Semiconductor Engineering, Inc. Semiconductor device and semiconductor package
FR3105877A1 (fr) * 2019-12-30 2021-07-02 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procédé de connexion autoalignée d’une structure à un support, dispositif obtenu à partir d’un tel procédé, et les structure et support mis en œuvre par un tel procédé
JP2021129084A (ja) * 2020-02-17 2021-09-02 キオクシア株式会社 半導体装置およびその製造方法
JP2021150626A (ja) * 2020-03-24 2021-09-27 キオクシア株式会社 メモリデバイス及びメモリデバイスの製造方法
JP7721503B2 (ja) * 2020-03-26 2025-08-12 ローム株式会社 半導体装置
US11721637B2 (en) * 2020-05-27 2023-08-08 Taiwan Semiconductor Manufacturing Company, Ltd. Patterning a transparent wafer to form an alignment mark in the transparent wafer
KR102877021B1 (ko) * 2020-09-03 2025-10-24 삼성전자주식회사 반도체 패키지
KR102856411B1 (ko) * 2020-09-15 2025-09-05 에스케이하이닉스 주식회사 이미지 센싱 장치
CN113013124B (zh) * 2021-02-24 2025-09-09 日月光半导体制造股份有限公司 半导体封装装置及其制造方法
CN113594119B (zh) * 2021-06-25 2024-05-14 苏州汉天下电子有限公司 半导体封装及其制造方法
US12381158B2 (en) 2022-03-18 2025-08-05 Taiwan Semiconductor Manufacturing Co., Ltd. Wafer bonding method and bonded device structure
US20230299041A1 (en) * 2022-03-18 2023-09-21 Taiwan Semiconductor Manufacturing Co., Ltd. Wafer Bonding Method and Bonded Device Structure

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06112270A (ja) * 1992-09-30 1994-04-22 Kyocera Corp 半導体素子の実装方法
JPH0918197A (ja) * 1995-06-30 1997-01-17 Nec Corp プリント板ユニット
JPH10112477A (ja) * 1996-10-04 1998-04-28 Fuji Xerox Co Ltd 半導体装置の製造方法及び半導体装置
JP2005268623A (ja) * 2004-03-19 2005-09-29 Yamaha Corp 半導体素子及び回路基板並びにそれらを用いた実装構造
JP2007273628A (ja) * 2006-03-30 2007-10-18 Fujitsu Ltd 半導体装置の製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6333206B1 (en) * 1996-12-24 2001-12-25 Nitto Denko Corporation Process for the production of semiconductor device
CN1194595C (zh) * 2001-12-28 2005-03-23 全懋精密科技股份有限公司 一种高密度多层电路板的结构及其制作方法
US6750133B2 (en) * 2002-10-24 2004-06-15 Intel Corporation Selective ball-limiting metallurgy etching processes for fabrication of electroplated tin bumps
JP2005260128A (ja) * 2004-03-15 2005-09-22 Yamaha Corp 半導体素子及びそれを備えたウエハレベル・チップサイズ・パッケージ
US7830011B2 (en) * 2004-03-15 2010-11-09 Yamaha Corporation Semiconductor element and wafer level chip size package therefor
KR100713579B1 (ko) * 2004-05-31 2007-05-02 강준모 반도체소자 얼라인 방법 및 그에 의해 형성된 반도체 구조물
FR2873675B1 (fr) 2004-07-28 2006-09-22 Commissariat Energie Atomique Dispositif microtechnologique comportant des structures assemblees magnetiquement et procede d' assemblage
JP2006054275A (ja) * 2004-08-11 2006-02-23 Sony Corp 半導体装置の製造方法および半導体製造装置
EP1962569A1 (en) * 2005-12-16 2008-08-27 Ibiden Co., Ltd. Multilayer printed wiring plate, and method for fabricating the same
JP2009188720A (ja) * 2008-02-06 2009-08-20 Panasonic Corp 固体撮像装置およびその製造方法
JP5568969B2 (ja) * 2009-11-30 2014-08-13 ソニー株式会社 固体撮像装置とその製造方法、及び電子機器
US8486726B2 (en) * 2009-12-02 2013-07-16 Veeco Instruments Inc. Method for improving performance of a substrate carrier

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06112270A (ja) * 1992-09-30 1994-04-22 Kyocera Corp 半導体素子の実装方法
JPH0918197A (ja) * 1995-06-30 1997-01-17 Nec Corp プリント板ユニット
JPH10112477A (ja) * 1996-10-04 1998-04-28 Fuji Xerox Co Ltd 半導体装置の製造方法及び半導体装置
JP2005268623A (ja) * 2004-03-19 2005-09-29 Yamaha Corp 半導体素子及び回路基板並びにそれらを用いた実装構造
JP2007273628A (ja) * 2006-03-30 2007-10-18 Fujitsu Ltd 半導体装置の製造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220106013A (ko) * 2021-01-21 2022-07-28 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 재분배층과의 하이브리드 마이크로 범프의 통합
KR102580566B1 (ko) 2021-01-21 2023-09-19 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 재분배층과의 하이브리드 마이크로 범프의 통합
US11855028B2 (en) 2021-01-21 2023-12-26 Taiwan Semiconductor Manufacturing Hybrid micro-bump integration with redistribution layer
US12412857B2 (en) 2021-01-21 2025-09-09 Taiwan Semiconductor Manufacturing Co., Ltd. Hybrid micro-bump integration with redistribution layer
WO2024247248A1 (ja) * 2023-06-02 2024-12-05 東北マイクロテック株式会社 微小素子、整列システム及び実装方法
US12463078B2 (en) 2023-06-02 2025-11-04 Tohoku-Microtec Co., Ltd. Micro-element, alignment system and assembling method

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US9548290B2 (en) 2017-01-17
CN102820284A (zh) 2012-12-12
KR20190054039A (ko) 2019-05-21
TWI497678B (zh) 2015-08-21
KR102071823B1 (ko) 2020-01-30
US20120313236A1 (en) 2012-12-13
CN102820284B (zh) 2017-07-14
TW201250975A (en) 2012-12-16

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