JP2012156263A - 窒化ガリウム系半導体装置および半導体装置の製造方法 - Google Patents
窒化ガリウム系半導体装置および半導体装置の製造方法 Download PDFInfo
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- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 description 1
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- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 description 1
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Abstract
【解決手段】窒化ガリウム系半導体からなる第1の半導体層を形成する第1半導体層形成工程と、第1の半導体層の一部を、臭素系ガスを用いて、マイクロ波プラズマプロセスでドライエッチングして、リセス部を形成するリセス部形成工程と、を備え、窒化ガリウム系半導体装置を製造する半導体装置の製造方法を提供する。
【選択図】図1
Description
Claims (16)
- 第1の半導体層と、
前記第1の半導体層の一部が除去されたリセス部と、
前記第1の半導体層の下に形成され、窒化ガリウム系半導体からなる第2の半導体層と、を備え、
前記リセス部における、前記第2の半導体層のリセス面に存在するハロゲンが3atom%以下である
窒化ガリウム系半導体装置。 - 前記第2の半導体層の、前記リセス面の算術平均粗さRaが1nm以下、前記リセス面の断面曲線の最大山高さと最大谷深さの差P−Vが15nm以下、および、前記リセス面の二乗平均粗さRMSが1.4nm以下のいずれかである請求項1に記載の窒化ガリウム系半導体装置。
- 前記第2の半導体層の、前記リセス面の算術平均粗さRaが0.5nm以下、前記リセス面の断面曲線の最大山高さと最大谷深さの差P−Vが10nm以下、および、前記リセス面の二乗平均粗さRMSが1.1nm以下のいずれかである請求項2に記載の窒化ガリウム系半導体装置。
- 前記第2の半導体層の前記リセス面に接して、絶縁層が形成された請求項1から3のいずれか一項に記載の窒化ガリウム系半導体装置。
- 前記第2の半導体層がチャネル層であり、前記絶縁層がゲート絶縁膜である請求項4に記載の窒化ガリウム系半導体装置。
- 窒化ガリウム系半導体からなる第1の半導体層を形成する第1半導体層形成工程と、
前記第1の半導体層の一部を、臭素系ガスを用いて、マイクロ波プラズマプロセスでドライエッチングして、リセス部を形成するリセス部形成工程と、を備える
窒化ガリウム系半導体装置を製造する半導体装置の製造方法。 - 前記マイクロ波プラズマプロセスが、プラズマを用いた処理を行う処理室と、マイクロ波を導入する誘電体と、前記誘電体と前記第1の半導体層との間にエッチング用ガスを導入するシャワーヘッドとを備えたマイクロ波プラズマ装置で行われる、請求項6に記載の半導体装置の製造方法。
- 前記第1の半導体層に接して、前記第1の半導体層に含まれる不純物の固溶度が、前記第1の半導体層より高い、第1の犠牲層を形成する第1犠牲層形成工程と、
前記第1の犠牲層および前記第1の半導体層をアニールする第1アニール工程と、
前記第1の犠牲層をウェットプロセスで除去する第1除去工程と、を更に備え、
前記第1の犠牲層が除去された領域を、前記リセス部形成工程において、前記マイクロ波プラズマプロセスでエッチングする請求項6または7に記載の半導体装置の製造方法。 - 前記第1の犠牲層が500℃以下で形成される請求項8に記載の半導体装置の製造方法。
- 前記第1の犠牲層が、SiOX(0<X≦2)、AlOX(0<X≦1.5)、SiNX(0<X≦4/3)、GaOX(0<X≦1.5)、HfOX(0<X≦2)、GdOX(0<X≦1.5)、MgOX(0<X≦1)、ScOX(0<X≦1.5)、ZrOX(0<X≦2)、TaOX(0≦X≦2.5)、TiOX(0≦X≦2)、NiOX(0≦X≦1.5)、およびVのいずれか一つ以上からなる請求項8または9に記載の半導体装置の製造方法。
- 前記第1の半導体層の下に第2の半導体層を形成する第2半導体層形成工程を更に備え、
前記リセス部形成工程で形成される前記リセス部が、前記第1の半導体層を深さ方向に貫通し、前記第2の半導体層が前記リセス部で部分的に露出し、
前記リセス部における、前記第2の半導体層の露出面に接して、前記第2の半導体層に含まれる不純物の固溶度が、前記第2の半導体層より高い第2の犠牲層を形成する第2犠牲層形成工程と、
前記第2の犠牲層および前記第2の半導体層をアニールする第2アニール工程と、
前記第2の犠牲層をウェットプロセスで除去する第2除去工程と、を更に備える請求項6から10のいずれか一項に記載の半導体装置の製造方法。 - 前記第2の半導体層が、窒化ガリウム系半導体からなる請求項11に記載の半導体装置の製造方法。
- 前記第1の半導体層に電気的に接続された、ソース電極、およびドレイン電極を形成する電極層形成工程を更に備える請求項12に記載の半導体装置の製造方法。
- 前記第2の犠牲層が500℃以下で形成される請求項12または13に記載の半導体装置の製造方法。
- 前記第2の犠牲層が、SiOX(0<X≦2)、AlOX(0<X≦1.5)、SiNX(0<X≦4/3)、GaOX(0<X≦1.5)、HfOX(0<X≦2)、GdOX(0<X≦1.5)、MgOX(0<X≦1)、ScOX(0<X≦1.5)、ZrOX(0<X≦2)、TaOX(0≦X≦2.5)、TiOX(0≦X≦2)、NiOX(0≦X≦1.5)、およびVのいずれか一つ以上からなる請求項12から14のいずれか一項に記載の半導体装置の製造方法。
- 前記第2の犠牲層を形成する工程において、CVD法、スパッタリング、又は蒸着によりにより、前記第2の犠牲層を成膜する請求項11から15のいずれか一項に記載の半導体装置の製造方法。
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KR101455283B1 (ko) * | 2013-08-09 | 2014-10-31 | 홍익대학교 산학협력단 | 패시베이션막 형성방법 및 이를 포함하는 AlGaN/GaN HFET의 제조방법 |
JP2018113358A (ja) * | 2017-01-12 | 2018-07-19 | 三菱電機株式会社 | 高電子移動度トランジスタの製造方法、高電子移動度トランジスタ |
CN110223914A (zh) * | 2018-03-02 | 2019-09-10 | 赛奥科思有限公司 | GaN材料和半导体装置的制造方法 |
JP2020017577A (ja) * | 2018-07-23 | 2020-01-30 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP2020035928A (ja) * | 2018-08-30 | 2020-03-05 | 富士電機株式会社 | 窒化ガリウム系半導体装置および窒化ガリウム系半導体装置の製造方法 |
WO2021095410A1 (ja) * | 2019-11-13 | 2021-05-20 | 株式会社サイオクス | 半導体装置、および、構造体の製造方法 |
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