JP2012075130A5 - - Google Patents

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Publication number
JP2012075130A5
JP2012075130A5 JP2011237247A JP2011237247A JP2012075130A5 JP 2012075130 A5 JP2012075130 A5 JP 2012075130A5 JP 2011237247 A JP2011237247 A JP 2011237247A JP 2011237247 A JP2011237247 A JP 2011237247A JP 2012075130 A5 JP2012075130 A5 JP 2012075130A5
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JP
Japan
Prior art keywords
signal
circuit
modulator
time response
digital signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2011237247A
Other languages
English (en)
Japanese (ja)
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JP2012075130A (ja
Filing date
Publication date
Priority claimed from US09/517,766 external-priority patent/US6292122B1/en
Application filed filed Critical
Publication of JP2012075130A publication Critical patent/JP2012075130A/ja
Publication of JP2012075130A5 publication Critical patent/JP2012075130A5/ja
Withdrawn legal-status Critical Current

Links

JP2011237247A 2000-03-04 2011-10-28 調整可能な時間応答を有するディジタル・アナログ変換インタフェース回路 Withdrawn JP2012075130A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/517,766 2000-03-04
US09/517,766 US6292122B1 (en) 2000-03-04 2000-03-04 Digital-to-analog interface circuit having adjustable time response

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2001566252A Division JP2003526979A (ja) 2000-03-04 2001-03-02 調整可能な時間応答を有するディジタル・アナログ変換インタフェース回路

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013186816A Division JP5752764B2 (ja) 2000-03-04 2013-09-09 調整可能な時間応答を有するディジタル・アナログ変換インタフェース回路

Publications (2)

Publication Number Publication Date
JP2012075130A JP2012075130A (ja) 2012-04-12
JP2012075130A5 true JP2012075130A5 (enExample) 2012-07-26

Family

ID=24061141

Family Applications (4)

Application Number Title Priority Date Filing Date
JP2001566252A Pending JP2003526979A (ja) 2000-03-04 2001-03-02 調整可能な時間応答を有するディジタル・アナログ変換インタフェース回路
JP2011237247A Withdrawn JP2012075130A (ja) 2000-03-04 2011-10-28 調整可能な時間応答を有するディジタル・アナログ変換インタフェース回路
JP2013186816A Expired - Fee Related JP5752764B2 (ja) 2000-03-04 2013-09-09 調整可能な時間応答を有するディジタル・アナログ変換インタフェース回路
JP2015048790A Pending JP2015146604A (ja) 2000-03-04 2015-03-11 調整可能な時間応答を有するディジタル・アナログ変換インタフェース回路

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP2001566252A Pending JP2003526979A (ja) 2000-03-04 2001-03-02 調整可能な時間応答を有するディジタル・アナログ変換インタフェース回路

Family Applications After (2)

Application Number Title Priority Date Filing Date
JP2013186816A Expired - Fee Related JP5752764B2 (ja) 2000-03-04 2013-09-09 調整可能な時間応答を有するディジタル・アナログ変換インタフェース回路
JP2015048790A Pending JP2015146604A (ja) 2000-03-04 2015-03-11 調整可能な時間応答を有するディジタル・アナログ変換インタフェース回路

Country Status (9)

Country Link
US (1) US6292122B1 (enExample)
EP (1) EP1264394B1 (enExample)
JP (4) JP2003526979A (enExample)
KR (1) KR100716378B1 (enExample)
CN (1) CN1423859A (enExample)
AU (1) AU2001240015A1 (enExample)
CA (1) CA2401893C (enExample)
HK (1) HK1054631A1 (enExample)
WO (1) WO2001067591A2 (enExample)

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US6369735B1 (en) * 2000-10-02 2002-04-09 Lsi Logic Corporation Digital-to-analog converter with high dynamic range
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KR100493031B1 (ko) * 2002-11-08 2005-06-07 삼성전자주식회사 액정 표시 장치를 구동하는 반응 시간 가속 장치 및 그 방법
US6940189B2 (en) 2003-07-31 2005-09-06 Andrew Roman Gizara System and method for integrating a digital core with a switch mode power supply
US6885322B2 (en) * 2003-08-05 2005-04-26 Motorola, Inc. Apparatus and method for transmitter phase shift compensation
US7203511B2 (en) * 2004-01-20 2007-04-10 Broadcom Corporation Control of transmit power of a radio frequency integrated circuit
KR100638592B1 (ko) * 2004-12-11 2006-10-26 한국전자통신연구원 Ｏｆｄｍ 시스템의 단말의 수신기용 ｄｃ 오프셋 제거 장치및 그 방법
JP4116005B2 (ja) * 2005-02-18 2008-07-09 シャープ株式会社 デルタシグマ変調器およびそれを用いたスイッチング増幅回路
US20060217082A1 (en) * 2005-03-22 2006-09-28 Georg Fischer Shaping noise in power amplifiers of duplex communication systems
US7889019B2 (en) * 2006-10-13 2011-02-15 Andrew Roman Gizara Pulse width modulation sequence generating a near critical damped step response
WO2008048865A2 (en) * 2006-10-13 2008-04-24 Ipower Holdings Llc Pulse width modulation sequence generating a near critical damped step response
US7719336B2 (en) * 2006-10-31 2010-05-18 Andrew Roman Gizara Pulse width modulation sequence maintaining maximally flat voltage during current transients
WO2009040897A1 (ja) * 2007-09-26 2009-04-02 Fujitsu Limited 送受信増幅器および遅延偏差補償方法
DE102008026019B4 (de) * 2008-05-30 2010-04-08 Micronas Gmbh Digital-Analog-Wandler-Schaltungsanordnung
JP6308796B2 (ja) * 2014-02-14 2018-04-11 セイコーＮｐｃ株式会社 ディジタル温度補償発振器
US20150341158A1 (en) * 2014-05-23 2015-11-26 Mediatek Inc. Loop gain calibration apparatus for controlling loop gain of timing recovery loop and related loop gain calibration method
JP6460458B2 (ja) * 2014-12-05 2019-01-30 セイコーＮｐｃ株式会社 デジタル温度補償型発振器
JP6425581B2 (ja) * 2015-02-26 2018-11-21 セイコーＮｐｃ株式会社 ディジタル温度補償発振器
EP3382969A1 (en) * 2017-03-31 2018-10-03 Intel IP Corporation Modulation circuit and apparatus, demodulation circuit and apparatus, transmitter, receiver, system, radio frequency circuit, mobile terminal, methods and computer programs for modulating and demodulating
KR102553262B1 (ko) * 2017-11-17 2023-07-07 삼성전자 주식회사 기준 전압 생성기 및 이를 포함하는 메모리 장치
CN111697952B (zh) * 2020-06-22 2023-11-10 四川新先达测控技术有限公司 一种基于数字pzc系统调节脉冲宽度的方法及系统
CN115514363B (zh) * 2022-11-09 2023-01-20 南方电网数字电网研究院有限公司 低功耗模数转换电路

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DE2317851B2 (de) * 1973-04-10 1975-04-24 Grundig E.M.V. Elektro-Mechanische Versuchsanstalt Max Grundig, 8510 Fuerth Digital-Analog-Wandler
JPH0758912B2 (ja) * 1986-12-29 1995-06-21 株式会社アドバンテスト 高速セトリングｄ／ａ変換器
JPS63274214A (ja) * 1987-05-01 1988-11-11 Kokusai Electric Co Ltd ディジタル・アナログ変換回路
JPH01186019A (ja) * 1988-01-20 1989-07-25 Victor Co Of Japan Ltd Ｄ／ａ変換装置
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US6060950A (en) * 1998-06-05 2000-05-09 Nokia Mobile Phones Limited Control of a variable gain amplifier with a delta sigma modulator D/A converter
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