HK1054631A1 - 具有可調整的時間響應的數字-模擬接口電路 - Google Patents

具有可調整的時間響應的數字-模擬接口電路 Download PDF

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Publication number
HK1054631A1
HK1054631A1 HK03106818.4A HK03106818A HK1054631A1 HK 1054631 A1 HK1054631 A1 HK 1054631A1 HK 03106818 A HK03106818 A HK 03106818A HK 1054631 A1 HK1054631 A1 HK 1054631A1
Authority
HK
Hong Kong
Prior art keywords
signal
circuit
modulator
time response
digital
Prior art date
Application number
HK03106818.4A
Other languages
English (en)
Chinese (zh)
Inventor
S‧尤尼斯
E‧希米奇
T‧威尔伯恩
T‧威爾伯恩
Original Assignee
高通股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 高通股份有限公司 filed Critical 高通股份有限公司
Publication of HK1054631A1 publication Critical patent/HK1054631A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K7/00—Modulating pulses with a continuously-variable modulating signal
    • H03K7/08—Duration or width modulation ; Duty cycle modulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3036—Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M3/368—Continuously compensating for, or preventing, undesired influence of physical parameters of noise other than the quantisation noise already being shaped inherently by delta-sigma modulators
    • H03M3/37—Compensation or reduction of delay or phase error
    • H03M3/374—Relaxation of settling time constraints, e.g. slew rate enhancement
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/331—Sigma delta modulation being used in an amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/50—Digital/analogue converters using delta-sigma modulation as an intermediate step
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Analogue/Digital Conversion (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)
  • Electronic Switches (AREA)
HK03106818.4A 2000-03-04 2001-03-02 具有可調整的時間響應的數字-模擬接口電路 HK1054631A1 (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/517,766 2000-03-04
US09/517,766 US6292122B1 (en) 2000-03-04 2000-03-04 Digital-to-analog interface circuit having adjustable time response
PCT/US2001/006803 WO2001067591A2 (en) 2000-03-04 2001-03-02 Digital-to-analog interface circuit having adjustable time response

Publications (1)

Publication Number Publication Date
HK1054631A1 true HK1054631A1 (zh) 2003-12-05

Family

ID=24061141

Family Applications (1)

Application Number Title Priority Date Filing Date
HK03106818.4A HK1054631A1 (zh) 2000-03-04 2001-03-02 具有可調整的時間響應的數字-模擬接口電路

Country Status (9)

Country Link
US (1) US6292122B1 (enExample)
EP (1) EP1264394B1 (enExample)
JP (4) JP2003526979A (enExample)
KR (1) KR100716378B1 (enExample)
CN (1) CN1423859A (enExample)
AU (1) AU2001240015A1 (enExample)
CA (1) CA2401893C (enExample)
HK (1) HK1054631A1 (enExample)
WO (1) WO2001067591A2 (enExample)

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US6940189B2 (en) 2003-07-31 2005-09-06 Andrew Roman Gizara System and method for integrating a digital core with a switch mode power supply
US6885322B2 (en) * 2003-08-05 2005-04-26 Motorola, Inc. Apparatus and method for transmitter phase shift compensation
US7203511B2 (en) * 2004-01-20 2007-04-10 Broadcom Corporation Control of transmit power of a radio frequency integrated circuit
KR100638592B1 (ko) * 2004-12-11 2006-10-26 한국전자통신연구원 Ｏｆｄｍ 시스템의 단말의 수신기용 ｄｃ 오프셋 제거 장치및 그 방법
JP4116005B2 (ja) * 2005-02-18 2008-07-09 シャープ株式会社 デルタシグマ変調器およびそれを用いたスイッチング増幅回路
US20060217082A1 (en) * 2005-03-22 2006-09-28 Georg Fischer Shaping noise in power amplifiers of duplex communication systems
US7889019B2 (en) * 2006-10-13 2011-02-15 Andrew Roman Gizara Pulse width modulation sequence generating a near critical damped step response
WO2008048865A2 (en) * 2006-10-13 2008-04-24 Ipower Holdings Llc Pulse width modulation sequence generating a near critical damped step response
US7719336B2 (en) * 2006-10-31 2010-05-18 Andrew Roman Gizara Pulse width modulation sequence maintaining maximally flat voltage during current transients
WO2009040897A1 (ja) * 2007-09-26 2009-04-02 Fujitsu Limited 送受信増幅器および遅延偏差補償方法
DE102008026019B4 (de) * 2008-05-30 2010-04-08 Micronas Gmbh Digital-Analog-Wandler-Schaltungsanordnung
JP6308796B2 (ja) * 2014-02-14 2018-04-11 セイコーＮｐｃ株式会社 ディジタル温度補償発振器
US20150341158A1 (en) * 2014-05-23 2015-11-26 Mediatek Inc. Loop gain calibration apparatus for controlling loop gain of timing recovery loop and related loop gain calibration method
JP6460458B2 (ja) * 2014-12-05 2019-01-30 セイコーＮｐｃ株式会社 デジタル温度補償型発振器
JP6425581B2 (ja) * 2015-02-26 2018-11-21 セイコーＮｐｃ株式会社 ディジタル温度補償発振器
EP3382969A1 (en) * 2017-03-31 2018-10-03 Intel IP Corporation Modulation circuit and apparatus, demodulation circuit and apparatus, transmitter, receiver, system, radio frequency circuit, mobile terminal, methods and computer programs for modulating and demodulating
KR102553262B1 (ko) * 2017-11-17 2023-07-07 삼성전자 주식회사 기준 전압 생성기 및 이를 포함하는 메모리 장치
CN111697952B (zh) * 2020-06-22 2023-11-10 四川新先达测控技术有限公司 一种基于数字pzc系统调节脉冲宽度的方法及系统
CN115514363B (zh) * 2022-11-09 2023-01-20 南方电网数字电网研究院有限公司 低功耗模数转换电路

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Also Published As

Publication number Publication date
AU2001240015A1 (en) 2001-09-17
JP2015146604A (ja) 2015-08-13
KR100716378B1 (ko) 2007-05-11
JP2014039276A (ja) 2014-02-27
WO2001067591A3 (en) 2002-03-07
WO2001067591A9 (en) 2003-01-09
KR20020086601A (ko) 2002-11-18
JP2003526979A (ja) 2003-09-09
CA2401893C (en) 2008-10-14
WO2001067591A2 (en) 2001-09-13
JP2012075130A (ja) 2012-04-12
EP1264394B1 (en) 2012-08-22
JP5752764B2 (ja) 2015-07-22
CA2401893A1 (en) 2001-09-13
CN1423859A (zh) 2003-06-11
EP1264394A2 (en) 2002-12-11
US6292122B1 (en) 2001-09-18

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