JP2012009701A - 不揮発性半導体記憶装置 - Google Patents

不揮発性半導体記憶装置 Download PDF

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Publication number
JP2012009701A
JP2012009701A JP2010145454A JP2010145454A JP2012009701A JP 2012009701 A JP2012009701 A JP 2012009701A JP 2010145454 A JP2010145454 A JP 2010145454A JP 2010145454 A JP2010145454 A JP 2010145454A JP 2012009701 A JP2012009701 A JP 2012009701A
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Japan
Prior art keywords
film
electrode
memory
insulating film
dummy
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Pending
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JP2010145454A
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English (en)
Japanese (ja)
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JP2012009701A5 (enExample
Inventor
Hiroyasu Tanaka
啓安 田中
Ryuta Katsumata
竜太 勝又
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
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Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2010145454A priority Critical patent/JP2012009701A/ja
Priority to US12/886,010 priority patent/US8278699B2/en
Publication of JP2012009701A publication Critical patent/JP2012009701A/ja
Publication of JP2012009701A5 publication Critical patent/JP2012009701A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/50—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the boundary region between the core region and the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/689—Vertical floating-gate IGFETs

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  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2010145454A 2010-06-25 2010-06-25 不揮発性半導体記憶装置 Pending JP2012009701A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2010145454A JP2012009701A (ja) 2010-06-25 2010-06-25 不揮発性半導体記憶装置
US12/886,010 US8278699B2 (en) 2010-06-25 2010-09-20 Nonvolatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010145454A JP2012009701A (ja) 2010-06-25 2010-06-25 不揮発性半導体記憶装置

Publications (2)

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JP2012009701A true JP2012009701A (ja) 2012-01-12
JP2012009701A5 JP2012009701A5 (enExample) 2012-10-04

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JP2010145454A Pending JP2012009701A (ja) 2010-06-25 2010-06-25 不揮発性半導体記憶装置

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US (1) US8278699B2 (enExample)
JP (1) JP2012009701A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015132887A1 (ja) * 2014-03-04 2015-09-11 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 柱状半導体メモリ装置及びその製造方法
US10651189B2 (en) 2014-03-04 2020-05-12 Unisantis Electronics Singapore Pte. Ltd. Method for producing pillar-shaped semiconductor memory device
JP2022172300A (ja) * 2017-08-21 2022-11-15 長江存儲科技有限責任公司 Ｎａｎｄメモリデバイスおよびｎａｎｄメモリデバイスを形成するための方法

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JP5380190B2 (ja) * 2009-07-21 2014-01-08 株式会社東芝 不揮発性半導体記憶装置及びその製造方法
US8541832B2 (en) * 2009-07-23 2013-09-24 Samsung Electronics Co., Ltd. Integrated circuit memory devices having vertical transistor arrays therein and methods of forming same
KR101624975B1 (ko) * 2009-11-17 2016-05-30 삼성전자주식회사 3차원 반도체 기억 소자
KR101623547B1 (ko) * 2009-12-15 2016-05-23 삼성전자주식회사 재기입가능한 3차원 반도체 메모리 장치의 제조 방법
KR101585616B1 (ko) * 2009-12-16 2016-01-15 삼성전자주식회사 반도체 장치 및 그 제조 방법
JP5394270B2 (ja) * 2010-01-25 2014-01-22 株式会社東芝 不揮発性半導体記憶装置及びその製造方法
KR20120003351A (ko) * 2010-07-02 2012-01-10 삼성전자주식회사 3차원 비휘발성 메모리 장치 및 그 동작방법
KR101738103B1 (ko) * 2010-09-10 2017-05-22 삼성전자주식회사 3차원 반도체 기억 소자
KR101763420B1 (ko) 2010-09-16 2017-08-01 삼성전자주식회사 3차원 반도체 기억 소자 및 그 제조 방법
KR101825539B1 (ko) * 2010-10-05 2018-03-22 삼성전자주식회사 3차원 반도체 장치 및 그 제조 방법
US8368053B2 (en) * 2011-03-03 2013-02-05 International Business Machines Corporation Multilayer-interconnection first integration scheme for graphene and carbon nanotube transistor based integration
KR101721117B1 (ko) * 2011-03-15 2017-03-29 삼성전자 주식회사 반도체 소자의 제조 방법
KR101855324B1 (ko) * 2011-05-04 2018-05-09 삼성전자주식회사 3차원 반도체 기억 소자 및 그 제조 방법
US9793287B2 (en) * 2011-05-20 2017-10-17 Toshiba Memory Corporation Semiconductor wafer with first and second stacked bodies and semiconductor memory device
KR20130015428A (ko) * 2011-08-03 2013-02-14 삼성전자주식회사 반도체 소자
KR20130077450A (ko) * 2011-12-29 2013-07-09 에스케이하이닉스 주식회사 비휘발성 메모리 장치 및 그 제조 방법
KR101990904B1 (ko) 2012-07-17 2019-06-19 삼성전자주식회사 수직형 반도체 소자
US9287167B2 (en) 2012-10-05 2016-03-15 Samsung Electronics Co., Ltd. Vertical type memory device
KR102031187B1 (ko) 2012-10-05 2019-10-14 삼성전자주식회사 수직형 메모리 장치
US9129861B2 (en) 2012-10-05 2015-09-08 Samsung Electronics Co., Ltd. Memory device
KR101986245B1 (ko) 2013-01-17 2019-09-30 삼성전자주식회사 수직형 반도체 소자의 제조 방법
CN104051326B (zh) * 2013-03-12 2017-09-29 旺宏电子股份有限公司 在衬底不同深度有接触着陆区的装置的形成方法及3‑d结构
JP2015149413A (ja) 2014-02-06 2015-08-20 株式会社東芝 半導体記憶装置及びその製造方法
US20150371925A1 (en) * 2014-06-20 2015-12-24 Intel Corporation Through array routing for non-volatile memory
US9349818B2 (en) * 2014-10-21 2016-05-24 United Microelectronics Corp. Metal-oxide-semiconductor transistor device having a drain side dummy contact
US9196567B1 (en) * 2015-01-14 2015-11-24 Macronix International Co., Ltd. Pad structure
US10096612B2 (en) * 2015-09-14 2018-10-09 Intel Corporation Three dimensional memory device having isolated periphery contacts through an active layer exhume process
CN108933139B (zh) * 2017-05-25 2023-10-17 三星电子株式会社 垂直非易失性存储器装置
JP2019161042A (ja) * 2018-03-14 2019-09-19 東芝メモリ株式会社 半導体装置
JP7089067B2 (ja) 2018-05-18 2022-06-21 長江存儲科技有限責任公司 ３次元メモリデバイスおよびその形成方法
KR102678158B1 (ko) * 2018-09-04 2024-06-27 삼성전자주식회사 3차원 반도체 메모리 소자 및 그 제조 방법
KR102650424B1 (ko) * 2019-02-25 2024-03-25 에스케이하이닉스 주식회사 반도체 메모리 장치
JP2020155664A (ja) * 2019-03-22 2020-09-24 キオクシア株式会社 半導体記憶装置
TWI701811B (zh) * 2019-05-15 2020-08-11 力晶積成電子製造股份有限公司 非揮發性記憶體結構
KR102685508B1 (ko) * 2019-07-23 2024-07-17 에스케이하이닉스 주식회사 반도체 메모리 장치
JP2021150501A (ja) * 2020-03-19 2021-09-27 キオクシア株式会社 半導体記憶装置
KR102876910B1 (ko) 2020-08-10 2025-10-28 삼성전자주식회사 반도체 장치 및 이를 포함하는 전자 시스템
KR102847561B1 (ko) 2021-02-09 2025-08-19 삼성전자주식회사 반도체 장치 및 이를 포함하는 전자 시스템

Citations (4)

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JP2009146954A (ja) * 2007-12-11 2009-07-02 Toshiba Corp 不揮発性半導体記憶装置
JP2009224574A (ja) * 2008-03-17 2009-10-01 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP2009267243A (ja) * 2008-04-28 2009-11-12 Toshiba Corp 不揮発性半導体記憶装置、及びその製造方法
JP2010093269A (ja) * 2008-10-09 2010-04-22 Samsung Electronics Co Ltd 垂直型半導体装置及びその形成方法

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KR100483035B1 (ko) 2001-03-30 2005-04-15 샤프 가부시키가이샤 반도체 기억장치 및 그 제조방법
JP3963664B2 (ja) 2001-06-22 2007-08-22 富士雄 舛岡 半導体記憶装置及びその製造方法
JP2004335031A (ja) * 2003-05-09 2004-11-25 Toshiba Corp 半導体記憶装置
JP3913709B2 (ja) * 2003-05-09 2007-05-09 株式会社東芝 半導体記憶装置
JP5016832B2 (ja) 2006-03-27 2012-09-05 株式会社東芝 不揮発性半導体記憶装置及びその製造方法

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JP2009224574A (ja) * 2008-03-17 2009-10-01 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP2009267243A (ja) * 2008-04-28 2009-11-12 Toshiba Corp 不揮発性半導体記憶装置、及びその製造方法
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015132887A1 (ja) * 2014-03-04 2015-09-11 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 柱状半導体メモリ装置及びその製造方法
US9773801B2 (en) 2014-03-04 2017-09-26 Unisantis Electronics Singapore Pte. Ltd. Pillar-shaped semiconductor memory device and method for producing the same
US10121795B2 (en) 2014-03-04 2018-11-06 Unisantis Electronics Singapore Pte. Ltd. Method for producing pillar-shaped semiconductor memory device
US10651189B2 (en) 2014-03-04 2020-05-12 Unisantis Electronics Singapore Pte. Ltd. Method for producing pillar-shaped semiconductor memory device
JP2022172300A (ja) * 2017-08-21 2022-11-15 長江存儲科技有限責任公司 Ｎａｎｄメモリデバイスおよびｎａｎｄメモリデバイスを形成するための方法

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US8278699B2 (en) 2012-10-02
US20110316069A1 (en) 2011-12-29

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