JP2011505705A5 - - Google Patents
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- Publication number
- JP2011505705A5 JP2011505705A5 JP2010536543A JP2010536543A JP2011505705A5 JP 2011505705 A5 JP2011505705 A5 JP 2011505705A5 JP 2010536543 A JP2010536543 A JP 2010536543A JP 2010536543 A JP2010536543 A JP 2010536543A JP 2011505705 A5 JP2011505705 A5 JP 2011505705A5
- Authority
- JP
- Japan
- Prior art keywords
- site
- forming
- electrically connected
- layer
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910000679 solder Inorganic materials 0.000 claims description 23
- 238000000034 method Methods 0.000 claims description 16
- 239000004065 semiconductor Substances 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 8
- 238000001465 metallisation Methods 0.000 claims 18
- 239000004020 conductor Substances 0.000 claims 15
- 229920000642 polymer Polymers 0.000 claims 9
- 230000008707 rearrangement Effects 0.000 claims 9
- 238000004519 manufacturing process Methods 0.000 claims 3
- 238000009429 electrical wiring Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/949,951 US20090032941A1 (en) | 2007-08-01 | 2007-12-04 | Under Bump Routing Layer Method and Apparatus |
| US11/949,951 | 2007-12-04 | ||
| PCT/IB2008/003343 WO2009071982A2 (en) | 2007-12-04 | 2008-12-04 | Under bump routing layer method and apparatus |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013030065A Division JP5654067B2 (ja) | 2007-12-04 | 2013-02-19 | アンダーバンプ配線層の方法および装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2011505705A JP2011505705A (ja) | 2011-02-24 |
| JP2011505705A5 true JP2011505705A5 (enExample) | 2012-02-09 |
| JP5567489B2 JP5567489B2 (ja) | 2014-08-06 |
Family
ID=40592064
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010536543A Expired - Fee Related JP5567489B2 (ja) | 2007-12-04 | 2008-12-04 | アンダーバンプ配線層の方法および装置 |
| JP2013030065A Expired - Fee Related JP5654067B2 (ja) | 2007-12-04 | 2013-02-19 | アンダーバンプ配線層の方法および装置 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013030065A Expired - Fee Related JP5654067B2 (ja) | 2007-12-04 | 2013-02-19 | アンダーバンプ配線層の方法および装置 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20090032941A1 (enExample) |
| EP (1) | EP2229694B1 (enExample) |
| JP (2) | JP5567489B2 (enExample) |
| KR (1) | KR20100102635A (enExample) |
| CN (1) | CN101952962A (enExample) |
| WO (1) | WO2009071982A2 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7790501B2 (en) * | 2008-07-02 | 2010-09-07 | Ati Technologies Ulc | Semiconductor chip passivation structures and methods of making the same |
| US8278748B2 (en) * | 2010-02-17 | 2012-10-02 | Maxim Integrated Products, Inc. | Wafer-level packaged device having self-assembled resilient leads |
| TWI541964B (zh) * | 2010-11-23 | 2016-07-11 | 矽品精密工業股份有限公司 | 半導體基板之製法 |
| US20120175772A1 (en) * | 2011-01-07 | 2012-07-12 | Leung Andrew K | Alternative surface finishes for flip-chip ball grid arrays |
| US8647974B2 (en) | 2011-03-25 | 2014-02-11 | Ati Technologies Ulc | Method of fabricating a semiconductor chip with supportive terminal pad |
| US8564030B2 (en) | 2011-06-10 | 2013-10-22 | Advanced Micro Devices | Self-aligned trench contact and local interconnect with replacement gate process |
| US8716124B2 (en) | 2011-11-14 | 2014-05-06 | Advanced Micro Devices | Trench silicide and gate open with local interconnect with replacement gate process |
| US9257276B2 (en) * | 2011-12-31 | 2016-02-09 | Intel Corporation | Organic thin film passivation of metal interconnections |
| WO2013101243A1 (en) | 2011-12-31 | 2013-07-04 | Intel Corporation | High density package interconnects |
| EP2738809A3 (en) * | 2012-11-30 | 2017-05-10 | Enpirion, Inc. | Semiconductor device including gate drivers around a periphery thereof |
| CN103887248B (zh) * | 2012-12-21 | 2017-12-12 | 比亚迪股份有限公司 | 一种igbt结构及其制备方法 |
| GB2520952A (en) | 2013-12-04 | 2015-06-10 | Ibm | Flip-chip electronic device with carrier having heat dissipation elements free of solder mask |
| JP6771308B2 (ja) * | 2016-05-02 | 2020-10-21 | 三菱電機株式会社 | 回路基板および半導体集積回路の実装構造 |
| DE102018105166B4 (de) * | 2017-11-15 | 2024-01-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Zwei vorrichtungen zu einem halbleiter-package und verfahren zur herstellung eines halbleiter-package |
| WO2019116482A1 (ja) * | 2017-12-14 | 2019-06-20 | 三菱電機株式会社 | 半導体装置 |
| US11462513B2 (en) * | 2020-12-29 | 2022-10-04 | United Microelectronics Corp. | Chip bonding alignment structure, chip bonding structure and methods for fabricating the same |
Family Cites Families (47)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3593319A (en) * | 1968-12-23 | 1971-07-13 | Gen Electric | Card-changeable capacitor read-only memory |
| US4249196A (en) * | 1978-08-21 | 1981-02-03 | Burroughs Corporation | Integrated circuit module with integral capacitor |
| JPS56101732A (en) * | 1980-01-18 | 1981-08-14 | Matsushita Electric Industrial Co Ltd | Metallized film condenser |
| US4409608A (en) * | 1981-04-28 | 1983-10-11 | The United States Of America As Represented By The Secretary Of The Navy | Recessed interdigitated integrated capacitor |
| GB2115223B (en) * | 1982-02-18 | 1985-07-10 | Standard Telephones Cables Ltd | Multilayer ceramic dielectric capacitors |
| US4901128A (en) * | 1982-11-04 | 1990-02-13 | Hitachi, Ltd. | Semiconductor memory |
| KR900001394B1 (en) * | 1985-04-05 | 1990-03-09 | Fujitsu Ltd | Super high frequency intergrated circuit device |
| US4685197A (en) * | 1986-01-07 | 1987-08-11 | Texas Instruments Incorporated | Fabricating a stacked capacitor |
| DE3783652T2 (de) * | 1986-05-16 | 1993-06-03 | Showa Denko Kk | Festelektrolytkondensator. |
| JPS6370550A (ja) * | 1986-09-12 | 1988-03-30 | Nec Corp | 半導体集積回路装置 |
| JPH01209746A (ja) * | 1988-02-17 | 1989-08-23 | Nec Corp | 半導体装置 |
| US4866567A (en) * | 1989-01-06 | 1989-09-12 | Ncr Corporation | High frequency integrated circuit channel capacitor |
| US4914546A (en) * | 1989-02-03 | 1990-04-03 | Micrel Incorporated | Stacked multi-polysilicon layer capacitor |
| US5053916A (en) * | 1989-03-13 | 1991-10-01 | U.S. Philips Corporation | Surface-mounted multilayer capacitor and printed circuit board having such a multilayer capacitor |
| US5089878A (en) * | 1989-06-09 | 1992-02-18 | Lee Jaesup N | Low impedance packaging |
| US5081559A (en) * | 1991-02-28 | 1992-01-14 | Micron Technology, Inc. | Enclosed ferroelectric stacked capacitor |
| US5189594A (en) * | 1991-09-20 | 1993-02-23 | Rohm Co., Ltd. | Capacitor in a semiconductor integrated circuit and non-volatile memory using same |
| US5155658A (en) * | 1992-03-05 | 1992-10-13 | Bell Communications Research, Inc. | Crystallographically aligned ferroelectric films usable in memories and method of crystallographically aligning perovskite films |
| US5208725A (en) * | 1992-08-19 | 1993-05-04 | Akcasu Osman E | High capacitance structure in a semiconductor device |
| JP3057130B2 (ja) * | 1993-02-18 | 2000-06-26 | 三菱電機株式会社 | 樹脂封止型半導体パッケージおよびその製造方法 |
| JP3160198B2 (ja) * | 1995-02-08 | 2001-04-23 | インターナショナル・ビジネス・マシーンズ・コーポレ−ション | デカップリング・コンデンサが形成された半導体基板及びこれの製造方法 |
| US5874782A (en) * | 1995-08-24 | 1999-02-23 | International Business Machines Corporation | Wafer with elevated contact structures |
| JP3147162B2 (ja) * | 1998-07-13 | 2001-03-19 | 日本電気株式会社 | フリップチップ集積回路のバンプ配置方法、およびフリップチップ集積回路 |
| JP3530761B2 (ja) * | 1999-01-18 | 2004-05-24 | 新光電気工業株式会社 | 半導体装置 |
| US6656828B1 (en) * | 1999-01-22 | 2003-12-02 | Hitachi, Ltd. | Method of forming bump electrodes |
| JP4004196B2 (ja) * | 1999-11-16 | 2007-11-07 | イビデン株式会社 | 半導体チップ |
| JP2001168125A (ja) * | 1999-12-03 | 2001-06-22 | Nec Corp | 半導体装置 |
| US6387795B1 (en) * | 2001-03-22 | 2002-05-14 | Apack Technologies Inc. | Wafer-level packaging |
| US7215022B2 (en) * | 2001-06-21 | 2007-05-08 | Ati Technologies Inc. | Multi-die module |
| WO2003012863A1 (fr) * | 2001-07-31 | 2003-02-13 | Renesas Technology Corp. | Dispositif semi-conducteur et procede de fabrication associe |
| US6979896B2 (en) * | 2001-10-30 | 2005-12-27 | Intel Corporation | Power gridding scheme |
| JP3768433B2 (ja) * | 2001-11-19 | 2006-04-19 | 株式会社ルネサステクノロジ | 半導体装置の設計方法 |
| DE10159466A1 (de) * | 2001-12-04 | 2003-06-12 | Koninkl Philips Electronics Nv | Anordnung mit Kondensator |
| JP2004079801A (ja) * | 2002-08-19 | 2004-03-11 | Fujitsu Ltd | コンデンサ装置及びその製造方法 |
| US7112884B2 (en) * | 2002-08-23 | 2006-09-26 | Ati Technologies, Inc. | Integrated circuit having memory disposed thereon and method of making thereof |
| US6861749B2 (en) * | 2002-09-20 | 2005-03-01 | Himax Technologies, Inc. | Semiconductor device with bump electrodes |
| US7161793B2 (en) * | 2002-11-14 | 2007-01-09 | Fujitsu Limited | Layer capacitor element and production process as well as electronic device |
| JP4571781B2 (ja) * | 2003-03-26 | 2010-10-27 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US7180195B2 (en) * | 2003-12-17 | 2007-02-20 | Intel Corporation | Method and apparatus for improved power routing |
| JP4904670B2 (ja) * | 2004-06-02 | 2012-03-28 | 富士通セミコンダクター株式会社 | 半導体装置 |
| TWI299248B (en) * | 2004-09-09 | 2008-07-21 | Phoenix Prec Technology Corp | Method for fabricating conductive bumps of a circuit board |
| JP4449824B2 (ja) * | 2005-06-01 | 2010-04-14 | カシオ計算機株式会社 | 半導体装置およびその実装構造 |
| US7473999B2 (en) * | 2005-09-23 | 2009-01-06 | Megica Corporation | Semiconductor chip and process for forming the same |
| JP4595823B2 (ja) * | 2006-01-24 | 2010-12-08 | 株式会社デンソー | ボールグリッドアレイ |
| US20070176292A1 (en) * | 2006-01-27 | 2007-08-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Bonding pad structure |
| JP5157191B2 (ja) * | 2006-03-01 | 2013-03-06 | 日立化成株式会社 | 半導体装置 |
| JP2006203261A (ja) * | 2006-04-26 | 2006-08-03 | Renesas Technology Corp | 半導体装置 |
-
2007
- 2007-12-04 US US11/949,951 patent/US20090032941A1/en not_active Abandoned
-
2008
- 2008-12-04 JP JP2010536543A patent/JP5567489B2/ja not_active Expired - Fee Related
- 2008-12-04 CN CN2008801260899A patent/CN101952962A/zh active Pending
- 2008-12-04 EP EP08855955.4A patent/EP2229694B1/en active Active
- 2008-12-04 KR KR1020107014910A patent/KR20100102635A/ko not_active Ceased
- 2008-12-04 WO PCT/IB2008/003343 patent/WO2009071982A2/en not_active Ceased
-
2013
- 2013-02-19 JP JP2013030065A patent/JP5654067B2/ja not_active Expired - Fee Related
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