JP2011249801A - ２個の接合素子の低温加圧焼結接合方法およびそれによって製造される構成体 - Google Patents

２個の接合素子の低温加圧焼結接合方法およびそれによって製造される構成体 Download PDF

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JP2011249801A
JP2011249801A JP2011114546A JP2011114546A JP2011249801A JP 2011249801 A JP2011249801 A JP 2011249801A JP 2011114546 A JP2011114546 A JP 2011114546A JP 2011114546 A JP2011114546 A JP 2011114546A JP 2011249801 A JP2011249801 A JP 2011249801A
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sintered
layer
joining
sinter
bonding
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JP5690652B2 (ja
Inventor
Falkenbach Joseph
ファルテンバッハー ヨーゼフ
Augustin Karlheinz
アウグスティン カールハインツ
Sagebaum Ulrich
ザーゲバウム ウルリヒ
Goeble Christian
ゲープル クリスティアン
Stockmeyer Thomas
ストックマイアー トーマス
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Semikron Elektronik GmbH and Co KG
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Semikron Elektronik GmbH and Co KG
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Abstract

【課題】低温加圧焼結接合時に空洞の形成あるいはそのサイズを低減した２個の接合素子の低温加圧焼結接合方法およびそれによって製造される構成体を提供する。
【解決手段】構成体製造方法は、第１接触面１６を有する第１接合素子１０を用意するステップ、焼結金属の粒子および溶剤から構成される焼結ペーストからなる層を第１接触面１６に施与するステップ、焼結ペーストに温度を加えて、焼結層を形成するように溶剤を追い出すステップ、その焼結層に液体を施与するステップ、第２接合素子５０を配置するステップ、接着剤６２を、焼結層と第２接合素子５０との縁部領域に、第１接合素子１０にも接触する状態で塗着するステップ、接合素子１０、５０間の材料密着結合の低温加圧焼結接合を形成するために、構成体にさらに温度および圧力を加えるステップであって、焼結層が均質な焼結金属層３４に転化されるステップ、を有する。
【選択図】図１ｄ

Description

本発明は、それぞれ被接合接触面を有する２つの接合素子／接合要素を低温加圧焼結接合する製造方法と、この方法によって製造される構成体／アセンブリとに関する。
このような構成体は、例えばパワーエレクトロニクス回路の分野で周知されている。この回路分野においては、例えばパワー半導体の素子が基板に材料密着結合（はんだ付け、溶接、粘着剤による接着のような原子や分子の力によって対象物が相互結合される態様）で接合され、パワー半導体モジュールの中に配置される。
例えば、特許文献１は、このような接合を形成するサイクル式の方法のための装置を記述している。この装置においては、サイクル操作用の加圧装置が、加圧ラムと加熱可能な加圧テーブルとを備えており、さらに、圧力安定なコンベアベルトが、加圧テーブルの直接上部に走行するように配置される。素子がその上に配置される基板と加圧ラムとの間に、保護膜が付加的に設けられる。
しかし、この既知の方法は、接合素子を低温加圧焼結接合用の装置内に配置して初めて溶剤に温度が加えられるので、接合の形成中に空洞が生じるという欠点を有する。このような空洞は、少なくとも３０μｍの直径の、焼結金属層内のガス封入体である。
独国特許出願公開第１０２００５０５８７９４Ａ１号明細書
本発明は、２つの接合素子の低温加圧焼結接合の形態の材料密着結合の接合を含む製造方法と、それによって形成される構成体とであって、低温加圧焼結接合の焼結金属層における空洞の形成が避けられるか、あるいは、少なくともその空洞のサイズが大幅に低減されるような製造方法とそれによる構成体とを提供するという目的に基づいている。
この目的は、請求項１の特徴を含む方法と、請求項７による構成体とによって、本発明に従って達成される。好ましい実施形態はそれぞれの従属請求項に記述される。
本発明による方法によって、第１および第２の接合素子を含む構成体が製造され、前記接合素子は、低温加圧焼結接合によって相互に材料密着結合で接合される。その場合、各接合素子は、それぞれ、もう一方の接合素子に接合される接触面を有しており、前期接触面の間に焼結金属層が配置される。この方法は、以下に述べるステップを含む。本発明による方法に関しては、ステップｄ）およびｆ）は記述した順序で実施するのが有利であるが、２つのステップｄ）またはｆ）のいずれか１つのみを選択的に実施することが好ましい場合もある。
ａ）第１接触面を有する第１接合素子であって、この接触面は好ましくは貴金属表面を有する第１接合素子を用意するステップ。次に、前記接触面を、超音波の作用によって不純物なしの状態にすることが望ましい。この超音波の作用は方法の次のステップの前に終了させることが可能であるが、別の不純物を防止するため、前記作用を次の処理ステップと一時的に重ね合せ得ることが特に有利である。
ｂ）焼結金属の粒子、好ましくは銀粒子と溶剤とから構成される焼結ペーストからなる層を第１接触面に施与するステップ。
ｃ）焼結ペーストに温度を加えて、まだ相互に接合されていない焼結金属の粒子から構成される焼結層を形成するように溶剤を追い出すステップ。
ｄ）その焼結層に、例えばグリセリンのような好ましくは極性の液体を施与するステップ。前記液体は、溶剤が追い出された後に、第２接合素子を固定するための僅かな接着力のみを有するものであり、第２接合素子を焼結層の上に固定する次のステップにおいて役立つ。
ｅ）第２接合素子を、その第２接触面が焼結ペーストからなる層の上に位置するように、あるいは、正確に言えば、ステップｄ）による液体が存在する場合は正確にその液体の上に位置するように配置するステップ。
ｆ）接合素子を相互に固定するために、接着剤を、焼結層と第２接合素子との縁部領域に、その接着剤が第１接合素子にも接触する状態で塗着するステップ。この場合、好ましくはシリコーンである接着剤を、構成体の少なくとも２箇所においてのみ施与することで十分である可能性もある。しかし、前記の接着剤を上記の全領域の周囲に塗着することが特に有利である。
ｇ）接合素子の間の材料密着結合の低温加圧焼結接合を形成するために、構成体にさらに温度および圧力を加えるステップ。この場合、ステップｄ）に従って焼結層と第２接合素子との間に塗着することができる液体は追い出され、焼結層は均質な焼結金属層に転化される。この場合、均質な焼結金属層というのは、最大直径が１０μｍの空洞を含む金属層を意味すると理解する。
従って、本発明による上記の方法は、２つの接合素子の接触面を接合する焼結金属層を含む２つの接合素子の構成体を生成する。本発明によれば、前記焼結金属層は、均質な層として具現化され、最大でも１０μｍの直径の空洞しか有しない。
本発明による方法と、それによって製造される本発明の構成体との本質的な利点は、焼結金属層内の空洞の個数が少なく、および／または、その空洞のサイズが小さい結果として、電気的性質が改善され、特にオーム抵抗が低減され、さらに、接合の長期的な耐久性が改善される点にある。また、超音波の適用と的確に組み合わせると、この接合形成に必要な圧力を、先行技術に比べて１０％より多く追加的に低減可能である。印加されるべき必要圧力の低減は、どのようなものであれ、その結果として破損率の低下が可能になるので、方法の収率を直接的に増大させる。
以下、本発明を、代表的な実施形態に基づいて、図１に従ってさらに詳しく説明する。
本発明による製造方法の異なるステップの内、最初のステップ（上記のステップｂ）に相当）を示す。 本発明による製造方法の第２ステップ（ステップｃ））を示す。 本発明による製造方法の第３ステップ（ステップｄ））を示す。 本発明による製造方法の第４ステップ（ステップｆ））を示す。
図１ａは、第１接合素子として、パワーエレクトロニクスの分野で用いられているような典型的な基板（１０）の一部分を示す。前記基板（１０）は、好ましくは例えば窒化アルミニウムのような工業用セラミックである絶縁材料体（１２）と、前記絶縁材料体（１２）の主面の少なくとも一方に装着される複数の金属導体トラック（１４）とから構成される。図には、前記複数の導体トラックの１つが表現されている。前記導体トラック（１４）は、好ましくは銅から形成され、相互に電気絶縁されて、基板（１０）の回路構造を形成する。
第２接合素子が導電接触されるべき基板の接触面は、低温加圧焼結接合処理し得る表面を有する。このため、接触面（１６）は貴金属表面（１８）を有することが望ましい。図には、前記接触面（１６）に塗着される焼結ペースト（３０）が同様に示されているが、前記焼結ペーストそのものは銀粒子および溶剤から構成される。前記焼結ペースト（３０）の施与に先立って、表面を超音波（２０）に曝露することを実施した。この超音波への曝露は、焼結ペースト（３０）を施与する間にも維持された。この手段によって、後に行われる低温加圧焼結接合の形成を損なう可能性がある不純物が除去される。
図１ｂは、引き続く方法のステップとして、温度による焼結ペーストからの溶剤の追い出しを示している。この目的のための温度作用（２２）は、任意の所望の態様で具現化できる。例えば、焼結ペースト（３０）上への直接作用以外に、基板（１０）を加熱することによっても可能である。早くもこの時点で溶剤を追い出すことの本質的な利点は、第２接合素子を配置した後に前記溶剤の追い出しを行うと、上記のような完全な追い出しが得られないという点にある。残留溶剤が空洞をもたらすことになるが、本発明による方法においては、この空洞は、形成されるとしてもそのサイズが大幅に小さくなる。
この方法のステップの後、残った焼結ペースト（図１ａによれば３０）の殆どすべては貴金属の粒子であり、以下これを、焼結層（３２）として表示する。焼結ペーストの場合には、その溶剤部分によって、表面上に配置される第２接合素子に対する接着効果がもたらされるが、この焼結ペーストの場合の接着効果に比べると、焼結層（３２）は、第２接合素子に対するその自由表面の接着力を全く有しないか、またはごく僅かしか有しない。
それにも拘らず第２接合素子の固定を実現するため、図１ｃに示すように、液体（４０）を焼結層（３２）の自由表面に施与する。第２接合素子を配置する間に、前記液体（４０）は、焼結層（３２）と、第２接合素子、この場合パワー半導体素子（５０、図１ｄ参照）との間の接着力を形成する非常に薄い層になる。そのため、前記パワー半導体素子（５０）は焼結層（３２）上の所定位置に固定され、その結果、この方法遂行の間のさらなる取り扱いが大幅に簡素化される。グリセリンのような短鎖の多価アルコールが、低沸点でありながら低蒸気圧を有するというその物理的性質のために、この場合、特に適した液体であることが分かっている。
図１ｃに関して述べた固定方法の代わりの方式として、しかし特に望ましくはその方法に対する追加的な方式として、接触面（５６）を含む第２接合素子、すなわちパワー半導体素子（５０）を、別の接着剤（６０）によって、その縁部領域および焼結層（３２）の縁部領域において、かつ、第１接合素子すなわち基板（１０）にも接触する状態で、第１接合素子に固定することも可能である。
この場合、前記固定方式は、上記の縁部領域の２箇所または３箇所に設けることで十分である可能性もあるが、上記の液体（４０）による固定が設けられない場合は、前記接着剤を縁部領域の全周に設けることが有利である。
両実施形態において、原理的には、２つの変形態様が等価であり、また等しく好ましいものである。図１ｄは、左側に、第２接合素子、すなわちパワー半導体素子（５０）の頂部の上に右向きに延びる接着剤（６０）の施与状態を示し、一方、右側においては、接着剤（６２）は、パワー半導体素子（５０）に専ら側方から施与されており、その他の点では左側の状況と同じである。
１０ 第１接合素子（基板）
１２ 絶縁材料体
１４ 導体トラック
１６ 第１接触面
１８ 貴金属表面
２０ 超音波
２２ 温度作用
３０ 焼結ペースト
３２ 焼結層
３４ 焼結金属層
４０ 液体
５０ 第２接合素子（パワー半導体素子）
５６ 第２接触面
６０ 接着剤
６２ 接着剤

Claims (8)

  1. 低温加圧焼結接合によって相互に材料密着結合で接合される第１素子（１０）と第２接合素子（５０）を含む構成体の製造方法であって、前記両方の接合素子（１０、５０）は、それぞれ、もう一方のそれぞれの前記接合素子に接合されるべき接触面（１６、５６）を有し、それら接触面（１６、５６）の間には焼結金属層（３４）が配置される構成体の製造方法において、
    ａ）第１接触面（１６）を有する第１接合素子（１０）を用意するステップと、
    ｂ）焼結金属の粒子と溶剤からなる焼結ペースト（３０）の層を前記第１接触面（１６）に施与するステップと、
    ｃ）前記焼結ペースト（３０）に温度（２２）を加えて、焼結層（３２）を形成するように前記溶剤を追い出すステップと、
    ｄ）前記焼結層（３２）に液体（４０）を施与するステップと、
    ｅ）第２接合素子（５０）を、それらの第２接触面（５６）が前記焼結層（３２）の上に位置するように配置するステップと、
    ｆ）前記両方の接合素子（１０、５０）を相互に固定するために、接着剤（６０、６２）を、前記焼結層（３２）と前記第２接合素子（５０）との縁部領域に、前記第１接合素子（１０）にも接触する状態で塗着するステップと、
    ｇ）前記両方の接合素子（１０、５０）の間で材料密着結合の低温加圧焼結接合を形成するために、前記構成体にさらに温度および圧力を加えるステップであって、前記焼結層（３２）が均質な焼結金属層（３４）に転化されるステップと、
    を含み、ステップｄ）とｆ）は、連続的に実施するか、あるいは、選択的にいずれかを実施することが可能であることを特徴とする方法。
  2. 前記液体（４０）が、極性の液体、好ましくはグリセリンのような短鎖の多価アルコールとして具現化される、請求項１に記載の方法。
  3. 前記接着剤（６０、６２）が、好ましくは熱架橋するシリコーンとして具現化される、請求項１に記載の方法。
  4. 前記接着剤（６０、６２）が、前記縁部領域の少なくとも２箇所に施与されるか、あるいは、全周に施与される、請求項１に記載の方法。
  5. ステップｂ）が実行される直前に、前記第１接触面（１６）とそれを直接取り巻く領域が超音波（２０）に曝露される、請求項１に記載の方法。
  6. ステップｂ）が実行される直前および実行されている間に、前記第１接触面（１６）とそれを直接取り巻く領域が超音波（２０）に曝露される、請求項１に記載の方法。
  7. 請求項１〜６のいずれか一項による方法に従って形成される構成体であり、低温加圧焼結接合によって相互に材料密着結合で接合される第１接合素子（１０）と第２接合素子（５０）を含む構成体であって、前記両方の接合素子（１０、５０）は、それぞれ、もう一方のそれぞれの前記接合素子に接合されるべき接触面（１６、５６）を有しており、さらに、これら接触面（１６、５６）の間には焼結金属（３４）が配置され、この焼結金属（３４）は、均質な層として形成され、最大でも１０μｍの直径の空洞しか有しない構成体。
  8. 接着剤（６０、６２）が、前記焼結金属層（３４）の縁部領域に塗着され、前記接着剤は両方の接合素子（１０、５０）と接触する、請求項７に記載の構成体。
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011249802A (ja) * 2010-05-27 2011-12-08 Semikron Elektronik Gmbh & Co Kg 低温加圧焼結接合を含む２個の接合素子の構成体およびその製造方法
JP2016081943A (ja) * 2014-10-09 2016-05-16 三菱電機株式会社 半導体装置及びその製造方法
JPWO2017013808A1 (ja) * 2015-07-23 2017-10-19 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
KR20180059913A (ko) * 2015-10-08 2018-06-05 헤레우스 도이칠란트 게엠베하 운트 코. 카게 기판 배열체를 생산하는 방법, 기판 배열체, 및 기판 배열체를 전자 부품에 연결하는 방법
JP2020115520A (ja) * 2019-01-18 2020-07-30 三菱電機株式会社 電力用半導体装置の製造方法、電力用半導体装置および電力変換装置

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3234988A4 (en) * 2014-12-17 2018-09-12 Alpha Assembly Solutions Inc. Method for die and clip attachment
DE102015107724B4 (de) * 2015-04-02 2016-12-01 Heraeus Deutschland GmbH & Co. KG Verfahren zum Herstellen einer Substratanordnung, Substratanordnung, Verfahren zum Verbinden eines Elektronikbauteils mit einer Substratanordnung und Elektronikbauteil
EP3086361A3 (de) * 2015-04-02 2017-01-25 Heraeus Deutschland GmbH & Co. KG Verfahren zum herstellen einer substratanordnung mit einem vorfixiermittel, entsprechende substratanordnung, verfahren zum verbinden eines elektronikbauteils mit einer substratanordnung mit anwendung eines auf dem elektronikbauteil und/oder der substratanordnung aufgebrachten vorfixiermittels und mit einer substratanordnung verbundenes elektronikbauteil
DE102015120156B4 (de) * 2015-11-20 2019-07-04 Semikron Elektronik Gmbh & Co. Kg Vorrichtung zur materialschlüssigen Verbindung von Verbindungspartnern eines Leistungselekronik-Bauteils und Verwendung einer solchen Vorrichtung
DE102016124215A1 (de) * 2016-12-13 2018-06-14 Semikron Elektronik Gmbh & Co. Kg Verfahren zur Niedertemperatur-Drucksinterverbindung zweier Verbindungspartner und hiermit hergestellte Anordnung
CN109540374B (zh) * 2019-01-10 2024-03-15 中南大学 超声烧结封装装置
EP3792962A1 (en) * 2019-09-12 2021-03-17 Infineon Technologies AG Method for monitoring a process of forming a sinterable connection layer by photometric measurements
DE102020103288B3 (de) * 2020-02-10 2020-10-29 Semikron Elektronik Gmbh & Co. Kg Verfahren zur Reduzierung der Oberflächenrauheit einer Verbindungsoberfläche einer Sinterpastenschicht und Drucksinterverfahren damit und Sinterverbindungsherstellungseinrichtung zur Durchführung

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6245133A (ja) * 1985-08-23 1987-02-27 Hitachi Ltd ペレツト付方法
JPS6436034A (en) * 1987-07-31 1989-02-07 Nec Corp Manufacture of semiconductor device
JPH09307042A (ja) * 1996-05-17 1997-11-28 Sanken Electric Co Ltd 半導体装置
JP2001176894A (ja) * 1999-12-20 2001-06-29 Nec Yamagata Ltd ダイボンディング用接着ペースト塗布方法及びその装置
JP2006147643A (ja) * 2004-11-16 2006-06-08 Seiko Epson Corp 電子素子の接合方法、電子素子の実装方法、電子装置の製造方法、回路基板、電子機器
JP2007173768A (ja) * 2005-11-24 2007-07-05 Mitsubishi Materials Corp Ａｕ−Ｓｎ合金はんだペーストを用いた基板と素子の接合方法
JP2009164203A (ja) * 2007-12-28 2009-07-23 Mitsubishi Electric Corp 半導体装置および半導体装置の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IN168174B (ja) * 1986-04-22 1991-02-16 Siemens Ag
EP0460286A3 (en) * 1990-06-06 1992-02-26 Siemens Aktiengesellschaft Method and arrangement for bonding a semiconductor component to a substrate or for finishing a semiconductor/substrate connection by contactless pressing
DE10009678C1 (de) * 2000-02-29 2001-07-19 Siemens Ag Wärmeleitende Klebstoffverbindung und Verfahren zum Herstellen einer wärmeleitenden Klebstoffverbindung
JP5007127B2 (ja) * 2004-12-28 2012-08-22 光正 小柳 自己組織化機能を用いた集積回路装置の製造方法及び製造装置
DE102005058794A1 (de) 2005-12-09 2007-06-14 Semikron Elektronik Gmbh & Co. Kg Vorrichtung und getaktetes Verfahren zur Drucksinterverbindung
DE102008034946B4 (de) * 2008-07-26 2016-05-19 Semikron Elektronik Gmbh & Co. Kg Herstellungsverfahren eines Edelmetallverbindungsmittels
DE102008039828A1 (de) * 2008-08-27 2010-03-04 W.C. Heraeus Gmbh Steuerung der Porosität von Metallpasten für den druckfreien Niedertemperatursinterprozess

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6245133A (ja) * 1985-08-23 1987-02-27 Hitachi Ltd ペレツト付方法
JPS6436034A (en) * 1987-07-31 1989-02-07 Nec Corp Manufacture of semiconductor device
JPH09307042A (ja) * 1996-05-17 1997-11-28 Sanken Electric Co Ltd 半導体装置
JP2001176894A (ja) * 1999-12-20 2001-06-29 Nec Yamagata Ltd ダイボンディング用接着ペースト塗布方法及びその装置
JP2006147643A (ja) * 2004-11-16 2006-06-08 Seiko Epson Corp 電子素子の接合方法、電子素子の実装方法、電子装置の製造方法、回路基板、電子機器
JP2007173768A (ja) * 2005-11-24 2007-07-05 Mitsubishi Materials Corp Ａｕ−Ｓｎ合金はんだペーストを用いた基板と素子の接合方法
JP2009164203A (ja) * 2007-12-28 2009-07-23 Mitsubishi Electric Corp 半導体装置および半導体装置の製造方法

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011249802A (ja) * 2010-05-27 2011-12-08 Semikron Elektronik Gmbh & Co Kg 低温加圧焼結接合を含む２個の接合素子の構成体およびその製造方法
JP2016081943A (ja) * 2014-10-09 2016-05-16 三菱電機株式会社 半導体装置及びその製造方法
JPWO2017013808A1 (ja) * 2015-07-23 2017-10-19 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US10262927B2 (en) 2015-07-23 2019-04-16 Renesas Electronics Corporation Semiconductor device and manufacturing method thereof
KR20180059913A (ko) * 2015-10-08 2018-06-05 헤레우스 도이칠란트 게엠베하 운트 코. 카게 기판 배열체를 생산하는 방법, 기판 배열체, 및 기판 배열체를 전자 부품에 연결하는 방법
JP2018530166A (ja) * 2015-10-08 2018-10-11 ヘラエウス ドイチュラント ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニー コマンディトゲゼルシャフト 基板アセンブリの製造方法、基板アセンブリ、及び基板アセンブリを電子部品に取り付ける方法
KR102085191B1 (ko) * 2015-10-08 2020-03-05 헤레우스 도이칠란트 게엠베하 운트 코. 카게 기판 배열체를 생산하는 방법, 기판 배열체, 및 기판 배열체를 전자 부품에 연결하는 방법
JP2020115520A (ja) * 2019-01-18 2020-07-30 三菱電機株式会社 電力用半導体装置の製造方法、電力用半導体装置および電力変換装置
JP7034105B2 (ja) 2019-01-18 2022-03-11 三菱電機株式会社 電力用半導体装置の製造方法、電力用半導体装置および電力変換装置

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