JP2010521817A5 - - Google Patents

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Publication number
JP2010521817A5
JP2010521817A5 JP2009553665A JP2009553665A JP2010521817A5 JP 2010521817 A5 JP2010521817 A5 JP 2010521817A5 JP 2009553665 A JP2009553665 A JP 2009553665A JP 2009553665 A JP2009553665 A JP 2009553665A JP 2010521817 A5 JP2010521817 A5 JP 2010521817A5
Authority
JP
Japan
Prior art keywords
forming
gate electrode
layer
manufacturing
semiconductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009553665A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010521817A (ja
Filing date
Publication date
Priority claimed from US11/685,297 external-priority patent/US8803217B2/en
Application filed filed Critical
Publication of JP2010521817A publication Critical patent/JP2010521817A/ja
Publication of JP2010521817A5 publication Critical patent/JP2010521817A5/ja
Pending legal-status Critical Current

Links

JP2009553665A 2007-03-13 2008-02-11 複数のチャネル領域を互いに異なる高さに備える電子デバイス、およびその製造方法 Pending JP2010521817A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/685,297 US8803217B2 (en) 2007-03-13 2007-03-13 Process of forming an electronic device including a control gate electrode, a semiconductor layer, and a select gate electrode
PCT/US2008/053569 WO2008112370A1 (en) 2007-03-13 2008-02-11 Electronic device including channel regions lying at different elevations and processes of forming the same

Publications (2)

Publication Number Publication Date
JP2010521817A JP2010521817A (ja) 2010-06-24
JP2010521817A5 true JP2010521817A5 (enExample) 2011-03-31

Family

ID=39759885

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009553665A Pending JP2010521817A (ja) 2007-03-13 2008-02-11 複数のチャネル領域を互いに異なる高さに備える電子デバイス、およびその製造方法

Country Status (7)

Country Link
US (1) US8803217B2 (enExample)
EP (1) EP2126977A4 (enExample)
JP (1) JP2010521817A (enExample)
KR (1) KR20090128413A (enExample)
CN (1) CN101647122B (enExample)
TW (1) TWI424571B (enExample)
WO (1) WO2008112370A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009010104A (ja) * 2007-06-27 2009-01-15 Renesas Technology Corp 半導体装置およびその製造方法
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US20120074485A1 (en) * 2009-12-30 2012-03-29 Hynix Semiconductor Inc. Nonvolatile Memory Device and Manufacturing Method Thereof
US9484261B2 (en) * 2013-07-05 2016-11-01 Silicon Storage Technology, Inc. Formation of self-aligned source for split-gate non-volatile memory cell
JP6297430B2 (ja) * 2014-06-30 2018-03-20 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US9356106B2 (en) 2014-09-04 2016-05-31 Freescale Semiconductor, Inc. Method to form self-aligned high density nanocrystals
US9472645B1 (en) 2015-06-08 2016-10-18 Taiwan Semiconductor Manufacturing Co., Ltd. Dual control gate spacer structure for embedded flash memory
US9960176B2 (en) 2015-11-05 2018-05-01 Taiwan Semiconductor Manufacturing Co., Ltd. Nitride-free spacer or oxide spacer for embedded flash memory
US9929167B2 (en) 2016-07-13 2018-03-27 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US11309324B2 (en) * 2020-07-28 2022-04-19 Globalfoundries Singapore Pte. Ltd. Compact memory cell with a shared conductive word line and methods of making such a memory cell
US11437392B2 (en) * 2020-07-28 2022-09-06 Globalfoundries Singapore Pte. Ltd. Compact memory cell with a shared conductive select gate and methods of making such a memory cell
CN114664836B (zh) * 2022-03-11 2025-11-21 上海华虹宏力半导体制造有限公司 分栅式存储器及其制造方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60246677A (ja) 1984-05-22 1985-12-06 Seiko Instr & Electronics Ltd 不揮発性半導体メモリ
US5780341A (en) * 1996-12-06 1998-07-14 Halo Lsi Design & Device Technology, Inc. Low voltage EEPROM/NVRAM transistors and making method
US5824584A (en) * 1997-06-16 1998-10-20 Motorola, Inc. Method of making and accessing split gate memory device
JP3303789B2 (ja) 1998-09-01 2002-07-22 日本電気株式会社 フラッシュメモリ、その書き込み・消去方法
TW546840B (en) 2001-07-27 2003-08-11 Hitachi Ltd Non-volatile semiconductor memory device
JP3993438B2 (ja) 2002-01-25 2007-10-17 株式会社ルネサステクノロジ 半導体装置
US6570213B1 (en) * 2002-02-08 2003-05-27 Silicon Based Technology Corp. Self-aligned split-gate flash memory cell and its contactless NOR-type memory array
US6713811B2 (en) * 2002-05-21 2004-03-30 Taiwan Semiconductor Manufacturing Company Split gate flash with strong source side injection and method of fabrication thereof
US6828618B2 (en) * 2002-10-30 2004-12-07 Freescale Semiconductor, Inc. Split-gate thin-film storage NVM cell
US6706599B1 (en) 2003-03-20 2004-03-16 Motorola, Inc. Multi-bit non-volatile memory device and method therefor
US6939767B2 (en) * 2003-11-19 2005-09-06 Freescale Semiconductor, Inc. Multi-bit non-volatile integrated circuit memory and method therefor
US7301197B2 (en) * 2004-09-21 2007-11-27 Atmel Corporation Non-volatile nanocrystal memory transistors using low voltage impact ionization
US7119396B2 (en) * 2004-10-08 2006-10-10 Silicon Storage Technology, Inc. NROM device
US7060594B2 (en) * 2004-10-19 2006-06-13 Macronix International Co., Ltd. Memory device and method of manufacturing including deuterated oxynitride charge trapping structure
KR100632461B1 (ko) * 2005-02-03 2006-10-11 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조 방법
US7112490B1 (en) * 2005-07-25 2006-09-26 Freescale Semiconductor, Inc. Hot carrier injection programmable structure including discontinuous storage elements and spacer control gates in a trench
US7479429B2 (en) * 2007-01-31 2009-01-20 Freescale Semiconductor, Inc. Split game memory cell method

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