JP2010510615A5 - - Google Patents
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- Publication number
- JP2010510615A5 JP2010510615A5 JP2009537251A JP2009537251A JP2010510615A5 JP 2010510615 A5 JP2010510615 A5 JP 2010510615A5 JP 2009537251 A JP2009537251 A JP 2009537251A JP 2009537251 A JP2009537251 A JP 2009537251A JP 2010510615 A5 JP2010510615 A5 JP 2010510615A5
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- coupled
- supply voltage
- wwl0
- word line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims 2
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/561,206 | 2006-11-17 | ||
| US11/561,206 US7440313B2 (en) | 2006-11-17 | 2006-11-17 | Two-port SRAM having improved write operation |
| PCT/US2007/079709 WO2008063741A2 (en) | 2006-11-17 | 2007-09-27 | Two-port sram having improved write operation |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013203039A Division JP2013257937A (ja) | 2006-11-17 | 2013-09-30 | 改良形書込み動作を行う2ポートsramとその動作方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010510615A JP2010510615A (ja) | 2010-04-02 |
| JP2010510615A5 true JP2010510615A5 (enExample) | 2010-11-11 |
| JP5675105B2 JP5675105B2 (ja) | 2015-02-25 |
Family
ID=39416754
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009537251A Expired - Fee Related JP5675105B2 (ja) | 2006-11-17 | 2007-09-27 | 改良形書込み動作を行う2ポートsram |
| JP2013203039A Pending JP2013257937A (ja) | 2006-11-17 | 2013-09-30 | 改良形書込み動作を行う2ポートsramとその動作方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013203039A Pending JP2013257937A (ja) | 2006-11-17 | 2013-09-30 | 改良形書込み動作を行う2ポートsramとその動作方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7440313B2 (enExample) |
| JP (2) | JP5675105B2 (enExample) |
| CN (1) | CN101529521B (enExample) |
| TW (1) | TW200823901A (enExample) |
| WO (1) | WO2008063741A2 (enExample) |
Families Citing this family (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4865360B2 (ja) * | 2006-03-01 | 2012-02-01 | パナソニック株式会社 | 半導体記憶装置 |
| US7609541B2 (en) * | 2006-12-27 | 2009-10-27 | Freescale Semiconductor, Inc. | Memory cells with lower power consumption during a write operation |
| US7660150B2 (en) * | 2007-12-31 | 2010-02-09 | Texas Instruments Incorporated | Memory cell having improved write stability |
| JP2009272023A (ja) * | 2008-05-12 | 2009-11-19 | Toshiba Corp | 半導体記憶装置 |
| US7864600B2 (en) * | 2008-06-19 | 2011-01-04 | Texas Instruments Incorporated | Memory cell employing reduced voltage |
| JP5260180B2 (ja) * | 2008-08-20 | 2013-08-14 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| US7835175B2 (en) * | 2008-10-13 | 2010-11-16 | Mediatek Inc. | Static random access memories and access methods thereof |
| US7852661B2 (en) * | 2008-10-22 | 2010-12-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Write-assist SRAM cell |
| JP4857367B2 (ja) * | 2009-07-06 | 2012-01-18 | 株式会社沖データ | 駆動回路及び画像形成装置 |
| US8432724B2 (en) * | 2010-04-02 | 2013-04-30 | Altera Corporation | Memory elements with soft error upset immunity |
| CN101877243B (zh) * | 2010-04-22 | 2015-09-30 | 上海华虹宏力半导体制造有限公司 | 静态随机存取存储器 |
| CN101819815B (zh) * | 2010-04-29 | 2015-05-20 | 上海华虹宏力半导体制造有限公司 | 一种消除读取干扰的静态随机存储器 |
| TWI464745B (zh) * | 2010-07-06 | 2014-12-11 | Faraday Tech Corp | 具有由資料控制之電源供應的靜態隨機存取記憶體 |
| US8824230B2 (en) * | 2011-09-30 | 2014-09-02 | Qualcomm Incorporated | Method and apparatus of reducing leakage power in multiple port SRAM memory cell |
| TWI480871B (zh) * | 2012-02-22 | 2015-04-11 | Nat Univ Chung Hsing | Static random access memory |
| US9111600B2 (en) * | 2012-03-30 | 2015-08-18 | Intel Corporation | Memory cell with improved write margin |
| US9153304B2 (en) * | 2012-06-28 | 2015-10-06 | Jaydeep P. Kulkarni | Apparatus for reducing write minimum supply voltage for memory |
| US8817528B2 (en) * | 2012-08-17 | 2014-08-26 | Globalfoundries Inc. | Device comprising a plurality of static random access memory cells and method of operation thereof |
| US8804437B2 (en) * | 2012-09-25 | 2014-08-12 | Nvidia Corporation | Column select multiplexer and method for static random-access memory and computer memory subsystem employing the same |
| US8913456B2 (en) | 2012-10-26 | 2014-12-16 | Freescale Semiconductor, Inc. | SRAM with improved write operation |
| US9224453B2 (en) * | 2013-03-13 | 2015-12-29 | Qualcomm Incorporated | Write-assisted memory with enhanced speed |
| CN105340018B (zh) * | 2013-07-02 | 2018-05-08 | 株式会社索思未来 | 半导体存储装置 |
| US9281056B2 (en) * | 2014-06-18 | 2016-03-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Static random access memory and method of using the same |
| US9336864B2 (en) * | 2014-08-29 | 2016-05-10 | Qualcomm Incorporated | Silicon germanium read port for a static random access memory register file |
| US9230637B1 (en) | 2014-09-09 | 2016-01-05 | Globalfoundries Inc. | SRAM circuit with increased write margin |
| US9484084B2 (en) * | 2015-02-13 | 2016-11-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Pulling devices for driving data lines |
| US10026456B2 (en) | 2015-02-23 | 2018-07-17 | Qualcomm Incorporated | Bitline positive boost write-assist circuits for memory bit cells employing a P-type Field-Effect transistor (PFET) write port(s), and related systems and methods |
| US9741452B2 (en) | 2015-02-23 | 2017-08-22 | Qualcomm Incorporated | Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods |
| CN106445831A (zh) * | 2015-08-11 | 2017-02-22 | 深圳市中兴微电子技术有限公司 | 一种存储单元和处理系统 |
| US11170844B1 (en) * | 2020-07-07 | 2021-11-09 | Aril Computer Corporation | Ultra-low supply-voltage static random-access memory (SRAM) with 8-transistor cell with P and N pass gates to same bit lines |
Family Cites Families (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53135528A (en) * | 1977-04-30 | 1978-11-27 | Sharp Corp | C.mos static random access memory |
| JPS5564686A (en) * | 1978-11-08 | 1980-05-15 | Nec Corp | Memory unit |
| JPS62217494A (ja) * | 1986-03-18 | 1987-09-24 | Fujitsu Ltd | 半導体記憶装置 |
| JPH01166391A (ja) * | 1987-12-23 | 1989-06-30 | Toshiba Corp | スタティック型ランダムアクセスメモリ |
| JP2618422B2 (ja) * | 1988-02-08 | 1997-06-11 | 富士通株式会社 | 半導体記憶装置 |
| JPH01264690A (ja) * | 1988-04-15 | 1989-10-20 | Nippon Telegr & Teleph Corp <Ntt> | マルチポートメモリ |
| US5289432A (en) * | 1991-04-24 | 1994-02-22 | International Business Machines Corporation | Dual-port static random access memory cell |
| JP3153568B2 (ja) * | 1991-07-03 | 2001-04-09 | 株式会社東芝 | マルチポートram用メモリセル及びマルチポートram |
| US5396469A (en) * | 1994-03-31 | 1995-03-07 | Hewlett-Packard Company | SRAM memory requiring reduced voltage swing during write |
| JPH0863972A (ja) * | 1994-08-18 | 1996-03-08 | Kawasaki Steel Corp | 半導体記憶装置 |
| US5453950A (en) | 1995-01-24 | 1995-09-26 | Cypress Semiconductor Corp. | Five transistor memory cell with shared power line |
| JPH0945081A (ja) * | 1995-07-26 | 1997-02-14 | Toshiba Microelectron Corp | スタティック型メモリ |
| KR100200765B1 (ko) * | 1996-12-04 | 1999-06-15 | 윤종용 | 레이아웃 면적이 감소되는 sram 셀 |
| DE69727939D1 (de) | 1997-11-28 | 2004-04-08 | St Microelectronics Srl | RAM-Speicherzelle mit niedriger Leistungsaufnahme und einer einzigen Bitleitung |
| DE69727581D1 (de) * | 1997-11-28 | 2004-03-18 | St Microelectronics Srl | RAM-Speicherzelle mit niedriger Leistungsaufnahme |
| JP2000228087A (ja) * | 1999-02-04 | 2000-08-15 | United Microelectronics Corp | デュアルポートram |
| US6222777B1 (en) * | 1999-04-09 | 2001-04-24 | Sun Microsystems, Inc. | Output circuit for alternating multiple bit line per column memory architecture |
| US6205049B1 (en) | 1999-08-26 | 2001-03-20 | Integrated Device Technology, Inc. | Five-transistor SRAM cell |
| US6118689A (en) * | 1999-10-27 | 2000-09-12 | Kuo; James B. | Two-port 6T CMOS SRAM cell structure for low-voltage VLSI SRAM with single-bit-line simultaneous read-and-write access (SBLSRWA) capability |
| US6552923B2 (en) * | 2000-06-13 | 2003-04-22 | Texas Instruments Incorporated | SRAM with write-back on read |
| JP2003007068A (ja) * | 2001-06-25 | 2003-01-10 | Internatl Business Mach Corp <Ibm> | 半導体メモリー及び制御方法 |
| JP3712367B2 (ja) * | 2001-07-30 | 2005-11-02 | Necマイクロシステム株式会社 | 半導体記憶装置 |
| JP2003123479A (ja) * | 2001-10-12 | 2003-04-25 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| US7085175B2 (en) * | 2004-11-18 | 2006-08-01 | Freescale Semiconductor, Inc. | Word line driver circuit for a static random access memory and method therefor |
| JP4954626B2 (ja) * | 2005-07-29 | 2012-06-20 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US7239558B1 (en) * | 2005-09-26 | 2007-07-03 | National Semiconductor Corporation | Method of hot electron injection programming of a non-volatile memory (NVM) cell array in a single cycle |
| US7336533B2 (en) * | 2006-01-23 | 2008-02-26 | Freescale Semiconductor, Inc. | Electronic device and method for operating a memory circuit |
| FR2927722A1 (fr) * | 2008-02-18 | 2009-08-21 | Commissariat Energie Atomique | Cellule memoire sram a transistor double grille dotee de moyens pour ameliorer la marge en ecriture |
-
2006
- 2006-11-17 US US11/561,206 patent/US7440313B2/en not_active Expired - Fee Related
-
2007
- 2007-09-27 CN CN2007800391696A patent/CN101529521B/zh not_active Expired - Fee Related
- 2007-09-27 WO PCT/US2007/079709 patent/WO2008063741A2/en not_active Ceased
- 2007-09-27 JP JP2009537251A patent/JP5675105B2/ja not_active Expired - Fee Related
- 2007-10-11 TW TW096138041A patent/TW200823901A/zh unknown
-
2013
- 2013-09-30 JP JP2013203039A patent/JP2013257937A/ja active Pending
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