DE69727939D1 - RAM-Speicherzelle mit niedriger Leistungsaufnahme und einer einzigen Bitleitung - Google Patents
RAM-Speicherzelle mit niedriger Leistungsaufnahme und einer einzigen BitleitungInfo
- Publication number
- DE69727939D1 DE69727939D1 DE69727939T DE69727939T DE69727939D1 DE 69727939 D1 DE69727939 D1 DE 69727939D1 DE 69727939 T DE69727939 T DE 69727939T DE 69727939 T DE69727939 T DE 69727939T DE 69727939 D1 DE69727939 D1 DE 69727939D1
- Authority
- DE
- Germany
- Prior art keywords
- memory cell
- power consumption
- bit line
- low power
- single bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP97120944A EP0920027B1 (de) | 1997-11-28 | 1997-11-28 | RAM-Speicherzelle mit niedriger Leistungsaufnahme und einer einzigen Bitleitung |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69727939D1 true DE69727939D1 (de) | 2004-04-08 |
Family
ID=8227705
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69727939T Expired - Lifetime DE69727939D1 (de) | 1997-11-28 | 1997-11-28 | RAM-Speicherzelle mit niedriger Leistungsaufnahme und einer einzigen Bitleitung |
Country Status (3)
Country | Link |
---|---|
US (3) | US6212094B1 (de) |
EP (1) | EP0920027B1 (de) |
DE (1) | DE69727939D1 (de) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2808114B1 (fr) * | 1999-07-09 | 2002-07-12 | Suisse Electronique Microtech | Memoire ram |
CA2299991A1 (en) * | 2000-03-03 | 2001-09-03 | Mosaid Technologies Incorporated | A memory cell for embedded memories |
US6580657B2 (en) * | 2001-01-04 | 2003-06-17 | International Business Machines Corporation | Low-power organic light emitting diode pixel circuit |
GB2384092A (en) * | 2002-01-14 | 2003-07-16 | Zarlink Semiconductor Ab | Low power static random access memory |
US10201760B2 (en) * | 2002-12-10 | 2019-02-12 | Sony Interactive Entertainment America Llc | System and method for compressing video based on detected intraframe motion |
US6804143B1 (en) | 2003-04-02 | 2004-10-12 | Cogent Chipware Inc. | Write-assisted SRAM bit cell |
US7042776B2 (en) * | 2004-02-18 | 2006-05-09 | International Business Machines Corporation | Method and circuit for dynamic read margin control of a memory array |
JP4287768B2 (ja) * | 2004-03-16 | 2009-07-01 | パナソニック株式会社 | 半導体記憶装置 |
US7307873B2 (en) * | 2006-02-21 | 2007-12-11 | M2000 Sa. | Memory with five-transistor bit cells and associated control circuit |
US7440312B2 (en) * | 2006-10-02 | 2008-10-21 | Analog Devices, Inc. | Memory write timing system |
US7440313B2 (en) * | 2006-11-17 | 2008-10-21 | Freescale Semiconductor, Inc. | Two-port SRAM having improved write operation |
US7609541B2 (en) * | 2006-12-27 | 2009-10-27 | Freescale Semiconductor, Inc. | Memory cells with lower power consumption during a write operation |
US7816740B2 (en) * | 2008-01-04 | 2010-10-19 | Texas Instruments Incorporated | Memory cell layout structure with outer bitline |
US8593861B2 (en) | 2011-10-10 | 2013-11-26 | International Business Machines Corporation | Asymmetric memory cells |
CN103873495B (zh) * | 2012-12-10 | 2019-01-15 | 联想(北京)有限公司 | 文件同步的方法和使用该方法的电子设备 |
WO2015102569A2 (en) * | 2013-12-30 | 2015-07-09 | The Regents Of The University Of Michigan | Static random access memory cell having improved write margin for use in ultra-low power application |
US9171586B2 (en) | 2014-02-14 | 2015-10-27 | Oracle International Corporation | Dual memory bitcell with shared virtual ground |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6126997A (ja) * | 1984-07-18 | 1986-02-06 | Toshiba Corp | 半導体記憶装置 |
JPH0834059B2 (ja) * | 1990-08-31 | 1996-03-29 | 三菱電機株式会社 | 半導体記憶装置 |
JP3230848B2 (ja) * | 1991-09-20 | 2001-11-19 | 三菱電機株式会社 | スタティックランダムアクセスメモリ装置 |
JPH06103781A (ja) * | 1992-09-21 | 1994-04-15 | Sharp Corp | メモリセル回路 |
EP0718847B1 (de) * | 1994-12-22 | 2003-06-25 | Cypress Semiconductor Corporation | Einseitige Zweitorspeicherzelle |
US5894434A (en) * | 1995-12-22 | 1999-04-13 | Texas Instruments Incorporated | MOS static memory array |
JP2944538B2 (ja) * | 1996-10-24 | 1999-09-06 | 日本電気アイシーマイコンシステム株式会社 | 半導体記憶回路 |
US5831896A (en) * | 1996-12-17 | 1998-11-03 | International Business Machines Corporation | Memory cell |
US6011711A (en) * | 1996-12-31 | 2000-01-04 | Stmicroelectronics, Inc. | SRAM cell with p-channel pull-up sources connected to bit lines |
US5808933A (en) * | 1997-03-28 | 1998-09-15 | International Business Machines Corporation | Zero-write-cycle memory cell apparatus |
JPH1139877A (ja) * | 1997-07-15 | 1999-02-12 | Mitsubishi Electric Corp | 半導体記憶装置 |
US5986923A (en) * | 1998-05-06 | 1999-11-16 | Hewlett-Packard Company | Method and apparatus for improving read/write stability of a single-port SRAM cell |
-
1997
- 1997-11-28 EP EP97120944A patent/EP0920027B1/de not_active Expired - Lifetime
- 1997-11-28 DE DE69727939T patent/DE69727939D1/de not_active Expired - Lifetime
-
1998
- 1998-11-25 US US09/200,075 patent/US6212094B1/en not_active Expired - Lifetime
-
2001
- 2001-01-16 US US09/761,272 patent/US6459611B2/en not_active Expired - Lifetime
-
2002
- 2002-09-24 US US10/253,217 patent/US20030026150A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
EP0920027A1 (de) | 1999-06-02 |
EP0920027B1 (de) | 2004-03-03 |
US6212094B1 (en) | 2001-04-03 |
US20030026150A1 (en) | 2003-02-06 |
US20010006475A1 (en) | 2001-07-05 |
US6459611B2 (en) | 2002-10-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |