DE69930201D1 - A/D-Wandler mit Stromsparschaltung und dessen Steuerungsverfahren - Google Patents

A/D-Wandler mit Stromsparschaltung und dessen Steuerungsverfahren

Info

Publication number
DE69930201D1
DE69930201D1 DE69930201T DE69930201T DE69930201D1 DE 69930201 D1 DE69930201 D1 DE 69930201D1 DE 69930201 T DE69930201 T DE 69930201T DE 69930201 T DE69930201 T DE 69930201T DE 69930201 D1 DE69930201 D1 DE 69930201D1
Authority
DE
Germany
Prior art keywords
converter
control method
power saving
saving circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69930201T
Other languages
English (en)
Other versions
DE69930201T2 (de
Inventor
Chikashi Yoshinaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Application granted granted Critical
Publication of DE69930201D1 publication Critical patent/DE69930201D1/de
Publication of DE69930201T2 publication Critical patent/DE69930201T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/002Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/38Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/46Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
    • H03M1/466Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors
    • H03M1/468Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors in which the input S/H circuit is merged with the feedback DAC array
DE69930201T 1999-01-08 1999-12-24 AD-Wandler mit einem Stromsparschaltkreis und sein Regelverfahren Expired - Fee Related DE69930201T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP282899 1999-01-08
JP00282899A JP3211793B2 (ja) 1999-01-08 1999-01-08 Ad変換器

Publications (2)

Publication Number Publication Date
DE69930201D1 true DE69930201D1 (de) 2006-05-04
DE69930201T2 DE69930201T2 (de) 2006-11-23

Family

ID=11540290

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69930201T Expired - Fee Related DE69930201T2 (de) 1999-01-08 1999-12-24 AD-Wandler mit einem Stromsparschaltkreis und sein Regelverfahren

Country Status (6)

Country Link
US (1) US6433727B1 (de)
EP (1) EP1018806B1 (de)
JP (1) JP3211793B2 (de)
KR (1) KR100320886B1 (de)
CN (1) CN1166065C (de)
DE (1) DE69930201T2 (de)

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JP3415593B2 (ja) * 2001-02-06 2003-06-09 エヌイーシーマイクロシステム株式会社 A/d変換器
ITRM20010407A1 (it) * 2001-07-10 2003-01-10 St Microelectronics Srl Convertitore analogico/digitale ad alta velocita', alta risoluzione ebasso consumo con ingresso single-ended.
JP2006086981A (ja) * 2004-09-17 2006-03-30 Fujitsu Ltd スイッチトキャパシタ回路およびパイプラインa/d変換回路
EP1655842A1 (de) * 2004-11-03 2006-05-10 Dialog Semiconductor GmbH Analog-Digital-Wandler mit domino-asynchroner schrittweiser Annäherung
US7023372B1 (en) * 2005-02-09 2006-04-04 Analog Devices, Inc. Method and apparatus for segmented, switched analog/digital converter
JP4690105B2 (ja) * 2005-04-26 2011-06-01 パナソニック株式会社 逐次比較型a/dコンバータ
CN100592634C (zh) * 2005-06-23 2010-02-24 中国科学院电子学研究所 信号幅度区间划分的电荷重分配逐次逼近a/d转换器
KR100660886B1 (ko) 2005-11-08 2006-12-26 삼성전자주식회사 커패시터와 op 앰프를 이용하는 디지털 아날로그 컨버터
JP4652214B2 (ja) 2005-11-18 2011-03-16 富士通セミコンダクター株式会社 アナログデジタル変換器
KR100782324B1 (ko) * 2006-02-03 2007-12-06 삼성전자주식회사 씨모스 이미지 센서의 아날로그 디지털 변환기 및 아날로그디지털 변환 방법
JP4803729B2 (ja) * 2006-03-14 2011-10-26 ルネサスエレクトロニクス株式会社 半導体集積回路
JP4853186B2 (ja) 2006-08-31 2012-01-11 ミツミ電機株式会社 アナログ−ディジタル変換装置
US7446690B2 (en) * 2006-11-06 2008-11-04 Atmel Corporation Apparatus and method for implementing an analog-to-digital converter in programmable logic devices
KR100801962B1 (ko) 2006-11-30 2008-02-12 한국전자통신연구원 병합 캐패시터 스위칭 구조의 멀티-비트 파이프라인아날로그-디지털 변환기
KR100850747B1 (ko) 2006-12-06 2008-08-06 한국전자통신연구원 알고리즘 아날로그-디지털 변환기
TWI342125B (en) * 2006-12-29 2011-05-11 Elan Microelectronics Corp Signal converting apparatus with built-in self test
DE102007043145B4 (de) * 2007-09-11 2011-12-08 Texas Instruments Deutschland Gmbh Verfahren und Vorrichtung zur Steuerung eines Analog-Digital-Wandlers mit sukzessiver Approximation
US7675452B2 (en) * 2008-05-01 2010-03-09 Analog Devices, Inc. Successive approximation register analog to digital converter with improved immunity to time varying noise
WO2012024507A2 (en) * 2010-08-18 2012-02-23 Analog Devices, Inc. Charge sharing analog computation circuitry and applications
US8188753B2 (en) 2009-02-18 2012-05-29 Analog Devices, Inc. Analog computation
JP5310222B2 (ja) * 2009-04-20 2013-10-09 富士通株式会社 電荷分配型デジタル・アナログ変換器及びそれを有する逐次比較型アナログ・デジタル変換器
US7812757B1 (en) * 2009-06-12 2010-10-12 Hong Kong Applied Science And Technology Research Institute Co., Ltd. Hybrid analog-to-digital converter (ADC) with binary-weighted-capacitor sampling array and a sub-sampling charge-redistributing array for sub-voltage generation
US7852254B1 (en) * 2009-06-23 2010-12-14 Mstar Semiconductor, Inc. 1-bit cell circuit used in a pipelined analog to digital converter
US8581770B2 (en) * 2011-05-04 2013-11-12 Texas Instruments Incorporated Zero-power sampling SAR ADC circuit and method
EP2719075B8 (de) 2011-06-06 2021-09-15 Analog Devices, Inc. Zeitbereichsfilter mit ladungsteilung
CN103152049A (zh) * 2013-02-26 2013-06-12 上海宏力半导体制造有限公司 一种逐次逼近寄存器型模数转换器
CN105281772B (zh) * 2014-07-24 2018-08-31 上海明波通信技术股份有限公司 逐次逼近型模数转换装置
MY184557A (en) * 2014-10-10 2021-04-02 Mimos Berhad A successive approximation analog to digital converter and method for calibrating thereof
WO2017158996A1 (ja) * 2016-03-16 2017-09-21 ソニー株式会社 アナログデジタル変換器、電子装置およびアナログデジタル変換器の制御方法
JP2017192099A (ja) * 2016-04-15 2017-10-19 ローム株式会社 逐次比較型a/dコンバータ
US10998914B2 (en) 2016-06-10 2021-05-04 Analog Devices International Unlimited Company Multi-stage conversion analog-to-digital converter
CN108476024B (zh) * 2016-09-23 2022-01-21 深圳市汇顶科技股份有限公司 一种dac电容阵列、sar型模数转换器及降低功耗的方法
US11476863B2 (en) 2019-11-08 2022-10-18 Analog Devices International Unlimited Company Signal dependent reconfigurable data acquisition system
CN112350729A (zh) * 2020-11-06 2021-02-09 清华大学 模数转换电路

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US4200863A (en) * 1977-10-03 1980-04-29 The Regents Of The University Of California Weighted capacitor analog/digital converting apparatus and method
JPS5851612A (ja) * 1981-09-22 1983-03-26 Nec Corp 比較回路
JPS6169217A (ja) * 1984-09-11 1986-04-09 Oki Electric Ind Co Ltd アナログ・デイジタル変換器
FR2604840B1 (fr) * 1986-10-07 1988-12-09 Efcis Convertisseur analogique-numerique differentiel a capacites commutees
JP2577387B2 (ja) 1987-07-08 1997-01-29 株式会社東芝 逐次比較型ad変換器
US4803462A (en) * 1987-08-11 1989-02-07 Texas Instruments Incorporated Charge redistribution A/D converter with increased common mode rejection
US4831381A (en) * 1987-08-11 1989-05-16 Texas Instruments Incorporated Charge redistribution A/D converter with reduced small signal error
EP0662757A2 (de) * 1994-01-05 1995-07-12 Texas Instruments Incorporated Analog-Digitalwandlungsystem mit automatischer Versatznachführungschaltung und Korrektur und Betriebsverfahren
US5581252A (en) * 1994-10-13 1996-12-03 Linear Technology Corporation Analog-to-digital conversion using comparator coupled capacitor digital-to-analog converters
US5684487A (en) * 1995-06-05 1997-11-04 Analog Devices, Incorporated A/D converter with charge-redistribution DAC and split summation of main and correcting DAC outputs

Also Published As

Publication number Publication date
JP3211793B2 (ja) 2001-09-25
CN1166065C (zh) 2004-09-08
EP1018806A3 (de) 2003-03-05
US6433727B1 (en) 2002-08-13
EP1018806B1 (de) 2006-03-08
KR100320886B1 (ko) 2002-02-06
JP2000201077A (ja) 2000-07-18
EP1018806A2 (de) 2000-07-12
CN1260639A (zh) 2000-07-19
DE69930201T2 (de) 2006-11-23
KR20000071230A (ko) 2000-11-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee