JPS53135528A - C.mos static random access memory - Google Patents

C.mos static random access memory

Info

Publication number
JPS53135528A
JPS53135528A JP5153677A JP5153677A JPS53135528A JP S53135528 A JPS53135528 A JP S53135528A JP 5153677 A JP5153677 A JP 5153677A JP 5153677 A JP5153677 A JP 5153677A JP S53135528 A JPS53135528 A JP S53135528A
Authority
JP
Japan
Prior art keywords
random access
access memory
static random
mos static
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5153677A
Other languages
Japanese (ja)
Inventor
Toshio Mitsumoto
Setsushi Kamuro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP5153677A priority Critical patent/JPS53135528A/en
Publication of JPS53135528A publication Critical patent/JPS53135528A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To increase the integration degree of the memory by giving a virtual drop to the inverse potential of the C'MOS-structure FF to secure an assured action as well as to enhance the reliability through a simple constitution by setting the supply potential to the earth potential at the writing time.
JP5153677A 1977-04-30 1977-04-30 C.mos static random access memory Pending JPS53135528A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5153677A JPS53135528A (en) 1977-04-30 1977-04-30 C.mos static random access memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5153677A JPS53135528A (en) 1977-04-30 1977-04-30 C.mos static random access memory

Publications (1)

Publication Number Publication Date
JPS53135528A true JPS53135528A (en) 1978-11-27

Family

ID=12889737

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5153677A Pending JPS53135528A (en) 1977-04-30 1977-04-30 C.mos static random access memory

Country Status (1)

Country Link
JP (1) JPS53135528A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5564686A (en) * 1978-11-08 1980-05-15 Nec Corp Memory unit
JP2013524396A (en) * 2010-04-02 2013-06-17 アルテラ コーポレイション Memory elements with soft error upset insensitivity
JP2013257937A (en) * 2006-11-17 2013-12-26 Freescale Semiconductor Inc Two-port sram performing improved write operation, and operation method thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991133A (en) * 1972-12-18 1974-08-30

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4991133A (en) * 1972-12-18 1974-08-30

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5564686A (en) * 1978-11-08 1980-05-15 Nec Corp Memory unit
JPS6161198B2 (en) * 1978-11-08 1986-12-24 Nippon Electric Co
JP2013257937A (en) * 2006-11-17 2013-12-26 Freescale Semiconductor Inc Two-port sram performing improved write operation, and operation method thereof
JP2013524396A (en) * 2010-04-02 2013-06-17 アルテラ コーポレイション Memory elements with soft error upset insensitivity

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