JP2010080689A - 半導体薄膜の形成方法及び電子デバイスの製造方法 - Google Patents
半導体薄膜の形成方法及び電子デバイスの製造方法 Download PDFInfo
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- JP2010080689A JP2010080689A JP2008247636A JP2008247636A JP2010080689A JP 2010080689 A JP2010080689 A JP 2010080689A JP 2008247636 A JP2008247636 A JP 2008247636A JP 2008247636 A JP2008247636 A JP 2008247636A JP 2010080689 A JP2010080689 A JP 2010080689A
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- 230000035945 sensitivity Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 238000003980 solgel method Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- UQMCSSLUTFUDSN-UHFFFAOYSA-N sulfanylidenegermane Chemical compound [GeH2]=S UQMCSSLUTFUDSN-UHFFFAOYSA-N 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- UURRKPRQEQXTBB-UHFFFAOYSA-N tellanylidenestannane Chemical compound [Te]=[SnH2] UURRKPRQEQXTBB-UHFFFAOYSA-N 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 150000004684 trihydrates Chemical class 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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Abstract
【解決手段】制御電極14、第1電極及び第2電極16、並びに、第1電極と第2電極16との間であって、絶縁層15を介して制御電極14と対向して設けられた、半導体薄膜から成る能動層17を備えた電子デバイスの製造方法において、半導体薄膜を、(a)無機半導体微粒子分散溶液を基体上に塗布、乾燥して、半導体微粒子層を形成した後、(b)半導体微粒子層を溶液に浸漬する各工程にて得る。
【選択図】 図1
Description
(1)低温で、簡易なプロセスにて、大面積の電子デバイスを低コストで製造することができる。
(2)可撓性を有する電子デバイスを製造することが可能である。
(3)使用する半導体微粒子によって、電子デバイスの性能や物性を制御することができる。
といった種々の利点を有している。
(a)無機半導体微粒子分散溶液を基体上に塗布、乾燥して、半導体微粒子層を形成した後、
(b)半導体微粒子層を溶液(『半導体薄膜形成用溶液』と呼ぶ場合がある)に浸漬することで半導体薄膜を得る、
各工程を有する。
(A)制御電極、
(B)第1電極及び第2電極、並びに、
(C)第1電極と第2電極との間であって、絶縁層を介して制御電極と対向して設けられた、半導体薄膜から成る能動層、
を備えた3端子型の電子デバイスの製造方法である。
(A)第1電極及び第2電極、並びに、
(B)第1電極と第2電極との間に設けられた、半導体薄膜から成る能動層、
を備えた2端子型の電子デバイスの製造方法である。
(a)無機半導体微粒子分散溶液を基体上に塗布、乾燥して、半導体微粒子層を形成した後、
(b)半導体微粒子層を溶液(半導体薄膜形成用溶液)に浸漬する、
各工程にて得る。
(イ)支持体上にゲート電極を形成した後、全面にゲート絶縁層を形成し、次いで、
(ロ)ゲート絶縁層上にソース/ドレイン電極を形成した後、
(ハ)少なくとも、ソース/ドレイン電極の間に位置するゲート絶縁層(基体に相当する)の上に、無機半導体微粒子分散溶液を塗布、乾燥して、半導体微粒子層を形成した後、半導体微粒子層を半導体薄膜形成用溶液に浸漬することで、半導体薄膜から成るチャネル形成領域を得る、
各工程から成る。尚、こうして得られたボトムゲート/ボトムコンタクト型の半導体装置(具体的には、ボトムゲート/ボトムコンタクト型電界効果トランジスタ,FETであり、より具体的には、ボトムゲート/ボトムコンタクト型薄膜トランジスタ,TFT)は、
(α)支持体上に形成されたゲート電極、
(β)ゲート電極及び支持体上に形成されたゲート絶縁層(基体に相当する)、
(γ)ゲート絶縁層上に形成されたソース/ドレイン電極、並びに、
(δ)ソース/ドレイン電極の間であってゲート絶縁層上に形成された、半導体薄膜から成るチャネル形成領域、
を備えている。
(イ)支持体上にゲート電極を形成した後、全面にゲート絶縁層を形成し、次いで、
(ロ)ゲート絶縁層(基体に相当する)の上に、無機半導体微粒子分散溶液を塗布、乾燥して、半導体微粒子層を形成した後、半導体微粒子層を半導体薄膜形成用溶液に浸漬することで、半導体薄膜から成るチャネル形成領域及びチャネル形成領域延在部を得た後、
(ハ)チャネル形成領域延在部上にソース/ドレイン電極を形成する、
各工程から成る。尚、こうして得られたボトムゲート/トップコンタクト型の半導体装置(具体的には、ボトムゲート/トップコンタクト型の電界効果トランジスタ,FETであり、より具体的には、ボトムゲート/トップコンタクト型の薄膜トランジスタ,TFT)は、
(α)支持体上に形成されたゲート電極、
(β)ゲート電極及び支持体上に形成されたゲート絶縁層(基体に相当する)、
(γ)ゲート絶縁層上に形成された、半導体薄膜から成るチャネル形成領域及びチャネル形成領域延在部、並びに、
(δ)チャネル形成領域延在部上に形成されたソース/ドレイン電極、
を備えている。
(イ)支持体上にソース/ドレイン電極を形成し、次いで、
(ロ)支持体及びソース/ドレイン電極(基体に相当する)の上に、無機半導体微粒子分散溶液を塗布、乾燥して、半導体微粒子層を形成した後、半導体微粒子層を半導体薄膜形成用溶液に浸漬することで、半導体薄膜から成るチャネル形成領域を得た後、
(ハ)全面にゲート絶縁層を形成し、次いで、チャネル形成領域の上のゲート絶縁層の部分にゲート電極を形成する、
各工程から成る。尚、こうして得られたトップゲート/ボトムコンタクト型の半導体装置(具体的には、トップゲート/ボトムコンタクト型の電界効果トランジスタ,FETであり、より具体的には、トップゲート/ボトムコンタクト型の薄膜トランジスタ,TFT)は、
(α)支持体上に形成されたソース/ドレイン電極、
(β)ソース/ドレイン電極の間の支持体(基体に相当する)の上に形成された、半導体薄膜から成るチャネル形成領域、
(γ)ソース/ドレイン電極及びチャネル形成領域上に形成されたゲート絶縁層、並びに、
(δ)ゲート絶縁層上に形成されたゲート電極、
を備えている。
(イ)支持体(基体に相当する)の上に、無機半導体微粒子分散溶液を塗布、乾燥して、半導体微粒子層を形成した後、半導体微粒子層を半導体薄膜形成用溶液に浸漬することで、半導体薄膜から成るチャネル形成領域及びチャネル形成領域延在部を得た後、
(ロ)チャネル形成領域延在部上にソース/ドレイン電極を形成し、次いで、
(ハ)全面にゲート絶縁層を形成し、次いで、チャネル形成領域の上のゲート絶縁層の部分にゲート電極を形成する、
各工程から成る。尚、こうして得られたトップゲート/トップコンタクト型の半導体装置(具体的には、トップゲート/トップコンタクト型の電界効果トランジスタ,FETであり、より具体的には、トップゲート/トップコンタクト型の薄膜トランジスタ,TFT)は、
(α)支持体(基体に相当する)の上に形成された、半導体薄膜から成るチャネル形成領域及びチャネル形成領域延在部、
(β)チャネル形成領域延在部上に形成されたソース/ドレイン電極、
(γ)ソース/ドレイン電極及びチャネル形成領域上に形成されたゲート絶縁層、並びに、
(δ)ゲート絶縁層上に形成されたゲート電極、
を備えている。
(A)制御電極14、
(B)第1電極及び第2電極16、並びに、
(C)第1電極と第2電極16との間であって、絶縁層15を介して制御電極14と対向して設けられた、半導体薄膜から成る能動層17、
を備えた3端子型の電子デバイスである。
(α)支持体11上に形成されたゲート電極14(制御電極に相当する)、
(β)ゲート電極14及び支持体11上に形成されたゲート絶縁層15(絶縁層に相当し、且つ、基体に相当する)、
(γ)ゲート絶縁層15上に形成されたソース/ドレイン電極16(第1電極及び第2電極に相当する)、並びに、
(δ)ソース/ドレイン電極16の間であってゲート絶縁層15上に形成された、半導体薄膜から成るチャネル形成領域17(能動層に相当する)、
を備えている。
Pb(Ac)2三水和物、ジフェニルエーテル(DPE)、オレイン酸、及び、トリオクチルホスフィン(TOP)を二口のナスフラスコにて混合し、真空引きしながら100゜C乃至120゜Cで2時間加熱した後、溶液の温度を室温まで下げた。
次いで、[工程−10]にて得られた溶液の10ミリリットルを二口のナスフラスコに入れて、180゜Cまで加熱した。そして、セレン(Se)をTOPに溶かした1モルの溶液の一部をこの二口のナスフラスコに注入し、迅速に混合した後、残りの溶液をこの二口のナスフラスコに一気に注入した。このとき、溶液は黒色に変化した。その後、反応温度を180゜Cから迅速に135゜Cまで降温し、そのまま10分間反応させた。その後、ナスフラスコを氷バスに入れて反応を停止させ、生成物を得た。
その後、得られた生成物を遠心管に入れ、少量のブタノールを添加した後、25゜Cにおいて、2万G、20分間の遠心分離を実行した。その後、透明な溶液を除き、トルエンにナノ粒子を再分散させ、少量のブタノールを添加した後、0゜Cにおいて、2万G、1時間の遠心分離を実行した。遠心分離後、再度、透明溶液をナノ粒子から分離し、ヘキサン/オクタン(9:1)から成る分散用溶液にナノ粒子を分散させることで無機半導体微粒子分散溶液を得た。この無機半導体微粒子分散溶液は、TOPから成る保護層が表面に形成されたPbSeから成る無機半導体微粒子が、約1重量%、分散されたヘキサン/オクタン(9:1)の溶液から成る。
先ず、支持体11の上にゲート電極14を形成する。具体的には、ガラス基板12の表面に形成されたSiO2から成る絶縁膜13上に、ゲート電極14を形成すべき部分が除去されたレジスト層(図示せず)を、リソグラフィ技術に基づき形成する。その後、密着層としてのチタン(Ti)層(図示せず)、及び、ゲート電極14としての金(Au)層を、順次、真空蒸着法にて全面に成膜し、その後、レジスト層を除去する。こうして、所謂リフト・オフ法に基づき、ゲート電極14を得ることができる。
次に、全面に、具体的には、ゲート電極14を含む支持体11(より具体的には、ガラス基板12の表面に形成された絶縁膜13)上に、ゲート絶縁層15を形成する。具体的には、SiO2から成るゲート絶縁層15を、スパッタリング法に基づきゲート電極14及び絶縁膜13上に形成する。ゲート絶縁層15の成膜を行う際、ゲート電極14の一部をハードマスクで覆うことによって、ゲート電極14の取出部(図示せず)をフォトリソグラフィ・プロセス無しで形成することができる。
その後、ゲート絶縁層15の上に、金(Au)層から成るソース/ドレイン電極16を形成する。具体的には、密着層としての厚さ約0.5nmのチタン(Ti)層(図示せず)、及び、ソース/ドレイン電極16として厚さ約25nmの金(Au)層を、順次、真空蒸着法に基づき形成する。これらの層の成膜を行う際、ゲート絶縁層15の一部をハードマスクで覆うことによって、ソース/ドレイン電極16をフォトリソグラフィ・プロセス無しで形成することができる。
次いで、少なくとも、ソース/ドレイン電極16の間に位置するゲート絶縁層15(基体に相当する)の上に、無機半導体微粒子分散溶液を塗布し、乾燥する。具体的には、[工程−30]にて得られた無機半導体微粒子分散溶液、即ち、TOPから成る保護層が表面に形成されたPbSeから成る無機半導体微粒子が分散されたヘキサン/オクタン(9:1)から成る分散用溶液を、キャスティング法に基づき、基体上(具体的には、ゲート絶縁層15及びソース/ドレイン電極16の上)に塗布し、次いで、22゜C、10分間、乾燥することで、厚さ10nm乃至20nmの半導体微粒子層を得た。
その後、半導体微粒子層を溶液(半導体薄膜形成用溶液)に浸漬することで、半導体薄膜から成るチャネル形成領域17(能動層)を得た。具体的には、半導体微粒子層を含む支持体11の全体を、22゜Cのプロパンジチオールのエチルアルコール溶液に、24時間、浸漬することで、半導体薄膜から成るチャネル形成領域17(能動層)を得た。そして、その後、22゜C、10分間、乾燥することで、半導体薄膜形成用溶液を除去した。
最後に、全面にパッシベーション膜(図示せず)を形成することで、ボトムゲート/ボトムコンタクト型のFET(具体的には、TFT)を得ることができた。
(α)支持体11上に形成されたゲート電極14(制御電極に相当する)、
(β)ゲート電極14及び支持体11上に形成されたゲート絶縁層15(絶縁層に相当し、且つ、基体に相当する)、
(γ)ゲート絶縁層15上に形成された、半導体薄膜から成るチャネル形成領域17(能動層に相当する)及びチャネル形成領域延在部18、並びに、
(δ)チャネル形成領域延在部18上に形成されたソース/ドレイン電極16(第1電極及び第2電極に相当する)、
を備えている。
先ず、実施例1の[工程−100]と同様にして、支持体11上にゲート電極14を形成した後、実施例1の[工程−110]と同様にして、全面に、具体的には、ゲート電極14を含む支持体11(より具体的には絶縁膜13)上に、ゲート絶縁層15を形成する。
次いで、実施例1の[工程−130]〜[工程−140]と同様にして、基体(具体的には、ゲート絶縁層15)の上に、無機半導体微粒子分散溶液を塗布、乾燥して、半導体微粒子層を形成した後、半導体微粒子層を溶液(半導体薄膜形成用溶液)に浸漬することで、半導体薄膜から成るチャネル形成領域17及びチャネル形成領域延在部18を形成する。
その後、チャネル形成領域延在部18の上に、チャネル形成領域17を挟むようにソース/ドレイン電極16を形成する。具体的には、実施例1の[工程−120]と同様にして、密着層としてのチタン(Ti)層(図示せず)、及び、ソース/ドレイン電極16としての金(Au)層を、順次、真空蒸着法に基づき形成する。これらの層の成膜を行う際、チャネル形成領域延在部18の一部をハードマスクで覆うことによって、ソース/ドレイン電極16をフォトリソグラフィ・プロセス無しで形成することができる。
最後に、全面にパッシベーション膜(図示せず)を形成することで、実施例2の電子デバイスを完成させることができる。
(α)支持体11上に形成されたソース/ドレイン電極16(第1電極及び第2電極に相当する)、
(β)ソース/ドレイン電極16の間の支持体11(基体に相当する)の上に形成された、半導体薄膜から成るチャネル形成領域17(能動層に相当する)、
(γ)ソース/ドレイン電極16及びチャネル形成領域17上に形成されたゲート絶縁層15(絶縁層に相当する)、並びに、
(δ)ゲート絶縁層15上に形成されたゲート電極14(制御電極に相当する)、
を備えている。
先ず、実施例1の[工程−120]と同様の方法で、支持体11(具体的には、絶縁膜13)上にソース/ドレイン電極16を形成した後、実施例1の[工程−130]〜[工程−140]と同様にして、基体(具体的には、ソース/ドレイン電極16を含む支持体11)の上に、無機半導体微粒子分散溶液を塗布、乾燥して、半導体微粒子層を形成した後、半導体微粒子層を溶液(半導体薄膜形成用溶液)に浸漬することで、半導体薄膜から成るチャネル形成領域(能動層)17を形成する。
次いで、ゲート絶縁層15を、実施例1の[工程−110]と同様の方法で形成する。その後、チャネル形成領域17の上のゲート絶縁層15の部分に、実施例1の[工程−100]と同様の方法で、ゲート電極14を形成する。
最後に、全面にパッシベーション膜(図示せず)を形成することで、実施例3の電子デバイスを完成させることができる。
(α)支持体11(基体に相当する)の上に形成された、半導体薄膜から成るチャネル形成領域17(能動層に相当する)及びチャネル形成領域延在部18、
(β)チャネル形成領域延在部18上に形成されたソース/ドレイン電極16(第1電極及び第2電極に相当する)、
(γ)ソース/ドレイン電極16及びチャネル形成領域17上に形成されたゲート絶縁層15(絶縁層に相当する)、並びに、
(δ)ゲート絶縁層15上に形成されたゲート電極14(制御電極に相当する)、
を備えている。
先ず、実施例1の[工程−130]〜[工程−140]と同様にして、基体(具体的には、支持体11)の上に、無機半導体微粒子分散溶液を塗布、乾燥して、半導体微粒子層を形成した後、半導体微粒子層を溶液(半導体薄膜形成用溶液)に浸漬することで、半導体薄膜から成るチャネル形成領域(能動層)17及びチャネル形成領域延在部18を形成する。
次いで、実施例1の[工程−120]と同様の方法で、チャネル形成領域延在部18上にソース/ドレイン電極16を形成する。
その後、ゲート絶縁層15を実施例1の[工程−110]と同様の方法で形成する。次いで、チャネル形成領域17の上のゲート絶縁層15の部分に、実施例1の[工程−100]と同様の方法でゲート電極14を形成する。
最後に、全面にパッシベーション膜(図示せず)を形成することで、実施例4の電子デバイスを完成させることができる。
(A)第1電極21及び第2電極22、並びに、
(B)第1電極21と第2電極22との間に設けられた、半導体薄膜から成る能動層23、
を備えた2端子型の電子デバイスである。そして、能動層23への光の照射によって電力が生成する。即ち、実施例6の電子デバイスは、太陽電池として機能する。あるいは又、第1電極21及び第2電極22への電圧の印加によって能動層23が発光する発光素子として機能する。
(イ)無機半導体微粒子分散溶液を基体上に塗布、乾燥して、半導体微粒子層を形成した後、
(ロ)半導体微粒子層を、半導体微粒子に吸着する官能基を2つ以上含む分子(リンカー分子と呼ぶ)を含む溶液に浸漬する、
各工程に基づき光電変換デバイスを作製することもできる。
Claims (10)
- (a)無機半導体微粒子分散溶液を基体上に塗布、乾燥して、半導体微粒子層を形成した後、
(b)半導体微粒子層を溶液に浸漬することで半導体薄膜を得る、
各工程を有する半導体薄膜の形成方法。 - 無機半導体微粒子は、セレン化鉛、セレン化錫、セレン化ゲルマニウム、セレン化カドミウム、セレン化亜鉛、硫化鉛、硫化錫、硫化ゲルマニウム、硫化カドミウム、硫化亜鉛、テルル化鉛、テルル化錫、テルル化ゲルマニウム、テルル化カドミウム、テルル化亜鉛から成る群から選択された少なくとも1種類の材料から成る請求項1に記載の半導体薄膜の形成方法。
- 溶液は、ジチオール化合物を含むアルコールから成る請求項1に記載の半導体薄膜の形成方法。
- ジチオール化合物は、アルカンジチオール、フェニルジチオール、又は、チオフェンジチオールから成る請求項3に記載の半導体薄膜の形成方法。
- (A)制御電極、
(B)第1電極及び第2電極、並びに、
(C)第1電極と第2電極との間であって、絶縁層を介して制御電極と対向して設けられた、半導体薄膜から成る能動層、
を備えており、
半導体薄膜を、
(a)無機半導体微粒子分散溶液を基体上に塗布、乾燥して、半導体微粒子層を形成した後、
(b)半導体微粒子層を溶液に浸漬する、
各工程にて得る電子デバイスの製造方法。 - 制御電極がゲート電極に相当し、第1電極及び第2電極がソース/ドレイン電極に相当し、絶縁層がゲート絶縁層に相当し、能動層がチャネル形成領域に相当する電界効果トランジスタから成る請求項5に記載の電子デバイスの製造方法。
- (A)第1電極及び第2電極、並びに、
(B)第1電極と第2電極との間に設けられた、半導体薄膜から成る能動層、
を備えており、
半導体薄膜を、
(a)無機半導体微粒子分散溶液を基体上に塗布、乾燥して、半導体微粒子層を形成した後、
(b)半導体微粒子層を溶液に浸漬する、
各工程にて得る電子デバイスの製造方法。 - 無機半導体微粒子は、セレン化鉛、セレン化錫、セレン化ゲルマニウム、セレン化カドミウム、セレン化亜鉛、硫化鉛、硫化錫、硫化ゲルマニウム、硫化カドミウム、硫化亜鉛、テルル化鉛、テルル化錫、テルル化ゲルマニウム、テルル化カドミウム、テルル化亜鉛から成る群から選択された少なくとも1種類の材料から成る請求項5又は請求項7に記載の電子デバイスの製造方法。
- 溶液は、ジチオール化合物を含むアルコールから成る請求項5又は請求項7に記載の電子デバイスの製造方法。
- ジチオール化合物は、アルカンジチオール、フェニルジチオール、又は、チオフェンジチオールから成る請求項9に記載の電子デバイスの製造方法。
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