JP2010067647A - 半導体装置の製造方法 - Google Patents
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Abstract
【解決手段】第2のレジスト膜34の第2の再配線層22が形成される領域に対応する領域Aに、露光光38を照射する。続けて、第2のレジスト膜34の第2の開口部20aが形成された領域に対応する領域Bに、露光光38を照射する。領域Aの内側に在る領域Bの第2のレジスト膜34は多重露光され、露光が深さ方向まで行き渡ることになる。現像処理により露光された第2のレジスト膜34を除去して、第2のレジスト膜34を所望の再配線パターンにパターニングする。第2の開口部20a内のレジスト膜34や、第1のビア部18aの凹部内のレジスト膜34も除去される。
【選択図】図2
Description
前記第2の再配線層形成工程は、前記第2の絶縁層上及び前記第2の開口部内部に前記第1の再配線層と電気的に接続される導電層、及び感光性膜を形成する工程と、前記感光性膜のうち前記第2の再配線層を形成する第1の領域に対して露光光を照射する工程と、前記感光性膜のうち、前記第1の領域の内側であって、前記第1の再配線層上の第2の領域に対して露光光を照射する工程と、前記露光光を照射した前記第1の領域、及び前記第2の領域の感光性膜を除去する工程と、を有することを特徴とする。
12 電極パッド
14 パッシベーション膜
16 第1の絶縁層
16a 第1の開口部
18 第1の再配線層
18a 第1のビア部
20 第2の絶縁層
20a 第2の開口部
22 第2の再配線層
22a 第2のビア部
24 保護膜
26 ポスト電極
28 外部接続端子
30 シード層
32 導電性材料
34 レジスト膜
36A マスク
36B マスク
38 光(露光光)
Claims (5)
- 表面に電極パッドが形成された半導体基板上に、前記電極パッド上に形成され前記電極パッドを露出させる第1の開口部を有する第1の絶縁層、前記第1の絶縁層上に形成され前記第1の開口部内に形成された第1のビア部を含む第1の配線層、及び前記第1の配線層上に形成され前記第1のビア部の上方が開口した第2の開口部を有する第2の絶縁層を形成する工程と、
前記第2の絶縁層及び露出された前記第1の配線層上に導電性材料を堆積し、該導電性材料上にフォトレジスト膜を堆積する工程と、
前記フォトレジスト膜の第2の配線層が形成される領域に対応する第1の領域を露光する工程と、
前記フォトレジスト膜の前記第1の領域の内側に在る第2の領域を露光する工程と、
前記フォトレジスト膜を現像して露光されたフォトレジスト膜を除去する工程と、
上層のフォトレジスト膜が除去された前記導電性材料をメッキにより成長させて、前記第1の配線層及び露出された前記第1の配線層上に、前記第1のビア部の凹部内及び前記第2の開口部内に形成された第2のビア部を含み且つ前記第1の配線層と電気的に接続された第2の配線層を形成する工程と、
を含む半導体装置の製造方法。 - 前記第2の領域は、前記フォトレジスト膜の前記第2の開口部が形成される領域に対応する領域と等しいか又は該領域の内側に在る請求項1に記載の半導体装置の製造方法。
- 前記各工程を繰り返し行い、前記半導体基板上に3層以上の多層配線層を形成する請求項1又は2に記載の半導体装置の製造方法。
- 何れかの配線層と電気的に接続されるポスト電極を形成する工程と、前記半導体基板の主面表面を覆う絶縁性の保護膜を形成する工程と、前記保護膜の一部を除去して露出させた前記ポスト電極の表面と電気的に接続される外部接続端子を形成する工程と、を更に備えた請求項1〜3の何れか1項に記載の半導体装置の製造方法。
- 表面に電極パッドが形成された半導体基板を準備する工程と、
前記半導体基板の前記表面上に第1の絶縁層を形成する工程と、
前記第1の絶縁層に、前記電極パッドを露出させる第1の開口部を形成する工程と、
前記第1の絶縁層上及び前記第1の開口部内部に、前記電極パッドと電気的に接続する第1の再配線層を形成する工程と、
前記第1の絶縁層上及び前記第1の再配線層上に第2の絶縁層を形成する工程と、
前記第2の絶縁層に、少なくとも前記第1の開口部内部に形成された前記第1の再配線層を露出させる第2の開口部を形成する工程と、
前記第2の絶縁層上及び前記第2の開口部内部に、前記第1の再配線層と電気的に接続される第2の再配線層を形成する第2の再配線層形成工程と、
を少なくとも有する半導体装置の製造方法において、
前記第2の再配線層形成工程は、
前記第2の絶縁層上及び前記第2の開口部内部に前記第1の再配線層と電気的に接続される導電層、及び感光性膜を形成する工程と、
前記感光性膜のうち前記第2の再配線層を形成する第1の領域に対して露光光を照射する工程と、
前記感光性膜のうち、前記第1の領域の内側であって、前記第1の再配線層上の第2の領域に対して露光光を照射する工程と、
前記露光光を照射した前記第1の領域、及び前記第2の領域の感光性膜を除去する工程と、
を有することを特徴とする半導体装置の製造方法。
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JP2008230291A JP5102726B2 (ja) | 2008-09-08 | 2008-09-08 | 半導体装置の製造方法 |
US12/585,022 US20100062600A1 (en) | 2008-09-08 | 2009-09-01 | Method of manufacturing a semiconductor device |
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Cited By (4)
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JP2014534470A (ja) * | 2011-10-20 | 2014-12-18 | クォルコム・メムズ・テクノロジーズ・インコーポレーテッド | 垂直集積のためのスタックビア |
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JP2019212934A (ja) * | 2019-09-20 | 2019-12-12 | 大日本印刷株式会社 | 表示装置 |
JP2020136316A (ja) * | 2019-02-13 | 2020-08-31 | キオクシア株式会社 | 半導体装置の製造方法 |
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JP2019212934A (ja) * | 2019-09-20 | 2019-12-12 | 大日本印刷株式会社 | 表示装置 |
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