JP2009520368A5 - - Google Patents

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Publication number
JP2009520368A5
JP2009520368A5 JP2008545902A JP2008545902A JP2009520368A5 JP 2009520368 A5 JP2009520368 A5 JP 2009520368A5 JP 2008545902 A JP2008545902 A JP 2008545902A JP 2008545902 A JP2008545902 A JP 2008545902A JP 2009520368 A5 JP2009520368 A5 JP 2009520368A5
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JP
Japan
Prior art keywords
forming
substrate
esd
high resistance
passive elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008545902A
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English (en)
Japanese (ja)
Other versions
JP2009520368A (ja
JP5165583B2 (ja
Filing date
Publication date
Priority claimed from US11/300,710 external-priority patent/US7335955B2/en
Application filed filed Critical
Publication of JP2009520368A publication Critical patent/JP2009520368A/ja
Publication of JP2009520368A5 publication Critical patent/JP2009520368A5/ja
Application granted granted Critical
Publication of JP5165583B2 publication Critical patent/JP5165583B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2008545902A 2005-12-14 2006-11-29 受動集積デバイスのためのｅｓｄ保護 Expired - Fee Related JP5165583B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/300,710 US7335955B2 (en) 2005-12-14 2005-12-14 ESD protection for passive integrated devices
US11/300,710 2005-12-14
PCT/US2006/061311 WO2007120295A2 (en) 2005-12-14 2006-11-29 Esd protection for passive integrated devices

Publications (3)

Publication Number Publication Date
JP2009520368A JP2009520368A (ja) 2009-05-21
JP2009520368A5 true JP2009520368A5 (enExample) 2010-01-14
JP5165583B2 JP5165583B2 (ja) 2013-03-21

Family

ID=38138437

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008545902A Expired - Fee Related JP5165583B2 (ja) 2005-12-14 2006-11-29 受動集積デバイスのためのｅｓｄ保護

Country Status (5)

Country Link
US (2) US7335955B2 (enExample)
JP (1) JP5165583B2 (enExample)
CN (1) CN101331658B (enExample)
TW (1) TWI390705B (enExample)
WO (1) WO2007120295A2 (enExample)

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US7772106B2 (en) * 2007-11-07 2010-08-10 Stats Chippac, Ltd. Method of forming an inductor on a semiconductor wafer
US8269308B2 (en) * 2008-03-19 2012-09-18 Stats Chippac, Ltd. Semiconductor device with cross-talk isolation using M-cap and method thereof
US7772080B2 (en) * 2008-07-02 2010-08-10 Stats Chippac, Ltd. Semiconductor device and method of providing electrostatic discharge protection for integrated passive devices
US9343900B2 (en) * 2008-07-24 2016-05-17 Robert Bosch Gmbh Passive network for electrostatic protection of integrated circuits
US7973358B2 (en) * 2008-08-07 2011-07-05 Infineon Technologies Ag Coupler structure
TWI424544B (zh) * 2011-03-31 2014-01-21 聯詠科技股份有限公司 積體電路裝置
US9281681B2 (en) 2012-11-21 2016-03-08 Taiwan Semiconductor Manufacturing Co., Ltd. ESD protection circuits and methods
CN105633926A (zh) * 2014-10-31 2016-06-01 展讯通信（上海）有限公司 实现集成无源电路静电防护的结构
CN105575300B (zh) * 2015-12-16 2018-11-09 武汉华星光电技术有限公司 阵列基板的esd检测方法
WO2017196149A1 (ko) * 2016-05-13 2017-11-16 주식회사 모다이노칩 컨택터 및 이를 구비하는 전자기기
US11329013B2 (en) 2020-05-28 2022-05-10 Nxp Usa, Inc. Interconnected substrate arrays containing electrostatic discharge protection grids and associated microelectronic packages

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