JP2011198878A5 - - Google Patents
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- Publication number
- JP2011198878A5 JP2011198878A5 JP2010061899A JP2010061899A JP2011198878A5 JP 2011198878 A5 JP2011198878 A5 JP 2011198878A5 JP 2010061899 A JP2010061899 A JP 2010061899A JP 2010061899 A JP2010061899 A JP 2010061899A JP 2011198878 A5 JP2011198878 A5 JP 2011198878A5
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- sheet
- wiring
- pad
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010410 layer Substances 0.000 claims description 87
- 239000004065 semiconductor Substances 0.000 claims description 27
- 239000011229 interlayer Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims 12
- 229910045601 alloy Inorganic materials 0.000 claims 8
- 239000000956 alloy Substances 0.000 claims 8
- 239000000758 substrate Substances 0.000 claims 8
- 238000010030 laminating Methods 0.000 claims 6
- 238000004519 manufacturing process Methods 0.000 claims 6
- 229920000049 Carbon (fiber) Polymers 0.000 claims 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 4
- 239000004917 carbon fiber Substances 0.000 claims 4
- 229910010293 ceramic material Inorganic materials 0.000 claims 4
- 239000004744 fabric Substances 0.000 claims 4
- 229910000833 kovar Inorganic materials 0.000 claims 4
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 claims 4
- 229910000679 solder Inorganic materials 0.000 claims 4
- 238000000034 method Methods 0.000 claims 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 2
- 239000010949 copper Substances 0.000 claims 2
- 229910052802 copper Inorganic materials 0.000 claims 2
- 238000009826 distribution Methods 0.000 claims 2
- 239000003822 epoxy resin Substances 0.000 claims 2
- 229920000647 polyepoxide Polymers 0.000 claims 2
- 238000007788 roughening Methods 0.000 claims 2
- 239000004020 conductor Substances 0.000 description 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010061899A JP5570855B2 (ja) | 2010-03-18 | 2010-03-18 | 配線基板及びその製造方法並びに半導体装置及びその製造方法 |
| US13/048,190 US8901725B2 (en) | 2010-03-18 | 2011-03-15 | Wiring board and method of manufacturing the same, and semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010061899A JP5570855B2 (ja) | 2010-03-18 | 2010-03-18 | 配線基板及びその製造方法並びに半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2011198878A JP2011198878A (ja) | 2011-10-06 |
| JP2011198878A5 true JP2011198878A5 (enExample) | 2013-03-07 |
| JP5570855B2 JP5570855B2 (ja) | 2014-08-13 |
Family
ID=44646573
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010061899A Active JP5570855B2 (ja) | 2010-03-18 | 2010-03-18 | 配線基板及びその製造方法並びに半導体装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8901725B2 (enExample) |
| JP (1) | JP5570855B2 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9543255B2 (en) | 2014-12-02 | 2017-01-10 | International Business Machines Corporation | Reduced-warpage laminate structure |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20120050837A (ko) * | 2010-11-11 | 2012-05-21 | 삼성전기주식회사 | 전도성 필름 및 그 제조방법 |
| JP5715835B2 (ja) * | 2011-01-25 | 2015-05-13 | 新光電気工業株式会社 | 半導体パッケージ及びその製造方法 |
| JP5851211B2 (ja) * | 2011-11-11 | 2016-02-03 | 新光電気工業株式会社 | 半導体パッケージ、半導体パッケージの製造方法及び半導体装置 |
| US9299602B2 (en) | 2011-12-20 | 2016-03-29 | Intel Corporation | Enabling package-on-package (PoP) pad surface finishes on bumpless build-up layer (BBUL) package |
| US9159649B2 (en) * | 2011-12-20 | 2015-10-13 | Intel Corporation | Microelectronic package and stacked microelectronic assembly and computing system containing same |
| JP5903337B2 (ja) * | 2012-06-08 | 2016-04-13 | 新光電気工業株式会社 | 半導体パッケージ及びその製造方法 |
| KR101411813B1 (ko) * | 2012-11-09 | 2014-06-27 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
| US9673131B2 (en) * | 2013-04-09 | 2017-06-06 | Intel Corporation | Integrated circuit package assemblies including a glass solder mask layer |
| JP5662551B1 (ja) * | 2013-12-20 | 2015-01-28 | 新光電気工業株式会社 | 配線基板、半導体装置及び配線基板の製造方法 |
| US9679841B2 (en) * | 2014-05-13 | 2017-06-13 | Qualcomm Incorporated | Substrate and method of forming the same |
| JP6358431B2 (ja) | 2014-08-25 | 2018-07-18 | 新光電気工業株式会社 | 電子部品装置及びその製造方法 |
| US9941219B2 (en) | 2014-09-19 | 2018-04-10 | Intel Corporation | Control of warpage using ABF GC cavity for embedded die package |
| JP2017152536A (ja) * | 2016-02-24 | 2017-08-31 | イビデン株式会社 | プリント配線板及びその製造方法 |
| US20180177045A1 (en) * | 2016-12-21 | 2018-06-21 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Embedding Component in Component Carrier by Component Fixation Structure |
| US10593563B2 (en) * | 2017-04-13 | 2020-03-17 | Invensas Corporation | Fan-out wafer level package with resist vias |
| GB202018676D0 (en) * | 2020-11-27 | 2021-01-13 | Graphcore Ltd | Controlling warpage of a substrate for mounting a semiconductor die |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5778523A (en) * | 1996-11-08 | 1998-07-14 | W. L. Gore & Associates, Inc. | Method for controlling warp of electronic assemblies by use of package stiffener |
| US6317331B1 (en) * | 1998-08-19 | 2001-11-13 | Kulicke & Soffa Holdings, Inc. | Wiring substrate with thermal insert |
| JP2000101245A (ja) * | 1998-09-24 | 2000-04-07 | Ngk Spark Plug Co Ltd | 積層樹脂配線基板及びその製造方法 |
| US6525921B1 (en) * | 1999-11-12 | 2003-02-25 | Matsushita Electric Industrial Co., Ltd | Capacitor-mounted metal foil and a method for producing the same, and a circuit board and a method for producing the same |
| JP2002280478A (ja) * | 2001-03-16 | 2002-09-27 | Sumitomo Bakelite Co Ltd | 半導体装置 |
| JP3615727B2 (ja) | 2001-10-31 | 2005-02-02 | 新光電気工業株式会社 | 半導体装置用パッケージ |
| JP2004039867A (ja) * | 2002-07-03 | 2004-02-05 | Sony Corp | 多層配線回路モジュール及びその製造方法 |
| US7094975B2 (en) * | 2003-11-20 | 2006-08-22 | Delphi Technologies, Inc. | Circuit board with localized stiffener for enhanced circuit component reliability |
| US7608789B2 (en) * | 2004-08-12 | 2009-10-27 | Epcos Ag | Component arrangement provided with a carrier substrate |
| JP4452222B2 (ja) * | 2005-09-07 | 2010-04-21 | 新光電気工業株式会社 | 多層配線基板及びその製造方法 |
| JP4955259B2 (ja) * | 2005-11-24 | 2012-06-20 | 新光電気工業株式会社 | 配線基板、半導体装置、及び配線基板の製造方法 |
| WO2007076014A2 (en) * | 2005-12-23 | 2007-07-05 | World Properties, Inc. | Thermal management circuit materials, method of manufacture thereof, and articles formed therefrom |
| JP2008211125A (ja) | 2007-02-28 | 2008-09-11 | Spansion Llc | 半導体装置およびその製造方法 |
| CN101647327B (zh) * | 2007-04-03 | 2012-04-25 | 住友电木株式会社 | 多层电路基板及半导体装置 |
| JP5206217B2 (ja) * | 2008-08-19 | 2013-06-12 | 富士通株式会社 | 多層配線基板及びそれを用いた電子装置 |
-
2010
- 2010-03-18 JP JP2010061899A patent/JP5570855B2/ja active Active
-
2011
- 2011-03-15 US US13/048,190 patent/US8901725B2/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9543255B2 (en) | 2014-12-02 | 2017-01-10 | International Business Machines Corporation | Reduced-warpage laminate structure |
| US9613915B2 (en) | 2014-12-02 | 2017-04-04 | International Business Machines Corporation | Reduced-warpage laminate structure |
| US10685919B2 (en) | 2014-12-02 | 2020-06-16 | International Business Machines Corporation | Reduced-warpage laminate structure |
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