CN101331658B - 用于无源集成器件的esd保护 - Google Patents

用于无源集成器件的esd保护 Download PDF

Info

Publication number
CN101331658B
CN101331658B CN2006800472275A CN200680047227A CN101331658B CN 101331658 B CN101331658 B CN 101331658B CN 2006800472275 A CN2006800472275 A CN 2006800472275A CN 200680047227 A CN200680047227 A CN 200680047227A CN 101331658 B CN101331658 B CN 101331658B
Authority
CN
China
Prior art keywords
substrate
charge leakage
resistance
layer
coupled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2006800472275A
Other languages
English (en)
Chinese (zh)
Other versions
CN101331658A (zh
Inventor
阿格尼·米特拉
达雷尔·G·希尔
卡思克·拉贾戈帕兰
阿道夫·C·雷耶斯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of CN101331658A publication Critical patent/CN101331658A/zh
Application granted granted Critical
Publication of CN101331658B publication Critical patent/CN101331658B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/62Protection against overvoltage, e.g. fuses, shunts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49204Contact or terminal manufacturing

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
CN2006800472275A 2005-12-14 2006-11-29 用于无源集成器件的esd保护 Expired - Fee Related CN101331658B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/300,710 US7335955B2 (en) 2005-12-14 2005-12-14 ESD protection for passive integrated devices
US11/300,710 2005-12-14
PCT/US2006/061311 WO2007120295A2 (en) 2005-12-14 2006-11-29 Esd protection for passive integrated devices

Publications (2)

Publication Number Publication Date
CN101331658A CN101331658A (zh) 2008-12-24
CN101331658B true CN101331658B (zh) 2012-09-26

Family

ID=38138437

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2006800472275A Expired - Fee Related CN101331658B (zh) 2005-12-14 2006-11-29 用于无源集成器件的esd保护

Country Status (5)

Country Link
US (2) US7335955B2 (enExample)
JP (1) JP5165583B2 (enExample)
CN (1) CN101331658B (enExample)
TW (1) TWI390705B (enExample)
WO (1) WO2007120295A2 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7772106B2 (en) * 2007-11-07 2010-08-10 Stats Chippac, Ltd. Method of forming an inductor on a semiconductor wafer
US8269308B2 (en) * 2008-03-19 2012-09-18 Stats Chippac, Ltd. Semiconductor device with cross-talk isolation using M-cap and method thereof
US7772080B2 (en) * 2008-07-02 2010-08-10 Stats Chippac, Ltd. Semiconductor device and method of providing electrostatic discharge protection for integrated passive devices
US9343900B2 (en) * 2008-07-24 2016-05-17 Robert Bosch Gmbh Passive network for electrostatic protection of integrated circuits
US7973358B2 (en) * 2008-08-07 2011-07-05 Infineon Technologies Ag Coupler structure
TWI424544B (zh) * 2011-03-31 2014-01-21 聯詠科技股份有限公司 積體電路裝置
US9281681B2 (en) 2012-11-21 2016-03-08 Taiwan Semiconductor Manufacturing Co., Ltd. ESD protection circuits and methods
CN105633926A (zh) * 2014-10-31 2016-06-01 展讯通信(上海)有限公司 实现集成无源电路静电防护的结构
CN105575300B (zh) * 2015-12-16 2018-11-09 武汉华星光电技术有限公司 阵列基板的esd检测方法
WO2017196149A1 (ko) * 2016-05-13 2017-11-16 주식회사 모다이노칩 컨택터 및 이를 구비하는 전자기기
US11329013B2 (en) 2020-05-28 2022-05-10 Nxp Usa, Inc. Interconnected substrate arrays containing electrostatic discharge protection grids and associated microelectronic packages

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3344071A (en) * 1963-09-25 1967-09-26 Texas Instruments Inc High resistivity chromium doped gallium arsenide and process of making same
JP2860211B2 (ja) * 1992-06-29 1999-02-24 毅 池田 ノイズ・フィルタ
JP3725266B2 (ja) * 1996-11-07 2005-12-07 株式会社半導体エネルギー研究所 配線形成方法
JPH10270289A (ja) * 1997-03-24 1998-10-09 Sumitomo Metal Ind Ltd チップ型lcバリスタ及びその製造方法
US5946176A (en) * 1998-08-17 1999-08-31 International Business Machines Corporation Electrostatic discharge protection utilizing microelectromechanical switch
JP3675303B2 (ja) * 2000-05-31 2005-07-27 セイコーエプソン株式会社 静電気保護回路が内蔵された半導体装置及びその製造方法
JP3759381B2 (ja) * 2000-07-17 2006-03-22 アルプス電気株式会社 電子回路基板
US6472286B1 (en) * 2000-08-09 2002-10-29 Taiwan Semiconductor Manufacturing Company Bipolar ESD protection structure
KR100386109B1 (ko) * 2000-11-08 2003-06-02 삼성전자주식회사 2단 메탈콘택구조를 가진 반도체 메모리 장치 및 그제조방법
US7005708B2 (en) * 2001-06-14 2006-02-28 Sarnoff Corporation Minimum-dimension, fully-silicided MOS driver and ESD protection design for optimized inter-finger coupling
DE10139956A1 (de) * 2001-08-21 2003-03-13 Koninkl Philips Electronics Nv ESD Schutz für CMOS-Ausgangsstufe
US20030058591A1 (en) * 2001-09-26 2003-03-27 Jeffrey Johnson Electro-static discharge protection for high frequency port on an integrated circuit
US6706548B2 (en) * 2002-01-08 2004-03-16 Motorola, Inc. Method of making a micromechanical device
US6710990B2 (en) * 2002-01-22 2004-03-23 Lsi Logic Corporation Low voltage breakdown element for ESD trigger device
US6762466B2 (en) * 2002-04-11 2004-07-13 United Microelectronics Corp. Circuit structure for connecting bonding pad and ESD protection circuit
US20030202307A1 (en) * 2002-04-26 2003-10-30 Kei-Kang Hung Semiconductor device with ESD protection
WO2004015764A2 (en) * 2002-08-08 2004-02-19 Leedy Glenn J Vertical system integration
JP4312451B2 (ja) * 2002-12-24 2009-08-12 Necエレクトロニクス株式会社 静電気保護素子及び半導体装置
JP3713490B2 (ja) * 2003-02-18 2005-11-09 株式会社東芝 半導体装置
US6798022B1 (en) * 2003-03-11 2004-09-28 Oki Electric Industry Co., Ltd. Semiconductor device with improved protection from electrostatic discharge
EP1494284A1 (en) * 2003-06-30 2005-01-05 Freescale Semiconductor, Inc. Overvoltage protection device
US6939726B2 (en) * 2003-08-04 2005-09-06 Taiwan Semiconductor Manufacturing Co., Ltd. Via array monitor and method of monitoring induced electrical charging
US6939752B1 (en) * 2003-08-22 2005-09-06 Altera Corporation Apparatus and methods for integrated circuit with devices with body contact and devices with electrostatic discharge protection
TWI227560B (en) * 2003-09-03 2005-02-01 Macronix Int Co Ltd Electrostatic discharge protection circuit and its method through control of substrate potential
US7064048B2 (en) * 2003-10-17 2006-06-20 United Microelectronics Corp. Method of forming a semi-insulating region
US6987300B2 (en) * 2004-03-25 2006-01-17 Microchip Technology Incorporated High voltage ESD-protection structure
JP2005311134A (ja) * 2004-04-22 2005-11-04 Nec Electronics Corp 静電気放電保護素子
TWI240403B (en) * 2004-04-29 2005-09-21 Via Tech Inc Electrostatic discharge protection circuit
US20050254189A1 (en) * 2004-05-07 2005-11-17 Taiwan Semiconductor Manufacturing Co., Ltd. ESD protection circuit with low parasitic capacitance
US7161784B2 (en) * 2004-06-30 2007-01-09 Research In Motion Limited Spark gap apparatus and method for electrostatic discharge protection
US20060043490A1 (en) * 2004-09-02 2006-03-02 Texas Instruments Incorporated Electrostatic discharge (ESD) detection and protection
JP4028863B2 (ja) * 2004-09-10 2007-12-26 富士通株式会社 基板製造方法
US7385252B2 (en) * 2004-09-27 2008-06-10 Taiwan Semiconductor Manufacturing Company, Ltd. ESD protection for high voltage applications
DE102004052868B4 (de) 2004-11-02 2007-02-08 Infineon Technologies Ag Integrierte Schaltkreis-Anordnung und Schaltkreis-Array
US7495335B2 (en) * 2005-05-16 2009-02-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method of reducing process steps in metal line protective structure formation

Also Published As

Publication number Publication date
US20070132029A1 (en) 2007-06-14
JP2009520368A (ja) 2009-05-21
US7335955B2 (en) 2008-02-26
TW200733347A (en) 2007-09-01
WO2007120295A3 (en) 2008-04-10
US7642182B2 (en) 2010-01-05
TWI390705B (zh) 2013-03-21
CN101331658A (zh) 2008-12-24
US20080108217A1 (en) 2008-05-08
JP5165583B2 (ja) 2013-03-21
WO2007120295A2 (en) 2007-10-25

Similar Documents

Publication Publication Date Title
US7642182B2 (en) ESD protection for passive integrated devices
JP5019689B2 (ja) 電流バラスティングesd高感度装置のための装置
CN102860141A (zh) 用于表面安装式和嵌入式部件的放电保护
US8278730B2 (en) High voltage resistance coupling structure
JP2003519926A5 (enExample)
CN101647075B (zh) 具有电流密度增强层的薄膜电阻
US9093272B2 (en) Methods of forming electronic elements with ESD protection
CN101790789B (zh) 使用微机电系统开关的静电放电保护
WO2009108410A2 (en) Resistor triggered electrostatic discharge protection
JP2000516031A (ja) 過電圧保護装置及び過電圧保護方法
US20220392684A1 (en) Insulation jacket for top coil of an isolated transformer
US9245790B2 (en) Integrated circuits and methods of forming the same with multiple embedded interconnect connection to same through-semiconductor via
US11469593B2 (en) Thin-film ESD protection device with compact size
KR100685616B1 (ko) 반도체 장치의 제조방법
JPH11168175A (ja) フィルタに係合できる保護回路
TW200818092A (en) System for displalying images
JP2007520074A (ja) 静電放電保護デバイスを備えた集積回路チップ
JP2009520368A5 (enExample)
JP6191804B2 (ja) 薄膜デバイス
US6567251B1 (en) Electrostatic discharge protection of electrically-inactive components
US20160049461A1 (en) Metal-insulator-metal (mim) capacitor
JP7704207B2 (ja) 過渡電圧吸収素子
US20230361158A1 (en) Resistor structure in integrated circuit
JPH03147373A (ja) ゲート保護回路付絶縁ゲート形半導体装置
KR970024026A (ko) 에칭 공정을 사용하여 비도전성이 될 수 있으며 프리데이터 시스템에서 동작가능한 도전성 디바이스 구조(A Conductive Device Structure that can be rendered Non-Conductive Using An Etch Process Operable in Predator System)

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder

Address after: Texas in the United States

Patentee after: NXP USA, Inc.

Address before: Texas in the United States

Patentee before: FREESCALE SEMICONDUCTOR, Inc.

CP01 Change in the name or title of a patent holder
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120926

CF01 Termination of patent right due to non-payment of annual fee