JP2009187615A5 - - Google Patents

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Publication number
JP2009187615A5
JP2009187615A5 JP2008025348A JP2008025348A JP2009187615A5 JP 2009187615 A5 JP2009187615 A5 JP 2009187615A5 JP 2008025348 A JP2008025348 A JP 2008025348A JP 2008025348 A JP2008025348 A JP 2008025348A JP 2009187615 A5 JP2009187615 A5 JP 2009187615A5
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JP
Japan
Prior art keywords
data
mask
input
signal
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP2008025348A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009187615A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2008025348A priority Critical patent/JP2009187615A/ja
Priority claimed from JP2008025348A external-priority patent/JP2009187615A/ja
Priority to US12/360,498 priority patent/US20090196107A1/en
Priority to KR1020090007957A priority patent/KR101028682B1/ko
Publication of JP2009187615A publication Critical patent/JP2009187615A/ja
Publication of JP2009187615A5 publication Critical patent/JP2009187615A5/ja
Abandoned legal-status Critical Current

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JP2008025348A 2008-02-05 2008-02-05 半導体記憶装置 Abandoned JP2009187615A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008025348A JP2009187615A (ja) 2008-02-05 2008-02-05 半導体記憶装置
US12/360,498 US20090196107A1 (en) 2008-02-05 2009-01-27 Semiconductor device and its memory system
KR1020090007957A KR101028682B1 (ko) 2008-02-05 2009-02-02 반도체 장치와 그 메모리 시스템

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008025348A JP2009187615A (ja) 2008-02-05 2008-02-05 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2009187615A JP2009187615A (ja) 2009-08-20
JP2009187615A5 true JP2009187615A5 (enExample) 2009-10-01

Family

ID=40931557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008025348A Abandoned JP2009187615A (ja) 2008-02-05 2008-02-05 半導体記憶装置

Country Status (3)

Country Link
US (1) US20090196107A1 (enExample)
JP (1) JP2009187615A (enExample)
KR (1) KR101028682B1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5087870B2 (ja) * 2006-07-12 2012-12-05 富士通セミコンダクター株式会社 半導体メモリ、コントローラおよび半導体メモリの動作方法
JP5398664B2 (ja) * 2010-08-13 2014-01-29 ルネサスエレクトロニクス株式会社 半導体メモリ
KR20120070873A (ko) * 2010-12-22 2012-07-02 한국전자통신연구원 부채널 방지 마스킹 덧셈 연산 장치
KR20120095700A (ko) 2011-02-21 2012-08-29 에스케이하이닉스 주식회사 반도체 메모리 장치
KR20150006305A (ko) * 2013-07-08 2015-01-16 에스케이하이닉스 주식회사 반도체 메모리 장치 및 반도체 시스템
KR20150008707A (ko) * 2013-07-15 2015-01-23 삼성전자주식회사 독출 데이터를 마스킹하는 메모리 장치 및 이의 테스트 방법
US9383809B2 (en) * 2013-11-13 2016-07-05 Qualcomm Incorporated System and method for reducing memory I/O power via data masking
CN108335707A (zh) * 2018-02-09 2018-07-27 盛科网络（苏州）有限公司 一种带掩码的高速存储器设计方法及装置
US10803928B2 (en) * 2018-06-18 2020-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Low voltage memory device
DE102019113512A1 (de) 2018-06-18 2019-12-19 Taiwan Semiconductor Manufacturing Co., Ltd. Niederspannungsspeichervorrichtung
KR102856775B1 (ko) 2021-05-14 2025-09-09 삼성전자주식회사 전자 장치, 호스트의 동작 방법, 메모리 모듈의 동작 방법, 및 메모리 장치의 동작 방법
EP4089678B1 (en) * 2021-05-14 2023-12-13 Samsung Electronics Co., Ltd. Electronic device, operation method of host, operation method of memory module, and operation method of memory device
CN116052753B (zh) * 2023-03-03 2023-08-18 长鑫存储技术有限公司 存储器

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2712575C2 (de) * 1977-03-22 1985-12-19 Walter Dipl.-Ing. 8011 Putzbrunn Motsch Assoziatives Speichersystem in hochintegrierter Halbleitertechnik
US4257110A (en) * 1977-04-19 1981-03-17 Semionics Associates, Inc. Recognition memory with multiwrite and masking
US4670858A (en) * 1983-06-07 1987-06-02 Tektronix, Inc. High storage capacity associative memory
DE19808347B4 (de) * 1998-02-27 2009-06-04 Qimonda Ag Integrierter Speicher
JP4204685B2 (ja) * 1999-01-19 2009-01-07 株式会社ルネサステクノロジ 同期型半導体記憶装置
US6532533B1 (en) * 1999-11-29 2003-03-11 Texas Instruments Incorporated Input/output system with mask register bit control of memory mapped access to individual input/output pins
US6973404B1 (en) * 2000-09-11 2005-12-06 Agilent Technologies, Inc. Method and apparatus for administering inversion property in a memory tester
US6745359B2 (en) * 2002-06-06 2004-06-01 Logicvision, Inc. Method of masking corrupt bits during signature analysis and circuit for use therewith
KR100546387B1 (ko) * 2003-10-13 2006-01-26 삼성전자주식회사 마스크 비트 전송방법 및 장치
JP5087870B2 (ja) * 2006-07-12 2012-12-05 富士通セミコンダクター株式会社 半導体メモリ、コントローラおよび半導体メモリの動作方法

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