JP2008529315A - 埋め込みｄｒａｍメモリにおいて大きいキャパシタンスを得るための製造プロセス - Google Patents

埋め込みｄｒａｍメモリにおいて大きいキャパシタンスを得るための製造プロセス Download PDF

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Publication number
JP2008529315A
JP2008529315A JP2007554200A JP2007554200A JP2008529315A JP 2008529315 A JP2008529315 A JP 2008529315A JP 2007554200 A JP2007554200 A JP 2007554200A JP 2007554200 A JP2007554200 A JP 2007554200A JP 2008529315 A JP2008529315 A JP 2008529315A
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JP
Japan
Prior art keywords
region
dielectric layer
forming
capacitor
semiconductor substrate
Prior art date
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Pending
Application number
JP2007554200A
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English (en)
Japanese (ja)
Inventor
シニツキー、デニス
スー、フ−チェー
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Peraso Inc
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Monolithic System Technology Inc
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Filing date
Publication date
Application filed by Monolithic System Technology Inc filed Critical Monolithic System Technology Inc
Publication of JP2008529315A publication Critical patent/JP2008529315A/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66181—Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0387—Making the trench
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
JP2007554200A 2005-02-03 2006-02-02 埋め込みｄｒａｍメモリにおいて大きいキャパシタンスを得るための製造プロセス Pending JP2008529315A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/050,988 US7323379B2 (en) 2005-02-03 2005-02-03 Fabrication process for increased capacitance in an embedded DRAM memory
PCT/US2006/003622 WO2006083993A2 (en) 2005-02-03 2006-02-02 Fabrication process for increased capacitance in an embedded dram memory

Publications (1)

Publication Number Publication Date
JP2008529315A true JP2008529315A (ja) 2008-07-31

Family

ID=36757133

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007554200A Pending JP2008529315A (ja) 2005-02-03 2006-02-02 埋め込みｄｒａｍメモリにおいて大きいキャパシタンスを得るための製造プロセス

Country Status (5)

Country Link
US (2) US7323379B2 (ko)
EP (1) EP1844496A4 (ko)
JP (1) JP2008529315A (ko)
KR (1) KR20070106614A (ko)
WO (1) WO2006083993A2 (ko)

Cited By (2)

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Publication number Priority date Publication date Assignee Title
JP2011096810A (ja) * 2009-10-29 2011-05-12 Fujitsu Semiconductor Ltd 半導体記憶装置及びその製造方法
JP2013168662A (ja) * 2005-12-09 2013-08-29 Advanced Analogic Technologies Inc 半導体集積回路基板の絶縁構造およびその製作方法

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US7499307B2 (en) * 2005-06-24 2009-03-03 Mosys, Inc. Scalable embedded DRAM array
US7274618B2 (en) * 2005-06-24 2007-09-25 Monolithic System Technology, Inc. Word line driver for DRAM embedded in a logic process
US7842558B2 (en) * 2006-03-02 2010-11-30 Micron Technology, Inc. Masking process for simultaneously patterning separate regions
US7476933B2 (en) 2006-03-02 2009-01-13 Micron Technology, Inc. Vertical gated access transistor
EP2648220B1 (en) * 2006-06-30 2017-11-08 Fujitsu Semiconductor Limited Floating gate memory device with trench isolation and method for manufacturing thereof
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
US7929359B2 (en) * 2008-11-13 2011-04-19 Mosys, Inc. Embedded DRAM with bias-independent capacitance
US8361863B2 (en) 2008-11-13 2013-01-29 Mosys, Inc. Embedded DRAM with multiple gate oxide thicknesses
US8017997B2 (en) 2008-12-29 2011-09-13 International Business Machines Corporation Vertical metal-insulator-metal (MIM) capacitor using gate stack, gate spacer and contact via
KR101573696B1 (ko) * 2009-05-22 2015-12-02 삼성전자주식회사 비트 라인 확장 아일랜드를 가지는 반도체 장치
KR101201903B1 (ko) * 2010-07-20 2012-11-16 매그나칩 반도체 유한회사 반도체소자의 소자분리 구조 및 그 형성방법
US8629514B2 (en) * 2011-01-18 2014-01-14 Wafertech, Llc Methods and structures for customized STI structures in semiconductor devices
US9034753B2 (en) 2011-06-20 2015-05-19 Globalfoundries Inc. Method of forming conductive contacts on a semiconductor device with embedded memory and the resulting device
US8673737B2 (en) 2011-10-17 2014-03-18 International Business Machines Corporation Array and moat isolation structures and method of manufacture
US9048339B2 (en) * 2012-09-07 2015-06-02 International Business Machines Corporation Deep trench capacitor
US8685799B1 (en) 2012-09-12 2014-04-01 Globalfoundries Singapore Pte. Ltd. RRAM structure at STI with Si-based selector
US9362272B2 (en) 2012-11-01 2016-06-07 Taiwan Semiconductor Manufacturing Company, Ltd. Lateral MOSFET
US10727232B2 (en) * 2018-11-07 2020-07-28 Applied Materials, Inc. Dram and method of making
CN112397529A (zh) * 2019-08-12 2021-02-23 天津大学青岛海洋技术研究院 带有低噪声源跟随器的图像传感器像素结构及其制作方法

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JP2004510330A (ja) * 2000-09-18 2004-04-02 モトローラ・インコーポレイテッド 半導体装置及びその形成プロセス
JP2004527901A (ja) * 2001-01-29 2004-09-09 モノリシック・システム・テクノロジー・インコーポレイテッド キャビティ内に部分的に製造されたコンデンサ構造を備えたｄｒａｍセル及びその作動方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013168662A (ja) * 2005-12-09 2013-08-29 Advanced Analogic Technologies Inc 半導体集積回路基板の絶縁構造およびその製作方法
JP2011096810A (ja) * 2009-10-29 2011-05-12 Fujitsu Semiconductor Ltd 半導体記憶装置及びその製造方法
US9018076B2 (en) 2009-10-29 2015-04-28 Fujitsu Semiconductor Limited Semiconductor storage device and method of manufacturing the same

Also Published As

Publication number Publication date
EP1844496A4 (en) 2010-09-29
US7323379B2 (en) 2008-01-29
WO2006083993A3 (en) 2007-04-12
US20060172504A1 (en) 2006-08-03
US20080093645A1 (en) 2008-04-24
KR20070106614A (ko) 2007-11-02
EP1844496A2 (en) 2007-10-17
WO2006083993A2 (en) 2006-08-10

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