JP2008521256A - 電圧等化ループを備えるパッシベーション構造 - Google Patents
電圧等化ループを備えるパッシベーション構造 Download PDFInfo
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- 238000002161 passivation Methods 0.000 title claims abstract description 36
- 239000004065 semiconductor Substances 0.000 claims abstract description 35
- 239000000463 material Substances 0.000 claims abstract description 22
- 239000002184 metal Substances 0.000 claims description 8
- 239000002019 doping agent Substances 0.000 claims description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 2
- 230000005684 electric field Effects 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/965—Shaped junction formation
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Abstract
Description
12 能動領域
14 ダイ
16 パッシベーション構造
18 内側閉ループ
20 外側閉ループ
22 ルーピング細片
24 まっすぐな側部
26 まっすぐな側部
28 角
30 角
32 側部
34 P型領域
36 コンタクト
38 コンタクト
40 酸化層
42 ダイの伝導性と反対の伝導性の領域
Claims (18)
- 第1伝導型の半導体ダイ本体と、
前記半導体本体に形成され、周縁の近くで終端する第2伝導型の領域を含む能動領域と、
前記能動領域の周りに配置され、ほぼ均一な幅の抵抗材料から成る連続細片を含むパッシベーション構造であって、前記連続細片は、前記能動領域の周りでそれ自体と1回交差して、内側境界となる電気抵抗性材料から成る第1閉ループを形成し、2回目に交差して、前記第1閉ループの周りに外側境界となる前記電気抵抗性材料から成る第2閉ループと、それ自体と交差せずに、前記第1閉ループの周りにループを作り、前記第2閉ループで終端する前記電気抵抗性材料から成るルーピング細片とを形成するパッシベーション構造
とを備え、前記ルーピング細片は、その一端が、前記第1閉ループの外縁から延び、その他端が、前記第2閉ループの内縁で終端している半導体デバイス。 - 電気抵抗性材料は、多結晶シリコンから成る請求項1に記載の半導体デバイス。
- 電気抵抗性材料から成る連続細片は、第2伝導型の領域に隣接して、第1伝導型の領域を含む請求項1に記載の半導体デバイス。
- パッシベーション構造は、厚い絶縁層上に配置されている請求項1に記載の半導体デバイス。
- パッシベーション構造は、ドーパントのリサーフ濃度でドープされる半導体本体内の第2伝導型の領域上に配置されている請求項1に記載の半導体デバイス。
- 第1閉ループは、閉ループを形成するために、まっすぐな部分で互いに接続された複数の湾曲部を含む請求項1に記載の半導体デバイス。
- 電気抵抗性材料から成るルーピング細片は、第1閉ループの角の1つと電気的に接触している請求項6に記載の半導体デバイス。
- ルーピング細片は、第1閉ループのまっすぐな部分と平行であるまっすぐな部分を含む請求項7に記載の半導体デバイス。
- 電気抵抗性材料から成るルーピング細片は、まっすぐな部分の1つと電気的に接触している請求項6に記載の半導体デバイス。
- 電気抵抗性材料から成るルーピング細片は、第1閉ループのまっすぐな部分の1つと電気的に接触し、かつそこから、ある角度をなして延びる第1のまっすぐな部分を含み、前記ルーピング細片は、前記第1のまっすぐな部分と平行な複数のまっすぐな部分をさらに含む請求項9に記載の半導体デバイス。
- ルーピング細片は、互いに平行であり、かつ第1閉ループのそれぞれのまっすぐな部分と平行であるまっすぐな部分をさらに含む請求項11に記載の半導体デバイス。
- 第1閉ループは、複数の対向する側部を含み、ルーピング細片は、互いから離れ、かつ前記対向する側部の各々から放射状に遂次増加して離れるそれぞれの部分を含み、前記第1閉ループの1つの側部から延びる前記離れた部分の少なくとも1つのグループは、PN接合を、前記ルーピング細片にともに形成する第1伝導型のドーパントおよび第2伝導型のドーパントでドープされている請求項1に記載の半導体デバイス。
- PN接合を接続する金属短絡部分をさらに備える請求項12に記載の半導体デバイス。
- 連続細片は、そこに形成されている少なくとも1つのPN接合と、前記PN接合に形成されている金属短絡部分とを含む請求項1に記載の半導体デバイス。
- 抵抗材料から成る連続細片に形成されている金属層を、さらに備える請求項1に記載の半導体デバイス。
- 能動領域が形成される半導体本体と、
それ自体と交差せずに、前記能動領域の周りにループを作り、かつPN接合が形成されている、抵抗材料から成る連続細片と、
前記PN接合の少なくとも1つの上に形成される金属層
とを備える半導体デバイス。 - 抵抗材料は、多結晶シリコンを含む請求項16に記載の半導体デバイス。
- 能動領域の周りに配置される抵抗材料から成る第1閉ループと、前記第1閉ループの周りに配置される抵抗材料から成る第2閉ループとをさらに備え、連続細片は、前記第1閉ループと前記第2閉ループとの間に配置され、それらに電気的に接続されている請求項16に記載の半導体デバイス。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/991,167 US7183626B2 (en) | 2004-11-17 | 2004-11-17 | Passivation structure with voltage equalizing loops |
PCT/US2005/041734 WO2006055738A2 (en) | 2004-11-17 | 2005-11-17 | Passivation structure with voltage equalizing loops |
Publications (1)
Publication Number | Publication Date |
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JP2008521256A true JP2008521256A (ja) | 2008-06-19 |
Family
ID=36385376
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Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007543251A Pending JP2008521256A (ja) | 2004-11-17 | 2005-11-17 | 電圧等化ループを備えるパッシベーション構造 |
Country Status (6)
Country | Link |
---|---|
US (2) | US7183626B2 (ja) |
JP (1) | JP2008521256A (ja) |
KR (1) | KR100903428B1 (ja) |
CN (1) | CN101057337B (ja) |
DE (1) | DE112005002852B4 (ja) |
WO (1) | WO2006055738A2 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012221976A (ja) * | 2011-04-04 | 2012-11-12 | Toyota Central R&D Labs Inc | 半導体装置 |
US9048213B2 (en) | 2013-07-08 | 2015-06-02 | Renesas Electronics Corporation | Semiconductor device |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7183626B2 (en) * | 2004-11-17 | 2007-02-27 | International Rectifier Corporation | Passivation structure with voltage equalizing loops |
CN101405871A (zh) * | 2004-11-24 | 2009-04-08 | 美高森美公司 | 用于宽禁带功率器件的结终端结构 |
US8928065B2 (en) * | 2010-03-16 | 2015-01-06 | Vishay General Semiconductor Llc | Trench DMOS device with improved termination structure for high voltage applications |
US8853770B2 (en) * | 2010-03-16 | 2014-10-07 | Vishay General Semiconductor Llc | Trench MOS device with improved termination structure for high voltage applications |
EP2779225B1 (en) | 2011-11-11 | 2018-04-25 | Fuji Electric Co., Ltd. | Semiconductor device |
JP6649102B2 (ja) * | 2016-02-05 | 2020-02-19 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6719090B2 (ja) * | 2016-12-19 | 2020-07-08 | パナソニックIpマネジメント株式会社 | 半導体素子 |
JP6910907B2 (ja) * | 2017-09-25 | 2021-07-28 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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JP2001352064A (ja) * | 2000-06-07 | 2001-12-21 | Fuji Electric Co Ltd | 高耐圧半導体装置 |
JP2002118230A (ja) * | 2000-10-05 | 2002-04-19 | Fuji Electric Co Ltd | 半導体装置 |
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-
2004
- 2004-11-17 US US10/991,167 patent/US7183626B2/en active Active
-
2005
- 2005-11-17 JP JP2007543251A patent/JP2008521256A/ja active Pending
- 2005-11-17 CN CN2005800390463A patent/CN101057337B/zh not_active Expired - Fee Related
- 2005-11-17 DE DE112005002852.6T patent/DE112005002852B4/de active Active
- 2005-11-17 KR KR1020077011281A patent/KR100903428B1/ko active IP Right Grant
- 2005-11-17 WO PCT/US2005/041734 patent/WO2006055738A2/en active Application Filing
-
2006
- 2006-12-28 US US11/647,070 patent/US8076672B2/en active Active
Patent Citations (5)
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JPH10163506A (ja) * | 1996-11-29 | 1998-06-19 | Texas Instr Japan Ltd | 薄膜シリコンダイオード及び半導体装置 |
JP2000294803A (ja) * | 1998-11-05 | 2000-10-20 | Fuji Electric Co Ltd | 半導体装置 |
JP2002535839A (ja) * | 1999-01-15 | 2002-10-22 | インフィネオン テクノロジース アクチエンゲゼルシャフト | 半導体素子に対するエッジ終端部、エッジ終端部を有するショットキー・ダイオードおよびショットキー・ダイオードの製造方法 |
JP2001352064A (ja) * | 2000-06-07 | 2001-12-21 | Fuji Electric Co Ltd | 高耐圧半導体装置 |
JP2002118230A (ja) * | 2000-10-05 | 2002-04-19 | Fuji Electric Co Ltd | 半導体装置 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2012221976A (ja) * | 2011-04-04 | 2012-11-12 | Toyota Central R&D Labs Inc | 半導体装置 |
US9048213B2 (en) | 2013-07-08 | 2015-06-02 | Renesas Electronics Corporation | Semiconductor device |
US9343453B2 (en) | 2013-07-08 | 2016-05-17 | Renesas Electronics Corporation | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
US7183626B2 (en) | 2007-02-27 |
CN101057337B (zh) | 2011-01-05 |
WO2006055738A2 (en) | 2006-05-26 |
KR100903428B1 (ko) | 2009-06-18 |
US20070120224A1 (en) | 2007-05-31 |
US8076672B2 (en) | 2011-12-13 |
WO2006055738A3 (en) | 2006-11-02 |
US20060102984A1 (en) | 2006-05-18 |
DE112005002852T5 (de) | 2007-10-11 |
DE112005002852B4 (de) | 2020-03-12 |
CN101057337A (zh) | 2007-10-17 |
KR20070084339A (ko) | 2007-08-24 |
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