JP2008310087A - 電子回路基板の製造方法およびその製造装置 - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims description 41
- 230000007547 defect Effects 0.000 claims abstract description 242
- 238000005520 cutting process Methods 0.000 claims abstract description 88
- 238000007689 inspection Methods 0.000 claims abstract description 67
- 238000012937 correction Methods 0.000 claims description 85
- 238000003860 storage Methods 0.000 claims description 35
- 238000000034 method Methods 0.000 claims description 23
- 238000013461 design Methods 0.000 claims description 10
- 238000004891 communication Methods 0.000 claims description 9
- 238000000605 extraction Methods 0.000 claims description 8
- 230000003252 repetitive effect Effects 0.000 claims description 6
- 238000001514 detection method Methods 0.000 claims description 5
- 239000000758 substrate Substances 0.000 abstract description 34
- 239000011521 glass Substances 0.000 abstract description 3
- 239000000126 substance Substances 0.000 abstract description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 23
- 239000010408 film Substances 0.000 description 16
- 230000002950 deficient Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 8
- 239000000523 sample Substances 0.000 description 7
- 239000010409 thin film Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000004364 calculation method Methods 0.000 description 5
- 230000001678 irradiating effect Effects 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 4
- 238000009413 insulation Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000007790 scraping Methods 0.000 description 1
- 238000010187 selection method Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
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- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K3/22—Secondary treatment of printed circuits
- H05K3/225—Correcting or repairing of printed circuits
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- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
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- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
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- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
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- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
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- Y10T29/00—Metal working
- Y10T29/51—Plural diverse manufacturing apparatus including means for metal shaping or assembling
- Y10T29/5147—Plural diverse manufacturing apparatus including means for metal shaping or assembling including composite tool
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- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/53—Means to assemble or disassemble
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Abstract
【解決手段】電気式検査で検査し(101)、欠陥位置の特定(102)と欠陥種類の特定(103)を行い、基準点座標の算出(104)と座標の補正を行い(105)、欠陥近傍の画像から欠陥を抽出して欠陥種類毎にあらかじめ登録した欠陥存在範囲と比較することによって修正すべき欠陥を特定し(106,107,108,109)、特定された欠陥を切断する(110)。
【選択図】図1
Description
Claims (23)
- 配線等の繰り返し電極パターンが形成された電子回路基板の製造方法であって、
前記電子回路基板の回路の電極間ショートの欠陥を検出し、
検出された欠陥の位置と欠陥の種類を特定後、前記欠陥の種類に関連づけて予め記憶されている欠陥存在領域情報を用いて修正対象の欠陥を特定し、
欠陥種類と欠陥存在領域情報に関連づけて予め記憶されている切断位置情報を用いてショート欠陥部を切断して修正する工程を含むことを特徴とする電子回路基板の製造方法。 - 請求項1において、
前記修正の完了を判定し、完了と判定されなかったときに警報を発生することを特徴とした電子回路基板の製造方法。 - 請求項1において、
前記欠陥位置を特定する情報として、前記繰り返し電極パターンの最小繰り返し単位毎に付与した番号を使用することを特徴とした電子回路基板の製造方法 - 請求項1において、
前記欠陥位置を特定する情報として、繰り返し電極パターンの最小繰り返し単位毎に検査するために使用した2本の配線に付与された番号を使用することを特徴とする電子回路基板の製造方法。 - 請求項1において、
前記欠陥存在領域情報が、前記繰り返しパターンの最小単位毎に一カ所設定されている基準点位置からの相対座標で記憶されていることを特徴とする電子回路基板の製造方法。 - 請求項1において、
前記欠陥存在領域情報が、前記繰り返しパターンの最小繰り返し単位毎に検査するために使用した2本の配線の交点からの相対座標で記憶されていることを特徴とする電子回路基板の製造方法。 - 請求項1において、
前記欠陥存在領域情報として、複数の欠陥存在領域を記憶すると共に、一つまたは少なくとも2つの欠陥存在領域の組み合わせを記憶し、組み合わせ毎に優先度が定義されていることを特徴とする電子回路基板の製造方法。 - 請求項1において、
前記修正対象欠陥の特定が、前記欠陥存在領域情報として記憶している領域に検出した欠陥が存在するときに修正対象欠陥と判定することを特徴とする電子回路基板の製造方法。 - 請求項1において、
前記修正対象欠陥の特定が、前記欠陥存在領域情報として記憶している一つまたは少なくとも2つの領域の組み合わせに対して、各組み合わせを構成する全ての領域に検出した欠陥が存在するときに修正対象欠陥と判定することを特徴とする電子回路基板の製造方法。 - 請求項1において、
前記切断位置情報が、一つの欠陥存在領域情報に対して複数の切断位置が関連づけられて記憶されていることを特徴とする電子回路基板の製造方法。 - 請求項1において、
前記欠陥存在領域情報と前記切断位置情報が欠陥近傍に設定した基準点からの相対座標で記憶されていることを特徴とする電子回路基板の製造方法。 - 繰り返しパターンが形成された電子回路基板の修正装置を備えた電子回路基板の製造装置であって、
ショート欠陥検出手段と、欠陥位置特定手段と、欠陥種類特定手段と、基準点座標手段と、基準点座標補正手段と、欠陥近傍画像取得手段と、欠陥抽出手段と、修正欠陥特定手段と、切断位置特定手段と、切断手段と、検査条件情報と検査結果情報と回路設計情報と欠陥存在領域情報と切断位置情報を記憶する記憶手段とを有すること特徴とする電子回路基板の製造装置。 - 請求項12において、
検査装置から欠陥位置と欠陥種類を受け取る通信手段と、基準点座標算出手段と、基準点座標補正手段と、欠陥近傍画像取得手段と、欠陥抽出手段と、修正欠陥特定手段と、切断位置特定手段と、切断手段と、検査条件情報や検査結果情報と回路設計情報と欠陥存在領域情報と切断位置情報を記憶する記憶手段とを有すること特徴とする電子回路基板の製造装置。 - 請求項12において、
前記欠陥位置特定手段は、繰り返しパターンの最小繰り返し単位毎に付与した番号を出力する機能を有することを特徴とする電子回路基板の製造装置。 - 請求項12において、
前記欠陥位置特定手段は、繰り返しパターンの最小繰り返し単位毎に検査するために使用した2本の配線に付与された番号を出力する機能を有することを特徴とする電子回路基板の製造装置。 - 請求項12又は13において、
前記修正欠陥特定手段は、前記繰り返しパターンの最小単位毎に一カ所設定されている基準点位置からの相対座標を記憶する機能を有することを特徴とする電子回路基板の製造装置。 - 請求項12又は13において、
前記修正欠陥特定手段は、前記繰り返しパターンの最小繰り返し単位毎に検査するために使用した2本の配線の交点からの相対座標を記憶する機能を有することを特徴とする電子回路基板の製造装置。 - 請求項12又は13において、
前記修正欠陥特定手段は、複数の欠陥存在領域を記憶する手段と、一つまたは少なくとも2つの領域の組み合わせを記憶する手段と、組み合わせ毎の優先度を記憶する手段を有することを特徴とする電子回路基板の製造装置。 - 請求項12又は13において、
前記修正欠陥特定手段は、前記欠陥存在領域に検出した欠陥が存在するときに修正対象欠陥と判定する機能を有することを特徴とする電子回路基板の製造装置。 - 請求項12又は13において、
前記修正欠陥特定手段は、前記欠陥存在領域として記憶している一つまたは少なくとも2つの欠陥存在領域の組み合わせに対して、各組み合わせを構成する全ての領域に検出した欠陥が存在するときに修正対象欠陥と判定する機能を有することを特徴とする電子回路基板の製造装置。 - 請求項12又は13において、
前記切断位置特定手段は、一つの欠陥存在領域に対して複数の切断位置を関連づけて記憶する機能を有することを特徴とする電子回路基板の製造装置。 - 請求項12又は13において、
前記切断手段は、修正箇所を映し出したモニタ上に切断箇所を重ねて表示する機能を有することを特徴とする電子回路基板の製造装置。 - 請求項12又は13において、
前記切断手段は、切断実施後に切断部の画像を取得して切断の完了を判定する手段と、所定回数切断と切断完了判定を実施しても切断が完了したと判定できなかったときに警報を発生する手段を有することを特徴とする電子回路基板の製造装置。
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US12/136,148 US8112883B2 (en) | 2007-06-15 | 2008-06-10 | Method and apparatus for manufacturing electronic circuit board |
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JP2010276767A (ja) * | 2009-05-27 | 2010-12-09 | Hitachi Displays Ltd | 電子回路パターンの欠陥修正方法およびその装置 |
CN117524915A (zh) * | 2024-01-08 | 2024-02-06 | 杭州广立微电子股份有限公司 | 网格状绕线薄弱点检测方法、装置和计算机设备 |
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WO2008004354A1 (fr) * | 2006-07-07 | 2008-01-10 | Sharp Kabushiki Kaisha | Substrat de réseau, procédé pour corriger celui-ci et afficheur à cristaux liquides |
GB0625001D0 (en) * | 2006-12-14 | 2007-01-24 | Plastic Logic Ltd | Short isolation |
US9035673B2 (en) * | 2010-01-25 | 2015-05-19 | Palo Alto Research Center Incorporated | Method of in-process intralayer yield detection, interlayer shunt detection and correction |
US8995747B2 (en) * | 2010-07-29 | 2015-03-31 | Sharp Laboratories Of America, Inc. | Methods, systems and apparatus for defect detection and classification |
JP2016025147A (ja) * | 2014-07-17 | 2016-02-08 | ソニー株式会社 | 電子デバイスおよびその製造方法、並びに電子機器 |
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JP2010276767A (ja) * | 2009-05-27 | 2010-12-09 | Hitachi Displays Ltd | 電子回路パターンの欠陥修正方法およびその装置 |
CN117524915A (zh) * | 2024-01-08 | 2024-02-06 | 杭州广立微电子股份有限公司 | 网格状绕线薄弱点检测方法、装置和计算机设备 |
CN117524915B (zh) * | 2024-01-08 | 2024-05-14 | 杭州广立微电子股份有限公司 | 网格状绕线薄弱点检测方法、装置和计算机设备 |
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JP5352066B2 (ja) | 2013-11-27 |
US8112883B2 (en) | 2012-02-14 |
US20080313893A1 (en) | 2008-12-25 |
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