JP2007524984A - 低gidlmosfet構造および製造方法 - Google Patents
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- 238000009792 diffusion process Methods 0.000 claims abstract description 33
- 230000004888 barrier function Effects 0.000 claims abstract description 16
- 125000006850 spacer group Chemical group 0.000 claims description 29
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 28
- 229920005591 polysilicon Polymers 0.000 claims description 28
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 24
- 238000000151 deposition Methods 0.000 claims description 14
- 230000008569 process Effects 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 10
- 239000012212 insulator Substances 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 7
- 238000001020 plasma etching Methods 0.000 claims description 6
- 125000001475 halogen functional group Chemical group 0.000 claims description 5
- 238000005530 etching Methods 0.000 claims description 4
- 238000001459 lithography Methods 0.000 claims description 3
- 238000000059 patterning Methods 0.000 claims description 3
- 230000001590 oxidative effect Effects 0.000 claims description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 241000293849 Cordylanthus Species 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000007373 indentation Methods 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- -1 tungsten nitride Chemical class 0.000 description 1
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Abstract
【解決手段】 MOSFETデバイス構造は、縁部がソース/ドレイン拡散にわずかに重なる場合(82)がある中央ゲート導体と、薄い絶縁性の拡散バリア層によって中央ゲート導体から分離した側方ウイング・ゲート導体とを含む。また、側方ウイング・ゲート導体の左右の横方向の縁部が、前記ソース拡散領域および前記ドレイン拡散領域の一方に重なる場合(80)も含まれる。
【選択図】 図9
Description
Claims (16)
- 低ゲート誘導ドレイン漏れ(GIDL)電流を有するMOSFETデバイスであって、
ソース拡散領域と、ドレイン拡散領域と、中央ゲートと、
を含み、前記中央ゲートが、中央ゲート導体と、左側方ウイング・ゲート導体と、右側方ウイング・ゲート導体とを含み、前記左側方ウイング・ゲート導体および前記右側方ウイング・ゲート導体の各々が、薄い絶縁性の拡散バリア層によって、前記中央ゲート導体から分離している、MOSFETデバイス。 - 前記中央ゲート導体の左右の横方向の縁部が、前記ソース拡散領域および前記ドレイン拡散領域の一方に重なる、請求項1に記載のMOSFETデバイス。
- 前記左および右側方ウイング・ゲート導体の左右の横方向の縁部が、前記ソース拡散領域および前記ドレイン拡散領域の一方に重なる、請求項1に記載のMOSFETデバイス。
- 前記中央ゲート導体ならびに前記左および右側方ウイング・ゲート導体が、その上にある金属側壁導電性層によって結び付けられる、請求項1に記載のNMOSFETデバイス。
- 前記左および右側方ウイング導体の下のゲート絶縁体の厚さが、前記中央導体の下のゲート絶縁体の厚さよりも厚い、請求項1に記載のMOSFET。
- 前記中央ゲート導体と前記左および右側方ウイング・ゲート導体との間に整流接合が形成されるのを防ぐために、前記中央ゲート導体の左および右の側壁に沿って形成された左および右金属側壁スペーサを更に含む、請求項1に記載のMOSFET。
- 前記左および右金属側壁スペーサが、導電性拡散バリア層によって前記中央ゲート導体から分離している、請求項6に記載のMOSFET。
- NMOSFETデバイスを含み、前記左側方ウイング・ゲート導体および前記右側方ウイング・ゲート導体の各々がN+ポリシリコンで形成されている、請求項1に記載のMOSFET。
- PMOSFETデバイスを含み、前記左側方ウイング・ゲート導体および前記右側方ウイング・ゲート導体の各々がP+ポリシリコンで形成されている、請求項1に記載のMOSFET。
- 前記中央ゲート導体がP+ポリシリコンで形成されて、高Vt(閾値電圧)NMOSFETを形成する、請求項1に記載のMOSFET。
- 前記中央ゲート導体がN+ポリシリコンで形成されて、低Vt(閾値電圧)NMOSFETを形成する、請求項1に記載のMOSFET。
- 低ゲート誘導漏れドレイン電流(GIDL)MOSFETデバイスを製造する方法であって、
パターニングした中央ゲート導体およびこの周囲の基板領域の水平表面上にオフセット膜を形成するステップと、
前記中央ゲート導体の側壁上に導電性拡散バリアを堆積するステップと、
前記中央ゲート導体の前記側壁上の前記導電性拡散バリアの上に金属スペーサを形成するステップと、
前記オフセット膜を剥離してアンダーカット領域上に懸垂金属スペーサを形成するステップと、
前記懸垂金属スペーサの下の前記中央ゲート導体を酸化させて、前記中央ゲート導体と、後に形成される左および右側方ウイング・ゲート導体との間に、整流接合が形成されるのを防ぐステップと、
ポリシリコン層を堆積して、前記懸垂金属スペーサの下の前記アンダーカット領域を充填するステップと、
前記懸垂金属スペーサの下の前記アンダーカット領域において前記ポリシリコンを残しながら前記ポリシリコン層を等方性エッチングによって除去して、左および右側方ウイング・ゲート導体を形成するステップと、
を含む、方法。 - 前記除去するステップの後、ソースおよびドレイン拡張部/ハロならびにスペーサを形成し、次いで導体上にサリサイドを形成する、請求項12に記載の方法。
- 前記パターニングした中央ゲート導体の形成が、ゲート誘電体によって被覆された基板上にポリシリコンを堆積し、次いでリソグラフィおよび反応性イオン・エッチング・プロセスによって前記中央ゲート導体をパターニングすることによって行われる、請求項12に記載の方法。
- 前記パターニングした中央ゲート導体およびこの周囲の基板領域の水平面上に前記オフセット膜を形成するために、異方性誘電体堆積を用いるステップを更に含む、請求項12に記載の方法。
- 前記中央ゲート導体ならびに前記左および右側方ウイング・ゲート導体を、ドーピングしたポリシリコンで形成するステップを更に含む、請求項12に記載の方法。
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Application Number | Priority Date | Filing Date | Title |
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US10/345,472 US6841826B2 (en) | 2003-01-15 | 2003-01-15 | Low-GIDL MOSFET structure and method for fabrication |
PCT/US2004/000968 WO2004066367A2 (en) | 2003-01-15 | 2004-01-15 | Low-gidl mosfet structure and method for fabrication |
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JP2007524984A true JP2007524984A (ja) | 2007-08-30 |
JP4678875B2 JP4678875B2 (ja) | 2011-04-27 |
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US (2) | US6841826B2 (ja) |
EP (1) | EP1588403B1 (ja) |
JP (1) | JP4678875B2 (ja) |
KR (1) | KR100754305B1 (ja) |
CN (1) | CN101410951B (ja) |
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CN102263133A (zh) * | 2011-08-22 | 2011-11-30 | 无锡新洁能功率半导体有限公司 | 低栅极电荷低导通电阻深沟槽功率mosfet器件及其制造方法 |
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DE10336876B4 (de) * | 2003-08-11 | 2006-08-24 | Infineon Technologies Ag | Speicherzelle mit Nanokristallen oder Nanodots und Verfahren zu deren Herstellung |
KR100602122B1 (ko) * | 2004-12-03 | 2006-07-19 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조방법 |
US8154088B1 (en) | 2006-09-29 | 2012-04-10 | Cypress Semiconductor Corporation | Semiconductor topography and method for reducing gate induced drain leakage (GIDL) in MOS transistors |
JP5559567B2 (ja) * | 2010-02-24 | 2014-07-23 | パナソニック株式会社 | 半導体装置 |
US8592911B2 (en) * | 2010-03-17 | 2013-11-26 | Institute of Microelectronics, Chinese Academy of Sciences | Asymmetric semiconductor device having a high-k/metal gate and method of manufacturing the same |
CN102194870B (zh) * | 2010-03-17 | 2012-08-29 | 中国科学院微电子研究所 | 一种半导体器件及其制造方法 |
CN102544098B (zh) * | 2010-12-31 | 2014-10-01 | 中国科学院微电子研究所 | Mos晶体管及其形成方法 |
US8743628B2 (en) | 2011-08-08 | 2014-06-03 | Micron Technology, Inc. | Line driver circuits, methods, and apparatuses |
CN102446771A (zh) * | 2011-11-11 | 2012-05-09 | 上海华力微电子有限公司 | 一种减小mos io器件gidl效应的方法 |
US8501566B1 (en) * | 2012-09-11 | 2013-08-06 | Nanya Technology Corp. | Method for fabricating a recessed channel access transistor device |
US8896035B2 (en) | 2012-10-22 | 2014-11-25 | International Business Machines Corporation | Field effect transistor having phase transition material incorporated into one or more components for reduced leakage current |
US9685526B2 (en) * | 2014-02-12 | 2017-06-20 | International Business Machines Corporation | Side gate assist in metal gate first process |
CN104900504B (zh) * | 2015-05-25 | 2018-02-06 | 上海华虹宏力半导体制造有限公司 | 降低mos晶体管gidl电流的方法 |
FR3090999B1 (fr) * | 2018-12-20 | 2022-01-14 | Commissariat Energie Atomique | Procédé de fabrication d'un composant semiconducteur à base d'un composé III-N |
CN112663541B (zh) * | 2020-12-22 | 2022-10-21 | 浙江交工集团股份有限公司 | 中央分隔带生态预制装配式护栏安装施工方法 |
CN116313807B (zh) * | 2023-02-28 | 2024-05-28 | 上海维安半导体有限公司 | 一种双层侧墙结构的超结功率mosfet器件的制备方法及超结功率mosfet器件 |
Citations (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01133366A (ja) * | 1987-11-18 | 1989-05-25 | Sanyo Electric Co Ltd | Mos半導体装置の製造方法 |
JPH02288341A (ja) * | 1989-04-28 | 1990-11-28 | Seiko Epson Corp | Mis型半導体装置 |
JPH036830A (ja) * | 1989-06-02 | 1991-01-14 | Sharp Corp | 半導体装置 |
JPH043939A (ja) * | 1990-04-20 | 1992-01-08 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JPH05175492A (ja) * | 1991-12-20 | 1993-07-13 | Nippon Steel Corp | 半導体装置の製造方法 |
JPH05226361A (ja) * | 1992-02-12 | 1993-09-03 | Oki Electric Ind Co Ltd | 電界効果トランジスタ |
JPH065850A (ja) * | 1992-06-17 | 1994-01-14 | Mitsubishi Electric Corp | 半導体装置およびその製造方法並びにその半導体装置を用いた半導体集積回路装置 |
JPH0629521A (ja) * | 1992-07-07 | 1994-02-04 | Nec Corp | Mos型電界効果トランジスタの製造方法 |
JPH08264789A (ja) * | 1995-03-21 | 1996-10-11 | Motorola Inc | 絶縁ゲート半導体装置および製造方法 |
JPH1126765A (ja) * | 1997-07-09 | 1999-01-29 | Nec Corp | 電界効果型トランジスタ及びその製造方法 |
JPH11220130A (ja) * | 1998-01-19 | 1999-08-10 | Lg Semicon Co Ltd | 半導体素子の配線と半導体素子及びその製造方法 |
US6097070A (en) * | 1999-02-16 | 2000-08-01 | International Business Machines Corporation | MOSFET structure and process for low gate induced drain leakage (GILD) |
JP2001267562A (ja) * | 2000-03-15 | 2001-09-28 | Hitachi Ltd | 半導体装置及びその製造方法 |
Family Cites Families (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4714519A (en) * | 1987-03-30 | 1987-12-22 | Motorola, Inc. | Method for fabricating MOS transistors having gates with different work functions |
US5210435A (en) * | 1990-10-12 | 1993-05-11 | Motorola, Inc. | ITLDD transistor having a variable work function |
US5108939A (en) * | 1990-10-16 | 1992-04-28 | National Semiconductor Corp. | Method of making a non-volatile memory cell utilizing polycrystalline silicon spacer tunnel region |
US5221632A (en) * | 1990-10-31 | 1993-06-22 | Matsushita Electric Industrial Co., Ltd. | Method of proudcing a MIS transistor |
US5091763A (en) * | 1990-12-19 | 1992-02-25 | Intel Corporation | Self-aligned overlap MOSFET and method of fabrication |
KR940001402B1 (ko) * | 1991-04-10 | 1994-02-21 | 삼성전자 주식회사 | 골드구조를 가지는 반도체소자의 제조방법 |
KR940005293B1 (ko) * | 1991-05-23 | 1994-06-15 | 삼성전자 주식회사 | 게이트와 드레인이 중첩된 모오스 트랜지스터의 제조방법 및 그 구조 |
US5314834A (en) * | 1991-08-26 | 1994-05-24 | Motorola, Inc. | Field effect transistor having a gate dielectric with variable thickness |
US5372960A (en) * | 1994-01-04 | 1994-12-13 | Motorola, Inc. | Method of fabricating an insulated gate semiconductor device |
KR960006004A (ko) * | 1994-07-25 | 1996-02-23 | 김주용 | 반도체 소자 및 그 제조방법 |
US5599726A (en) * | 1995-12-04 | 1997-02-04 | Chartered Semiconductor Manufacturing Pte Ltd | Method of making a conductive spacer lightly doped drain (LDD) for hot carrier effect (HCE) control |
US5877058A (en) * | 1996-08-26 | 1999-03-02 | Advanced Micro Devices, Inc. | Method of forming an insulated-gate field-effect transistor with metal spacers |
US5714786A (en) * | 1996-10-31 | 1998-02-03 | Micron Technology, Inc. | Transistors having controlled conductive spacers, uses of such transistors and methods of making such transistors |
US5953596A (en) * | 1996-12-19 | 1999-09-14 | Micron Technology, Inc. | Methods of forming thin film transistors |
US5793089A (en) * | 1997-01-10 | 1998-08-11 | Advanced Micro Devices, Inc. | Graded MOS transistor junction formed by aligning a sequence of implants to a selectively removable polysilicon sidewall space and oxide thermally grown thereon |
US6090671A (en) * | 1997-09-30 | 2000-07-18 | Siemens Aktiengesellschaft | Reduction of gate-induced drain leakage in semiconductor devices |
DE19812212A1 (de) * | 1998-03-19 | 1999-09-23 | Siemens Ag | MOS-Transistor in einer Ein-Transistor-Speicherzelle mit einem lokal verdickten Gateoxid und Herstellverfahren |
US6091101A (en) * | 1998-03-30 | 2000-07-18 | Worldwide Semiconductor Manufacturing Corporation | Multi-level flash memory using triple well |
US6661057B1 (en) * | 1998-04-07 | 2003-12-09 | Advanced Micro Devices Inc | Tri-level segmented control transistor and fabrication method |
US6259142B1 (en) * | 1998-04-07 | 2001-07-10 | Advanced Micro Devices, Inc. | Multiple split gate semiconductor device and fabrication method |
US6097069A (en) * | 1998-06-22 | 2000-08-01 | International Business Machines Corporation | Method and structure for increasing the threshold voltage of a corner device |
US5998848A (en) * | 1998-09-18 | 1999-12-07 | International Business Machines Corporation | Depleted poly-silicon edged MOSFET structure and method |
US6235598B1 (en) * | 1998-11-13 | 2001-05-22 | Intel Corporation | Method of using thick first spacers to improve salicide resistance on polysilicon gates |
US6312995B1 (en) * | 1999-03-08 | 2001-11-06 | Advanced Micro Devices, Inc. | MOS transistor with assisted-gates and ultra-shallow “Psuedo” source and drain extensions for ultra-large-scale integration |
US6251737B1 (en) * | 1999-11-04 | 2001-06-26 | United Microelectronics Corp. | Method of increasing gate surface area for depositing silicide material |
US6169017B1 (en) * | 1999-11-23 | 2001-01-02 | United Silicon Incorporated | Method to increase contact area |
US6238988B1 (en) * | 1999-12-09 | 2001-05-29 | United Microelectronics Corp. | Method of forming a MOS transistor |
US6555858B1 (en) * | 2000-11-15 | 2003-04-29 | Motorola, Inc. | Self-aligned magnetic clad write line and its method of formation |
-
2003
- 2003-01-15 US US10/345,472 patent/US6841826B2/en not_active Expired - Lifetime
-
2004
- 2004-01-09 TW TW093100591A patent/TWI270145B/zh not_active IP Right Cessation
- 2004-01-15 KR KR1020057010895A patent/KR100754305B1/ko not_active IP Right Cessation
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- 2004-01-15 JP JP2006500959A patent/JP4678875B2/ja not_active Expired - Fee Related
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- 2004-01-15 AT AT04702490T patent/ATE551727T1/de active
- 2004-01-15 WO PCT/US2004/000968 patent/WO2004066367A2/en active Search and Examination
- 2004-06-25 US US10/876,873 patent/US6878582B2/en not_active Expired - Fee Related
Patent Citations (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01133366A (ja) * | 1987-11-18 | 1989-05-25 | Sanyo Electric Co Ltd | Mos半導体装置の製造方法 |
JPH02288341A (ja) * | 1989-04-28 | 1990-11-28 | Seiko Epson Corp | Mis型半導体装置 |
JPH036830A (ja) * | 1989-06-02 | 1991-01-14 | Sharp Corp | 半導体装置 |
JPH043939A (ja) * | 1990-04-20 | 1992-01-08 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JPH05175492A (ja) * | 1991-12-20 | 1993-07-13 | Nippon Steel Corp | 半導体装置の製造方法 |
JPH05226361A (ja) * | 1992-02-12 | 1993-09-03 | Oki Electric Ind Co Ltd | 電界効果トランジスタ |
JPH065850A (ja) * | 1992-06-17 | 1994-01-14 | Mitsubishi Electric Corp | 半導体装置およびその製造方法並びにその半導体装置を用いた半導体集積回路装置 |
JPH0629521A (ja) * | 1992-07-07 | 1994-02-04 | Nec Corp | Mos型電界効果トランジスタの製造方法 |
JPH08264789A (ja) * | 1995-03-21 | 1996-10-11 | Motorola Inc | 絶縁ゲート半導体装置および製造方法 |
JPH1126765A (ja) * | 1997-07-09 | 1999-01-29 | Nec Corp | 電界効果型トランジスタ及びその製造方法 |
JPH11220130A (ja) * | 1998-01-19 | 1999-08-10 | Lg Semicon Co Ltd | 半導体素子の配線と半導体素子及びその製造方法 |
US6097070A (en) * | 1999-02-16 | 2000-08-01 | International Business Machines Corporation | MOSFET structure and process for low gate induced drain leakage (GILD) |
JP2001267562A (ja) * | 2000-03-15 | 2001-09-28 | Hitachi Ltd | 半導体装置及びその製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102263133A (zh) * | 2011-08-22 | 2011-11-30 | 无锡新洁能功率半导体有限公司 | 低栅极电荷低导通电阻深沟槽功率mosfet器件及其制造方法 |
Also Published As
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TW200504887A (en) | 2005-02-01 |
US6841826B2 (en) | 2005-01-11 |
TWI270145B (en) | 2007-01-01 |
CN101410951B (zh) | 2010-05-05 |
KR100754305B1 (ko) | 2007-09-03 |
US20040248356A1 (en) | 2004-12-09 |
EP1588403A4 (en) | 2010-03-24 |
US20040137689A1 (en) | 2004-07-15 |
ATE551727T1 (de) | 2012-04-15 |
JP4678875B2 (ja) | 2011-04-27 |
WO2004066367A2 (en) | 2004-08-05 |
US6878582B2 (en) | 2005-04-12 |
CN101410951A (zh) | 2009-04-15 |
EP1588403B1 (en) | 2012-03-28 |
WO2004066367A3 (en) | 2009-05-28 |
EP1588403A2 (en) | 2005-10-26 |
KR20050091003A (ko) | 2005-09-14 |
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