JP2007500456A - Ｆｉｎｆｅｔ中のゲート領域のマルチステップ化学機械研磨 - Google Patents

Ｆｉｎｆｅｔ中のゲート領域のマルチステップ化学機械研磨 Download PDF

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Publication number
JP2007500456A
JP2007500456A JP2006533564A JP2006533564A JP2007500456A JP 2007500456 A JP2007500456 A JP 2007500456A JP 2006533564 A JP2006533564 A JP 2006533564A JP 2006533564 A JP2006533564 A JP 2006533564A JP 2007500456 A JP2007500456 A JP 2007500456A
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JP
Japan
Prior art keywords
slurry
gate
gate structure
planarization
fin
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Pending
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JP2006533564A
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Japanese (ja)
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JP2007500456A5 (https=
Inventor
アチュザン クリシュナシュリー
エス． アーメッド シブリー
ワン ハイホン
ユ ビン
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JP2007500456A publication Critical patent/JP2007500456A/ja
Publication of JP2007500456A5 publication Critical patent/JP2007500456A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09G—POLISHING COMPOSITIONS; SKI WAXES
    • C09G1/00—Polishing compositions
    • C09G1/02—Polishing compositions containing abrasives or grinding agents
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H10D30/0243—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET] using dummy structures having essentially the same shapes as the semiconductor bodies, e.g. to provide stability
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H10P52/40—Chemomechanical polishing [CMP]
    • H10P52/403—Chemomechanical polishing [CMP] of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H10P95/062—Planarisation of inorganic insulating materials involving a dielectric removal step
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • H10D30/6739—Conductor-insulator-semiconductor electrodes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/959—Mechanical polishing of wafer

Landscapes

  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2006533564A 2003-06-12 2004-06-05 Ｆｉｎｆｅｔ中のゲート領域のマルチステップ化学機械研磨 Pending JP2007500456A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/459,495 US6855607B2 (en) 2003-06-12 2003-06-12 Multi-step chemical mechanical polishing of a gate area in a FinFET
PCT/US2004/017724 WO2004112105A2 (en) 2003-06-12 2004-06-05 Multi-step chemical mechanical polishing of a gate area in a finfet

Publications (2)

Publication Number Publication Date
JP2007500456A true JP2007500456A (ja) 2007-01-11
JP2007500456A5 JP2007500456A5 (https=) 2009-05-28

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006533564A Pending JP2007500456A (ja) 2003-06-12 2004-06-05 Ｆｉｎｆｅｔ中のゲート領域のマルチステップ化学機械研磨

Country Status (8)

Country Link
US (2) US6855607B2 (https=)
JP (1) JP2007500456A (https=)
KR (1) KR101062986B1 (https=)
CN (1) CN1806318B (https=)
DE (1) DE112004001041B4 (https=)
GB (1) GB2419232B (https=)
TW (1) TWI353011B (https=)
WO (1) WO2004112105A2 (https=)

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* Cited by examiner, † Cited by third party
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JP2014506400A (ja) * 2011-01-06 2014-03-13 インターナショナル・ビジネス・マシーンズ・コーポレーション ｆｉｎＦＥＴプロセスにおいて抵抗器を製造するための構造体及び方法
JP2018537844A (ja) * 2015-09-30 2018-12-20 サンエディソン・セミコンダクター・リミテッドＳｕｎＥｄｉｓｏｎ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｌｉｍｉｔｅｄ 多結晶仕上げを有する半導体ウエハを処理する方法

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Also Published As

Publication number Publication date
US6855607B2 (en) 2005-02-15
DE112004001041B4 (de) 2010-04-29
WO2004112105A3 (en) 2005-02-24
US7125776B2 (en) 2006-10-24
KR101062986B1 (ko) 2011-09-07
GB2419232A (en) 2006-04-19
TWI353011B (en) 2011-11-21
KR20060020674A (ko) 2006-03-06
CN1806318B (zh) 2010-05-12
GB0526386D0 (en) 2006-02-08
DE112004001041T5 (de) 2006-04-20
GB2419232B (en) 2007-01-17
TW200520081A (en) 2005-06-16
WO2004112105A2 (en) 2004-12-23
CN1806318A (zh) 2006-07-19
US20050118824A1 (en) 2005-06-02
US20040253775A1 (en) 2004-12-16

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