JP2007214572A - ベアチップ内蔵型印刷回路基板及びその製造方法 - Google Patents
ベアチップ内蔵型印刷回路基板及びその製造方法 Download PDFInfo
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- JP2007214572A JP2007214572A JP2007029627A JP2007029627A JP2007214572A JP 2007214572 A JP2007214572 A JP 2007214572A JP 2007029627 A JP2007029627 A JP 2007029627A JP 2007029627 A JP2007029627 A JP 2007029627A JP 2007214572 A JP2007214572 A JP 2007214572A
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- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Production Of Multi-Layered Print Wiring Board (AREA)
- Wire Bonding (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
【解決手段】本発明は、(A)基板の内部にベアチップを電極パッドが露出されるように内蔵する段階と、(B)電極パッド表面に電極バンプを形成する段階とを含むベアチップ内蔵型印刷回路基板の製造方法は、既存のベアチップの状態で進行された再配線工程が印刷回路基板の一般製造工程中で可能となり工程の単純化及び低費用のベアチップ内蔵型印刷回路基板の量産体制を構築することができる。
【選択図】図5
Description
32 テープ
33 ベアチップ
34 電極パッド
35 充填材
36 金属層
36a 拡散防止層
36b 厚膜
38 貫通ホール
39 電極バンプ
100 印刷回路基板
Claims (10)
- (A)基板の内部にベアチップを電極パッドが露出されるように内蔵する段階と、
(B)前記電極パッドの表面に電極バンプを形成する段階を含むベアチップ内蔵型印刷回路基板の製造方法。 - 前記(B)段階は、回路パターンを形成する段階を含む請求項1に記載のベアチップ内蔵型印刷回路基板の製造方法。
- 前記回路パターンと前記電極バンプは電気的に繋がる請求項2に記載のベアチップ内蔵型印刷回路基板の製造方法。
- (a)貫通ホールが形成された絶縁基板の一面にテープを附着し、前記貫通ホールの内部のテープにベアチップを電極パッド方向で附着する段階と、
(b)前記貫通ホールの内部に充填材を充填し、前記テープを除去する段階と、
(c)前記テープが除去された面の前記絶縁基板及び前記充填材の表面に金属層を積層する段階と、及び
(d)前記金属層の一部を除去して電極バンプを形成する段階と、
を含むベアチップ内蔵型印刷回路基板の製造方法。 - 前記(b)段階と前記(c)段階の間に、
前記絶縁基板及び前記充填材の一面をクリーニングする段階をさらに含む請求項4に記載のベアチップ内蔵型印刷回路基板の製造方法。 - 前記(c)段階は、
(c1)絶縁基板の一面に拡散防止層を積層する段階と、
(c2)前記拡散防止層の上面に厚膜を積層する段階を含む請求項4に記載のベアチップ内蔵型印刷回路基板の製造方法。 - 前記(d)段階は、前記金属層の一部を除去して前記絶縁基板の一面に回路パターンを同時に形成する段階を含む請求項4に記載のベアチップ内蔵型印刷回路基板の製造方法。
- 貫通ホールが形成された絶縁基板と、
前記貫通ホールの内部を充填する充填材と、
一面に形成された電極パッドが前記充填材の表面に露出されるように前記充填材に内蔵されたベアチップと、
前記電極パッドの表面に附着された電極バンプと、
を含むベアチップ内蔵型印刷回路基板。 - 前記電極バンプは、前記電極パッドの表面に位置する拡散防止層と前記拡散防止層の表面に積層される厚膜を含む請求項8に記載のベアチップ内蔵型印刷回路基板。
- 前記拡散防止層はチタンを含む請求項8に記載のベアチップ内蔵型印刷回路基板。
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JP (1) | JP2007214572A (ja) |
KR (1) | KR100736635B1 (ja) |
CN (1) | CN100576977C (ja) |
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CN100576977C (zh) | 2009-12-30 |
US8929091B2 (en) | 2015-01-06 |
FI20075088L (fi) | 2007-08-10 |
US20110277320A1 (en) | 2011-11-17 |
US8184448B2 (en) | 2012-05-22 |
DE102007005920A1 (de) | 2007-09-06 |
FI20075088A0 (fi) | 2007-02-07 |
US20070181988A1 (en) | 2007-08-09 |
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